From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-riscv@nongnu.org,
qemu-s390x@nongnu.org, jcmvbkbc@gmail.com,
kbastian@mail.uni-paderborn.de, ysato@users.sourceforge.jp,
gaosong@loongson.cn, jiaxun.yang@flygoat.com,
tsimpson@quicinc.com, ale@rev.ng, mrolnik@gmail.com,
edgar.iglesias@gmail.com
Subject: [PATCH 29/70] target/microblaze: Avoid tcg_const_* throughout
Date: Sun, 26 Feb 2023 19:41:52 -1000 [thread overview]
Message-ID: <20230227054233.390271-30-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230227054233.390271-1-richard.henderson@linaro.org>
All uses are strictly read-only.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/microblaze/translate.c | 35 +++++++++++++++--------------------
1 file changed, 15 insertions(+), 20 deletions(-)
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index eb6bdb49e1..ee0d7b81ad 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -101,9 +101,7 @@ static void t_sync_flags(DisasContext *dc)
static void gen_raise_exception(DisasContext *dc, uint32_t index)
{
- TCGv_i32 tmp = tcg_const_i32(index);
-
- gen_helper_raise_exception(cpu_env, tmp);
+ gen_helper_raise_exception(cpu_env, tcg_constant_i32(index));
dc->base.is_jmp = DISAS_NORETURN;
}
@@ -116,7 +114,7 @@ static void gen_raise_exception_sync(DisasContext *dc, uint32_t index)
static void gen_raise_hw_excp(DisasContext *dc, uint32_t esr_ec)
{
- TCGv_i32 tmp = tcg_const_i32(esr_ec);
+ TCGv_i32 tmp = tcg_constant_i32(esr_ec);
tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUMBState, esr));
gen_raise_exception_sync(dc, EXCP_HW_EXCP);
@@ -260,7 +258,7 @@ static bool do_typeb_val(DisasContext *dc, arg_typeb *arg, bool side_effects,
rd = reg_for_write(dc, arg->rd);
ra = reg_for_read(dc, arg->ra);
- imm = tcg_const_i32(arg->imm);
+ imm = tcg_constant_i32(arg->imm);
fn(rd, ra, imm);
return true;
@@ -305,7 +303,7 @@ static bool do_typeb_val(DisasContext *dc, arg_typeb *arg, bool side_effects,
/* No input carry, but output carry. */
static void gen_add(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
{
- TCGv_i32 zero = tcg_const_i32(0);
+ TCGv_i32 zero = tcg_constant_i32(0);
tcg_gen_add2_i32(out, cpu_msr_c, ina, zero, inb, zero);
}
@@ -313,7 +311,7 @@ static void gen_add(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
/* Input and output carry. */
static void gen_addc(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
{
- TCGv_i32 zero = tcg_const_i32(0);
+ TCGv_i32 zero = tcg_constant_i32(0);
TCGv_i32 tmp = tcg_temp_new_i32();
tcg_gen_add2_i32(tmp, cpu_msr_c, ina, zero, cpu_msr_c, zero);
@@ -546,7 +544,7 @@ static void gen_rsub(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
/* Input and output carry. */
static void gen_rsubc(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 inb)
{
- TCGv_i32 zero = tcg_const_i32(0);
+ TCGv_i32 zero = tcg_constant_i32(0);
TCGv_i32 tmp = tcg_temp_new_i32();
tcg_gen_not_i32(tmp, ina);
@@ -1117,8 +1115,8 @@ static bool do_bcc(DisasContext *dc, int dest_rb, int dest_imm,
}
/* Compute the final destination into btarget. */
- zero = tcg_const_i32(0);
- next = tcg_const_i32(dc->base.pc_next + (delay + 1) * 4);
+ zero = tcg_constant_i32(0);
+ next = tcg_constant_i32(dc->base.pc_next + (delay + 1) * 4);
tcg_gen_movcond_i32(dc->jmp_cond, cpu_btarget,
reg_for_read(dc, ra), zero,
cpu_btarget, next);
@@ -1226,8 +1224,6 @@ static bool trans_mbar(DisasContext *dc, arg_mbar *arg)
/* Sleep. */
if (mbar_imm & 16) {
- TCGv_i32 tmp_1;
-
if (trap_userspace(dc, true)) {
/* Sleep is a privileged instruction. */
return true;
@@ -1235,8 +1231,7 @@ static bool trans_mbar(DisasContext *dc, arg_mbar *arg)
t_sync_flags(dc);
- tmp_1 = tcg_const_i32(1);
- tcg_gen_st_i32(tmp_1, cpu_env,
+ tcg_gen_st_i32(tcg_constant_i32(1), cpu_env,
-offsetof(MicroBlazeCPU, env)
+offsetof(CPUState, halted));
@@ -1401,8 +1396,8 @@ static bool trans_mts(DisasContext *dc, arg_mts *arg)
case 0x1004: /* TLBHI */
case 0x1005: /* TLBSX */
{
- TCGv_i32 tmp_ext = tcg_const_i32(arg->e);
- TCGv_i32 tmp_reg = tcg_const_i32(arg->rs & 7);
+ TCGv_i32 tmp_ext = tcg_constant_i32(arg->e);
+ TCGv_i32 tmp_reg = tcg_constant_i32(arg->rs & 7);
gen_helper_mmu_write(cpu_env, tmp_ext, tmp_reg, src);
}
@@ -1487,8 +1482,8 @@ static bool trans_mfs(DisasContext *dc, arg_mfs *arg)
case 0x1004: /* TLBHI */
case 0x1005: /* TLBSX */
{
- TCGv_i32 tmp_ext = tcg_const_i32(arg->e);
- TCGv_i32 tmp_reg = tcg_const_i32(arg->rs & 7);
+ TCGv_i32 tmp_ext = tcg_constant_i32(arg->e);
+ TCGv_i32 tmp_reg = tcg_constant_i32(arg->rs & 7);
gen_helper_mmu_read(dest, cpu_env, tmp_ext, tmp_reg);
}
@@ -1555,7 +1550,7 @@ static bool do_get(DisasContext *dc, int rd, int rb, int imm, int ctrl)
tcg_gen_movi_i32(t_id, imm);
}
- t_ctrl = tcg_const_i32(ctrl);
+ t_ctrl = tcg_constant_i32(ctrl);
gen_helper_get(reg_for_write(dc, rd), t_id, t_ctrl);
return true;
}
@@ -1585,7 +1580,7 @@ static bool do_put(DisasContext *dc, int ra, int rb, int imm, int ctrl)
tcg_gen_movi_i32(t_id, imm);
}
- t_ctrl = tcg_const_i32(ctrl);
+ t_ctrl = tcg_constant_i32(ctrl);
gen_helper_put(t_id, t_ctrl, reg_for_read(dc, ra));
return true;
}
--
2.34.1
next prev parent reply other threads:[~2023-02-27 8:09 UTC|newest]
Thread overview: 140+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-27 5:41 [PATCH 00/70] tcg: Remove tcg_const_* Richard Henderson
2023-02-27 5:41 ` [PATCH 01/70] target/arm: Use rmode >= 0 for need_rmode Richard Henderson
2023-03-06 13:54 ` Philippe Mathieu-Daudé
2023-03-06 13:56 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 02/70] target/arm: Handle FPROUNDING_ODD in arm_rmode_to_sf Richard Henderson
2023-02-27 5:41 ` [PATCH 03/70] target/arm: Improve arm_rmode_to_sf Richard Henderson
2023-03-06 14:00 ` Philippe Mathieu-Daudé
2023-03-06 19:20 ` Richard Henderson
2023-02-27 5:41 ` [PATCH 04/70] target/arm: Consistently use ARMFPRounding during translation Richard Henderson
2023-03-06 13:58 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 05/70] target/arm: Create gen_set_rmode, gen_restore_rmode Richard Henderson
2023-02-27 5:41 ` [PATCH 06/70] target/arm: Improve trans_BFCI Richard Henderson
2023-02-27 5:41 ` [PATCH 07/70] target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str} Richard Henderson
2023-03-06 15:11 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 08/70] target/arm: Avoid tcg_const_* in translate-mve.c Richard Henderson
2023-02-27 5:41 ` [PATCH 09/70] target/arm: Avoid tcg_const_ptr in disas_simd_zip_trn Richard Henderson
2023-02-27 5:41 ` [PATCH 10/70] target/arm: Avoid tcg_const_ptr in handle_vec_simd_sqshrn Richard Henderson
2023-03-06 15:15 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 11/70] target/arm: Avoid tcg_const_ptr in handle_rev Richard Henderson
2023-03-06 15:22 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 12/70] target/avr: Avoid use of tcg_const_i32 in SBIC, SBIS Richard Henderson
2023-03-06 13:51 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 13/70] target/avr: Avoid use of tcg_const_i32 throughout Richard Henderson
2023-03-06 23:49 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 14/70] target/cris: " Richard Henderson
2023-03-07 0:30 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 15/70] target/hexagon: Use tcg_constant_* for gen_constant_from_imm Richard Henderson
2023-02-27 21:55 ` Taylor Simpson
2023-02-27 5:41 ` [PATCH 16/70] target/hexagon/idef-parser: Use gen_tmp for LPCFG Richard Henderson
2023-02-27 21:55 ` Taylor Simpson
2023-02-27 5:41 ` [PATCH 17/70] target/hexagon/idef-parser: Use gen_tmp for gen_pred_assign Richard Henderson
2023-02-27 21:55 ` Taylor Simpson
2023-02-27 5:41 ` [PATCH 18/70] target/hexagon/idef-parser: Use gen_tmp for gen_rvalue_pred Richard Henderson
2023-02-27 21:55 ` Taylor Simpson
2023-02-27 5:41 ` [PATCH 19/70] target/hexagon/idef-parser: Use gen_constant for gen_extend_tcg_width_op Richard Henderson
2023-02-27 21:55 ` Taylor Simpson
2023-02-27 22:00 ` Richard Henderson
2023-02-27 22:38 ` Taylor Simpson
2023-02-27 5:41 ` [PATCH 20/70] target/hppa: Avoid tcg_const_i64 in trans_fid_f Richard Henderson
2023-03-06 13:50 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 21/70] target/hppa: Avoid use of tcg_const_i32 throughout Richard Henderson
2023-03-06 23:51 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 22/70] target/i386: Simplify POPF Richard Henderson
2023-02-27 9:04 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 23/70] target/i386: Avoid use of tcg_const_* throughout Richard Henderson
2023-03-07 0:37 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 24/70] target/m68k: Reject immediate as destination in gen_ea_mode Richard Henderson
2023-02-27 5:41 ` [PATCH 25/70] target/m68k: Use tcg_constant_i32 " Richard Henderson
2023-03-06 14:14 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 26/70] target/m68k: Avoid tcg_const_i32 when modified Richard Henderson
2023-03-06 23:53 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 27/70] target/m68k: Avoid tcg_const_i32 in bfop_reg Richard Henderson
2023-03-07 0:03 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 28/70] target/m68k: Avoid tcg_const_* throughout Richard Henderson
2023-03-06 23:59 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` Richard Henderson [this message]
2023-02-27 8:56 ` [PATCH 29/70] target/microblaze: " Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 30/70] target/mips: Split out gen_lxl Richard Henderson
2023-03-06 13:31 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 31/70] target/mips: Split out gen_lxr Richard Henderson
2023-03-06 13:40 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 32/70] target/mips: Avoid tcg_const_tl in gen_r6_ld Richard Henderson
2023-03-06 13:41 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 33/70] target/mips: Avoid tcg_const_* throughout Richard Henderson
2023-03-06 13:46 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 34/70] target/ppc: Split out gen_vx_vmul10 Richard Henderson
2023-03-06 15:08 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 35/70] target/ppc: Avoid tcg_const_i64 in do_vector_shift_quad Richard Henderson
2023-03-06 14:16 ` Philippe Mathieu-Daudé
2023-02-27 5:41 ` [PATCH 36/70] target/ppc: Avoid tcg_const_i64 in do_vcntmb Richard Henderson
2023-02-27 5:42 ` [PATCH 37/70] target/ppc: Avoid tcg_const_* in vmx-impl.c.inc Richard Henderson
2023-02-27 5:42 ` [PATCH 38/70] target/ppc: Avoid tcg_const_* in xxeval Richard Henderson
2023-02-27 5:42 ` [PATCH 39/70] target/ppc: Avoid tcg_const_* in vsx-impl.c.inc Richard Henderson
2023-02-27 5:42 ` [PATCH 40/70] target/ppc: Avoid tcg_const_* in fp-impl.c.inc Richard Henderson
2023-02-27 5:42 ` [PATCH 41/70] target/ppc: Avoid tcg_const_* in power8-pmu-regs.c.inc Richard Henderson
2023-02-27 5:42 ` [PATCH 42/70] target/ppc: Rewrite trans_ADDG6S Richard Henderson
2023-02-27 5:42 ` [PATCH 43/70] target/ppc: Fix gen_tlbsx_booke206 Richard Henderson
2023-02-27 5:42 ` [PATCH 44/70] target/ppc: Avoid tcg_const_* in translate.c Richard Henderson
2023-02-27 5:42 ` [PATCH 45/70] target/riscv: Avoid tcg_const_* Richard Henderson
2023-02-27 9:05 ` Philippe Mathieu-Daudé
2023-03-06 13:53 ` liweiwei
2023-02-27 5:42 ` [PATCH 46/70] target/rx: Use tcg_gen_abs_i32 Richard Henderson
2023-03-06 13:48 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 47/70] target/rx: Use cpu_psw_z as temp in flags computation Richard Henderson
2023-03-07 0:32 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 48/70] target/rx: Avoid tcg_const_i32 when new temp needed Richard Henderson
2023-03-06 14:18 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 49/70] target/rx: Avoid tcg_const_i32 Richard Henderson
2023-03-07 0:27 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 50/70] target/s390x: Split out gen_ri2 Richard Henderson
2023-02-27 9:09 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 51/70] target/s390x: Avoid tcg_const_i64 Richard Henderson
2023-03-07 0:21 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 52/70] target/sh4: Avoid tcg_const_i32 for TAS.B Richard Henderson
2023-03-07 0:23 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 53/70] target/sh4: Avoid tcg_const_i32 Richard Henderson
2023-03-07 0:21 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 54/70] tcg/sparc: Avoid tcg_const_tl in gen_edge Richard Henderson
2023-03-06 15:36 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 55/70] target/sparc: Avoid tcg_const_{tl,i32} Richard Henderson
2023-03-01 17:02 ` Mark Cave-Ayland
2023-03-06 15:37 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 56/70] target/tricore: Split t_n as constant from temp as variable Richard Henderson
2023-03-07 0:19 ` Philippe Mathieu-Daudé
2023-03-07 2:24 ` Richard Henderson
2023-03-07 10:20 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 57/70] target/tricore: Rename t_off10 and use tcg_constant_i32 Richard Henderson
2023-03-06 15:38 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 58/70] target/tricore: Use min/max for saturate Richard Henderson
2023-02-27 5:53 ` Richard Henderson
2023-02-27 5:42 ` [PATCH 59/70] target/tricore: Use setcondi instead of explicit allocation Richard Henderson
2023-03-06 15:39 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 60/70] target/tricore: Drop some temp initialization Richard Henderson
2023-03-06 15:25 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 61/70] target/tricore: Avoid tcg_const_i32 Richard Henderson
2023-03-07 0:10 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 62/70] target/xtensa: Tidy translate_bb Richard Henderson
2023-02-27 9:19 ` Max Filippov
2023-03-07 0:07 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 63/70] target/xtensa: Tidy translate_clamps Richard Henderson
2023-02-27 9:22 ` Max Filippov
2023-03-07 0:24 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 64/70] target/xtensa: Avoid tcg_const_i32 in translate_l32r Richard Henderson
2023-02-27 9:23 ` Max Filippov
2023-03-06 15:01 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 65/70] target/xtensa: Use tcg_gen_subfi_i32 in translate_sll Richard Henderson
2023-02-27 9:26 ` Max Filippov
2023-03-06 15:01 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 66/70] target/xtensa: Split constant in bit shift Richard Henderson
2023-02-27 9:27 ` Max Filippov
2023-03-06 15:01 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 67/70] target/xtensa: Avoid tcg_const_i32 Richard Henderson
2023-02-27 9:31 ` Max Filippov
2023-03-07 0:06 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 68/70] tcg: Replace tcg_const_i64 in tcg-op.c Richard Henderson
2023-03-06 15:33 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 69/70] tcg: Drop tcg_const_*_vec Richard Henderson
2023-03-06 15:32 ` Philippe Mathieu-Daudé
2023-02-27 5:42 ` [PATCH 70/70] tcg: Drop tcg_const_* Richard Henderson
2023-03-06 15:30 ` Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230227054233.390271-30-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=ale@rev.ng \
--cc=edgar.iglesias@gmail.com \
--cc=gaosong@loongson.cn \
--cc=jcmvbkbc@gmail.com \
--cc=jiaxun.yang@flygoat.com \
--cc=kbastian@mail.uni-paderborn.de \
--cc=mrolnik@gmail.com \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=qemu-s390x@nongnu.org \
--cc=tsimpson@quicinc.com \
--cc=ysato@users.sourceforge.jp \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).