* [PULL 000/123] Buildsys / QOM / QDev / UI patches for 2023-02-27
@ 2023-02-27 12:36 Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 001/123] cpu: Remove capstone meson dependency Philippe Mathieu-Daudé
` (10 more replies)
0 siblings, 11 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-02-27 12:36 UTC (permalink / raw)
To: qemu-devel
Cc: Michael S. Tsirkin, Peter Maydell, John Snow, Paolo Bonzini,
Philippe Mathieu-Daudé
Hi Peter,
I apologize for the size of this request, I was hoping various
series would go via other tree, but everybody has been quite busy
and the freezing windows is close, so I'm sending a huge mixed
patchset here.
The following changes since commit b11728dc3ae67ddedf34b7a4f318170e7092803c:
Merge tag 'pull-riscv-to-apply-20230224' of github.com:palmer-dabbelt/qemu into staging (2023-02-26 20:14:46 +0000)
are available in the Git repository at:
https://github.com/philmd/qemu.git tags/buildsys-qom-qdev-ui-20230227
for you to fetch changes up to 44efb54240815652e18b8a8eacdd715b3b051168:
ui/cocoa: user friendly characters for release mouse (2023-02-27 13:14:15 +0100)
----------------------------------------------------------------
Mixed bag of various patches all over the tree:
- buildsys
- Various header cleaned up (removing pointless headers)
- Mark various files/code user/system specific
- Make various objects target-independent
- Remove tswapN() calls from dump.o
- Suggest g_assert_not_reached() instead of assert(0)
- qdev / qom
- Replace various container_of() by QOM cast macros
- Declare some QOM macros using OBJECT_DECLARE_TYPE()
- Embed OHCI QOM child in SM501 chipset
- hw (ISA & IDE)
- add some documentation, improve function names
- un-inline, open-code few functions
- have ISA API accessing IRQ/DMA prefer ISABus over ISADevice
- Demote IDE subsystem maintenance to "Odd Fixes"
- ui: Improve Ctrl+Alt hint on Darwin Cocoa
----------------------------------------------------------------
BALATON Zoltan (5):
hw/usb/ohci: Code style fix comments
hw/usb/ohci: Code style fix white space errors
hw/usb/ohci: Code style fix missing braces and extra parenthesis
hw/usb/ohci: Move a function next to where it is used
hw/usb/ohci: Add trace points for register access
Bernhard Beschow (15):
target/loongarch/cpu: Remove unused "sysbus.h" header
hw/i386/ich9: Rename Q35_MASK to ICH9_MASK
hw/isa/lpc_ich9: Unexport PIRQ functions
hw/isa/lpc_ich9: Eliminate ICH9LPCState::isa_bus
hw/i2c/smbus_ich9: Move ich9_smb_set_irq() in front of
ich9_smbus_realize()
hw/i2c/smbus_ich9: Inline ich9_smb_init() and remove it
hw/i386/pc_q35: Allow for setting properties before realizing
TYPE_ICH9_LPC_DEVICE
hw/isa/lpc_ich9: Connect PM stuff to LPC internally
hw/isa/lpc_ich9: Remove redundant ich9_lpc_reset() invocation
hw/i386/ich9: Remove redundant GSI_NUM_PINS
hw: Move ioapic*.h to intc/
hw/i386/ich9: Clean up includes
hw: Move ich9.h to southbridge/
hw/ide/pci: Unexport bmdma_active_if()
hw/ide/pci: Add PCIIDEState::isa_irq[]
Christian Schoenebeck (1):
ui/cocoa: user friendly characters for release mouse
Fiona Ebner (1):
hw/ide/ahci: Trace ncq write command as write instead of read
John Snow (1):
MAINTAINERS: Mark IDE and Floppy as "Odd Fixes"
Mauro Matteo Cascella (1):
hw/nubus/nubus-device: Fix memory leak in nubus_device_realize
Philippe Mathieu-Daudé (98):
cpu: Remove capstone meson dependency
cpu: Move breakpoint helpers to common code
cputlb: Restrict SavedIOTLB to system emulation
gdbstub: Use vaddr type for generic insert/remove_breakpoint() API
target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu
target/cpu: Restrict do_transaction_failed() handlers to sysemu
target/i386: Remove NEED_CPU_H guard from target-specific headers
target/i386/cpu: Remove dead helper_lock() declaration
target/i386: Remove x86_cpu_dump_local_apic_state() dead stub
target/hppa: Extract FPU helpers to fpu_helper.c
target/hppa: Extract system helpers to sys_helper.c
target/alpha: Remove obsolete STATUS document
target/loongarch/cpu: Restrict "memory.h" header to sysemu
target/ppc/internal: Restrict MMU declarations to sysemu
target/ppc/kvm: Remove unused "sysbus.h" header
target/riscv/cpu: Move Floating-Point fields closer
target/sparc/sysemu: Remove pointless CONFIG_USER_ONLY guard
target/xtensa/cpu: Include missing "memory.h" header
target/tricore: Remove unused fields from CPUTriCoreState
qom/object_interfaces: Fix QAPI headers included
trace: Do not try to include QMP commands in user emulation binaries
exec: Remove unused 'qemu/timer.h' timer
tcg: Silent -Wmissing-field-initializers warning
tcg/tcg-op-gvec: Remove unused "qemu/main-loop.h" header
accel/tcg: Restrict 'qapi-commands-machine.h' to system emulation
accel/xen: Remove dead code
accel/kvm: Silent -Wmissing-field-initializers warning
sysemu/kvm: Remove CONFIG_USER_ONLY guard
replay: Extract core API to 'exec/replay-core.h'
tests/unit: Restrict machine-smp.c test to system emulation
softmmu: Silent -Wmissing-field-initializers warning
softmmu: Extract watchpoint API from physmem.c
qemu/typedefs: Sort in case-insensitive alphabetical order (again)
hw/qdev: Constify DeviceState* argument of qdev_get_parent_bus()
hw/cpu: Extend CPUState::cluster_index documentation
hw/i386/x86: Reduce init_topo_info() scope
hw/pci: Fix a typo
hw/intc/i8259: Document i8259_init()
hw/isa/i82378: Rename output IRQ as 'cpu_intr'
hw/isa/i82378: Remove intermediate IRQ forwarder
hw/isa/vt82c686: Remove intermediate IRQ forwarder
hw/sparc64/sun4u: Keep reference to ISA input IRQs in EbusState
hw/isa: Remove empty ISADeviceClass structure
hw/isa: Reorder to separate ISABus* vs ISADevice* functions
hw/isa: Un-inline isa_bus_from_device()
hw/isa: Rename isa_bus_irqs() -> isa_bus_register_input_irqs()
hw/isa: Use isa_address_space_io() to reduce access on global 'isabus'
hw/isa: Rename isa_get_dma() -> isa_bus_get_dma()
hw/isa: Factor isa_bus_get_irq() out of isa_get_irq()
hw: Replace isa_get_irq() by isa_bus_get_irq() when ISABus is
available
hw/rtc/mc146818rtc: Rename RTCState -> MC146818RtcState
hw/rtc/mc146818rtc: Pass MC146818RtcState instead of ISADevice
argument
hw/rtc: Rename rtc_[get|set]_memory -> mc146818rtc_[get|set]_cmos_data
hw/timer/hpet: Include missing 'hw/qdev-properties.h' header
hw/audio/hda-codec: Avoid forward-declaring HDAAudioState
hw/audio/es1370: Avoid forward-declaring ES1370State
hw/audio/es1370: Replace container_of() by ES1370() QOM cast macro
hw/audio/ac97: Replace container_of() by AC97() QOM cast macro
hw/usb/dev-smartcard-reader: Avoid forward-declaring CCIDBus
hw/usb/u2f: Declare QOM macros using OBJECT_DECLARE_TYPE()
hw/usb/ohci: Include missing 'sysbus.h' header
hw/usb/ohci: Use OHCIState type definition
hw/usb/ohci: Fix typo
hw/usb/uhci: Declare QOM macros using OBJECT_DECLARE_TYPE()
hw/usb/uhci: Replace container_of() by UHCI_GET_CLASS() QOM macro
hw/usb/xhci-nec: Declare QOM macros for NEC_XHCI
hw/usb/xhci-nec: Replace container_of() by NEC_XHCI() QOM cast macro
hw/display/sm501: Embed OHCI QOM child in chipset
hw/display/sm501: Alias 'dma-offset' QOM property in chipset object
hw/display/sm501: Unify common QOM properties
block/vvfat: Remove pointless check of NDEBUG
scripts/checkpatch.pl: Do not allow assert(0)
hw/i386/xen: Remove unused 'hw/ide.h' include from header
hw/ide/mmio: Use CamelCase for MMIO_IDE state name
hw/ide/mmio: Extract TYPE_MMIO_IDE declarations to 'hw/ide/mmio.h'
hw/ide/isa: Extract TYPE_ISA_IDE declarations to 'hw/ide/isa.h'
hw/ide/isa: Remove intermediate ISAIDEState::irq variable
hw/ide/atapi: Restrict 'scsi/constants.h' inclusion
hw/ide: Remove unused 'qapi/qapi-types-run-state.h'
hw/ide: Include 'exec/ioport.h' instead of 'hw/isa/isa.h'
hw/ide: Un-inline ide_set_irq()
hw/ide: Rename ide_set_irq() -> ide_bus_set_irq()
hw/ide: Rename ide_create_drive() -> ide_bus_create_drive()
hw/ide: Rename ide_register_restart_cb -> ide_bus_register_restart_cb
hw/ide: Rename ide_exec_cmd() -> ide_bus_exec_cmd()
hw/ide: Rename ide_init2() -> ide_bus_init_output_irq()
hw/ide: Rename idebus_active_if() -> ide_bus_active_if()
hw/ide: Declare ide_get_[geometry/bios_chs_trans] in
'hw/ide/internal.h'
hw/ide/ioport: Remove unnecessary includes
hw/ide/piix: Remove unused includes
hw/ide/piix: Pass Error* to pci_piix_init_ports() for better error msg
hw/ide/piix: Refactor pci_piix_init_ports as pci_piix_init_bus per bus
hw/ide/via: Replace magic 2 value by ARRAY_SIZE / MAX_IDE_DEVS
dump: Replace tswapN() -> cpu_to_dumpN()
dump: Replace TARGET_PAGE_SIZE -> qemu_target_page_size()
dump: Clean included headers
dump: Simplify compiling win_dump.o by introducing
win_dump_available()
dump: Add create_win_dump() stub for non-x86 targets
Pierrick Bouvier (1):
target/ppc: Fix warning with clang-15
MAINTAINERS | 8 +-
accel/kvm/kvm-all.c | 8 +-
accel/kvm/kvm-cpus.h | 4 +-
accel/tcg/cpu-exec.c | 91 +---
accel/tcg/hmp.c | 14 -
accel/tcg/internal.h | 3 +
accel/tcg/meson.build | 2 +-
accel/tcg/monitor.c | 105 ++++
accel/tcg/tcg-accel-ops.c | 17 +-
accel/tcg/tcg-all.c | 2 +-
accel/tcg/translate-all.c | 1 -
accel/tcg/translator.c | 2 +-
accel/tcg/user-exec-stub.c | 2 +-
accel/xen/xen-all.c | 10 -
block/vvfat.c | 3 -
cpu.c | 73 +--
cpus-common.c | 72 +++
dump/dump-hmp-cmds.c | 2 +-
dump/dump.c | 35 +-
dump/meson.build | 6 +-
dump/win_dump.c | 38 +-
dump/win_dump.h | 5 +-
gdbstub/gdbstub.c | 3 +-
gdbstub/internals.h | 6 +-
gdbstub/softmmu.c | 5 +-
gdbstub/user.c | 5 +-
hw/acpi/ich9.c | 10 +-
hw/acpi/ich9_tco.c | 2 +-
hw/arm/sbsa-ref.c | 2 +-
hw/audio/ac97.c | 2 +-
hw/audio/cs4231a.c | 5 +-
hw/audio/es1370.c | 10 +-
hw/audio/gus.c | 5 +-
hw/audio/hda-codec.c | 7 +-
hw/audio/sb16.c | 7 +-
hw/block/fdc-isa.c | 5 +-
hw/core/ptimer.c | 2 +-
hw/core/qdev.c | 2 +-
hw/display/sm501.c | 33 +-
hw/dma/i82374.c | 2 +-
hw/hppa/machine.c | 2 +-
hw/i2c/smbus_ich9.c | 39 +-
hw/i386/acpi-build.c | 3 +-
hw/i386/kvm/ioapic.c | 3 +-
hw/i386/microvm.c | 30 +-
hw/i386/pc.c | 83 +--
hw/i386/pc_piix.c | 3 +-
hw/i386/pc_q35.c | 34 +-
hw/i386/x86.c | 10 +-
hw/i386/xen/xen_platform.c | 1 -
hw/ide/ahci.c | 13 +-
hw/ide/atapi.c | 13 +-
hw/ide/cmd646.c | 4 +-
hw/ide/core.c | 80 +--
hw/ide/ich.c | 1 +
hw/ide/ioport.c | 10 -
hw/ide/isa.c | 22 +-
hw/ide/macio.c | 15 +-
hw/ide/microdrive.c | 9 +-
hw/ide/mmio.c | 37 +-
hw/ide/pci.c | 11 +-
hw/ide/piix.c | 46 +-
hw/ide/qdev.c | 2 +-
hw/ide/sii3112.c | 4 +-
hw/ide/trace-events | 3 +-
hw/ide/via.c | 16 +-
hw/intc/apic.c | 2 +-
hw/intc/i8259.c | 4 +-
hw/intc/ioapic.c | 4 +-
hw/intc/ioapic_common.c | 4 +-
.../hw/i386 => hw/intc}/ioapic_internal.h | 8 +-
hw/isa/i82378.c | 19 +-
hw/isa/isa-bus.c | 32 +-
hw/isa/lpc_ich9.c | 36 +-
hw/isa/piix4.c | 4 +-
hw/isa/vt82c686.c | 18 +-
hw/mips/jazz.c | 2 +-
hw/misc/macio/gpio.c | 1 +
hw/nubus/nubus-device.c | 1 +
hw/pci-bridge/i82801b11.c | 2 +-
hw/pci/pci.c | 2 +-
hw/ppc/pnv_lpc.c | 2 +-
hw/ppc/prep.c | 11 +-
hw/rtc/m48t59-isa.c | 2 +-
hw/rtc/mc146818rtc.c | 125 +++--
hw/sh4/r2d.c | 4 +-
hw/sparc64/sun4u.c | 13 +-
hw/timer/hpet.c | 1 +
hw/usb/dev-smartcard-reader.c | 7 +-
hw/usb/hcd-ohci.c | 436 ++++++++-------
hw/usb/hcd-ohci.h | 11 +-
hw/usb/hcd-uhci.c | 7 +-
hw/usb/hcd-uhci.h | 2 +-
hw/usb/hcd-xhci-nec.c | 8 +-
hw/usb/trace-events | 4 +
hw/usb/u2f.h | 16 +-
include/exec/gen-icount.h | 1 -
include/exec/replay-core.h | 76 +++
include/hw/acpi/ich9.h | 6 +-
include/hw/core/cpu.h | 10 +-
include/hw/i386/x86.h | 6 +-
include/hw/ide.h | 12 -
include/hw/ide/internal.h | 29 +-
include/hw/ide/isa.h | 20 +
include/hw/ide/mmio.h | 26 +
include/hw/ide/pci.h | 7 +-
include/hw/intc/i8259.h | 10 +-
include/hw/{i386 => intc}/ioapic.h | 6 +-
include/hw/isa/i8259_internal.h | 2 +-
include/hw/isa/isa.h | 35 +-
include/hw/isa/superio.h | 2 +-
include/hw/qdev-core.h | 2 +-
include/hw/rtc/mc146818rtc.h | 14 +-
include/hw/{i386 => southbridge}/ich9.h | 35 +-
include/hw/timer/i8254.h | 3 +-
include/hw/timer/i8254_internal.h | 2 +-
include/qemu/typedefs.h | 10 +-
include/sysemu/accel-ops.h | 6 +-
include/sysemu/cpus.h | 1 -
include/sysemu/kvm.h | 2 -
include/sysemu/replay.h | 67 +--
meson.build | 3 +-
qom/object_interfaces.c | 2 +-
scripts/checkpatch.pl | 3 +
softmmu/meson.build | 3 +-
softmmu/physmem.c | 191 -------
softmmu/vl.c | 2 +-
softmmu/watchpoint.c | 220 ++++++++
stubs/replay.c | 2 +-
target/alpha/STATUS | 28 -
target/alpha/cpu.h | 2 +-
target/arm/cpu.h | 2 +-
target/arm/internals.h | 2 +
target/cris/cpu.h | 3 +-
target/hppa/cpu.h | 2 +-
target/hppa/fpu_helper.c | 450 ++++++++++++++++
target/hppa/meson.build | 2 +
target/hppa/op_helper.c | 504 ------------------
target/hppa/sys_helper.c | 99 ++++
target/i386/cpu-dump.c | 5 +-
target/i386/cpu.h | 12 +-
target/i386/hax/hax-i386.h | 2 -
target/i386/hvf/hvf-i386.h | 4 -
target/i386/whpx/whpx-all.c | 2 +-
target/loongarch/cpu.h | 3 +-
target/m68k/cpu.h | 4 +-
target/microblaze/cpu.h | 4 +-
target/nios2/cpu.h | 2 +-
target/openrisc/cpu.h | 3 +-
target/ppc/cpu.h | 2 +-
target/ppc/dfp_helper.c | 4 +-
target/ppc/internal.h | 5 +
target/ppc/kvm.c | 1 -
target/riscv/cpu.h | 18 +-
target/rx/cpu.h | 2 +-
target/rx/helper.c | 4 +-
target/sh4/cpu.h | 2 +-
target/sparc/cpu.h | 3 +-
target/sparc/mmu_helper.c | 2 -
target/tricore/cpu.h | 11 -
target/xtensa/cpu.c | 3 +
target/xtensa/cpu.h | 2 +-
tcg/tcg-common.c | 2 +-
tcg/tcg-op-gvec.c | 1 -
tcg/tcg.c | 1 -
tests/qtest/tco-test.c | 2 +-
tests/unit/meson.build | 2 +-
tests/unit/ptimer-test-stubs.c | 2 +-
trace/meson.build | 4 +-
ui/cocoa.m | 7 +-
util/guest-random.c | 2 +-
171 files changed, 2028 insertions(+), 1903 deletions(-)
delete mode 100644 accel/tcg/hmp.c
create mode 100644 accel/tcg/monitor.c
rename {include/hw/i386 => hw/intc}/ioapic_internal.h (96%)
create mode 100644 include/exec/replay-core.h
create mode 100644 include/hw/ide/isa.h
create mode 100644 include/hw/ide/mmio.h
rename include/hw/{i386 => intc}/ioapic.h (93%)
rename include/hw/{i386 => southbridge}/ich9.h (91%)
create mode 100644 softmmu/watchpoint.c
delete mode 100644 target/alpha/STATUS
create mode 100644 target/hppa/fpu_helper.c
create mode 100644 target/hppa/sys_helper.c
--
2.38.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PULL 001/123] cpu: Remove capstone meson dependency
2023-02-27 12:36 [PULL 000/123] Buildsys / QOM / QDev / UI patches for 2023-02-27 Philippe Mathieu-Daudé
@ 2023-02-27 12:36 ` Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 002/123] cpu: Move breakpoint helpers to common code Philippe Mathieu-Daudé
` (9 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-02-27 12:36 UTC (permalink / raw)
To: qemu-devel
Cc: Michael S. Tsirkin, Peter Maydell, John Snow, Paolo Bonzini,
Philippe Mathieu-Daudé, Marc-André Lureau,
Daniel P. Berrangé, Thomas Huth
Only disas.c requires capstone CFLAGS, not cpu.c.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20221130135241.85060-2-philmd@linaro.org>
---
meson.build | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/meson.build b/meson.build
index 6cb2b1a42f..77d2ae87e4 100644
--- a/meson.build
+++ b/meson.build
@@ -3140,11 +3140,12 @@ if have_block
endif
common_ss.add(files('cpus-common.c'))
+specific_ss.add(files('cpu.c'))
subdir('softmmu')
common_ss.add(capstone)
-specific_ss.add(files('cpu.c', 'disas.c'), capstone)
+specific_ss.add(files('disas.c'), capstone)
# Work around a gcc bug/misfeature wherein constant propagation looks
# through an alias:
--
2.38.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PULL 002/123] cpu: Move breakpoint helpers to common code
2023-02-27 12:36 [PULL 000/123] Buildsys / QOM / QDev / UI patches for 2023-02-27 Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 001/123] cpu: Remove capstone meson dependency Philippe Mathieu-Daudé
@ 2023-02-27 12:36 ` Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 003/123] cputlb: Restrict SavedIOTLB to system emulation Philippe Mathieu-Daudé
` (8 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-02-27 12:36 UTC (permalink / raw)
To: qemu-devel
Cc: Michael S. Tsirkin, Peter Maydell, John Snow, Paolo Bonzini,
Philippe Mathieu-Daudé, Richard Henderson, Eduardo Habkost,
Marcel Apfelbaum, Yanan Wang
This code is not target-specific.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221130135241.85060-4-philmd@linaro.org>
---
cpu.c | 71 --------------------------------------------------
cpus-common.c | 72 +++++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 72 insertions(+), 71 deletions(-)
diff --git a/cpu.c b/cpu.c
index 21cf809614..44df16231f 100644
--- a/cpu.c
+++ b/cpu.c
@@ -319,77 +319,6 @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
}
#endif
-/* Add a breakpoint. */
-int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
- CPUBreakpoint **breakpoint)
-{
- CPUClass *cc = CPU_GET_CLASS(cpu);
- CPUBreakpoint *bp;
-
- if (cc->gdb_adjust_breakpoint) {
- pc = cc->gdb_adjust_breakpoint(cpu, pc);
- }
-
- bp = g_malloc(sizeof(*bp));
-
- bp->pc = pc;
- bp->flags = flags;
-
- /* keep all GDB-injected breakpoints in front */
- if (flags & BP_GDB) {
- QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry);
- } else {
- QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry);
- }
-
- if (breakpoint) {
- *breakpoint = bp;
- }
-
- trace_breakpoint_insert(cpu->cpu_index, pc, flags);
- return 0;
-}
-
-/* Remove a specific breakpoint. */
-int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
-{
- CPUClass *cc = CPU_GET_CLASS(cpu);
- CPUBreakpoint *bp;
-
- if (cc->gdb_adjust_breakpoint) {
- pc = cc->gdb_adjust_breakpoint(cpu, pc);
- }
-
- QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
- if (bp->pc == pc && bp->flags == flags) {
- cpu_breakpoint_remove_by_ref(cpu, bp);
- return 0;
- }
- }
- return -ENOENT;
-}
-
-/* Remove a specific breakpoint by reference. */
-void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *bp)
-{
- QTAILQ_REMOVE(&cpu->breakpoints, bp, entry);
-
- trace_breakpoint_remove(cpu->cpu_index, bp->pc, bp->flags);
- g_free(bp);
-}
-
-/* Remove all matching breakpoints. */
-void cpu_breakpoint_remove_all(CPUState *cpu, int mask)
-{
- CPUBreakpoint *bp, *next;
-
- QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) {
- if (bp->flags & mask) {
- cpu_breakpoint_remove_by_ref(cpu, bp);
- }
- }
-}
-
/* enable or disable single step mode. EXCP_DEBUG is returned by the
CPU loop after each instruction */
void cpu_single_step(CPUState *cpu, int enabled)
diff --git a/cpus-common.c b/cpus-common.c
index 39f355de98..b0047e456f 100644
--- a/cpus-common.c
+++ b/cpus-common.c
@@ -23,6 +23,7 @@
#include "hw/core/cpu.h"
#include "sysemu/cpus.h"
#include "qemu/lockable.h"
+#include "trace/trace-root.h"
static QemuMutex qemu_cpu_list_lock;
static QemuCond exclusive_cond;
@@ -368,3 +369,74 @@ void process_queued_cpu_work(CPUState *cpu)
qemu_mutex_unlock(&cpu->work_mutex);
qemu_cond_broadcast(&qemu_work_cond);
}
+
+/* Add a breakpoint. */
+int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
+ CPUBreakpoint **breakpoint)
+{
+ CPUClass *cc = CPU_GET_CLASS(cpu);
+ CPUBreakpoint *bp;
+
+ if (cc->gdb_adjust_breakpoint) {
+ pc = cc->gdb_adjust_breakpoint(cpu, pc);
+ }
+
+ bp = g_malloc(sizeof(*bp));
+
+ bp->pc = pc;
+ bp->flags = flags;
+
+ /* keep all GDB-injected breakpoints in front */
+ if (flags & BP_GDB) {
+ QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry);
+ } else {
+ QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry);
+ }
+
+ if (breakpoint) {
+ *breakpoint = bp;
+ }
+
+ trace_breakpoint_insert(cpu->cpu_index, pc, flags);
+ return 0;
+}
+
+/* Remove a specific breakpoint. */
+int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
+{
+ CPUClass *cc = CPU_GET_CLASS(cpu);
+ CPUBreakpoint *bp;
+
+ if (cc->gdb_adjust_breakpoint) {
+ pc = cc->gdb_adjust_breakpoint(cpu, pc);
+ }
+
+ QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
+ if (bp->pc == pc && bp->flags == flags) {
+ cpu_breakpoint_remove_by_ref(cpu, bp);
+ return 0;
+ }
+ }
+ return -ENOENT;
+}
+
+/* Remove a specific breakpoint by reference. */
+void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *bp)
+{
+ QTAILQ_REMOVE(&cpu->breakpoints, bp, entry);
+
+ trace_breakpoint_remove(cpu->cpu_index, bp->pc, bp->flags);
+ g_free(bp);
+}
+
+/* Remove all matching breakpoints. */
+void cpu_breakpoint_remove_all(CPUState *cpu, int mask)
+{
+ CPUBreakpoint *bp, *next;
+
+ QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) {
+ if (bp->flags & mask) {
+ cpu_breakpoint_remove_by_ref(cpu, bp);
+ }
+ }
+}
--
2.38.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PULL 003/123] cputlb: Restrict SavedIOTLB to system emulation
2023-02-27 12:36 [PULL 000/123] Buildsys / QOM / QDev / UI patches for 2023-02-27 Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 001/123] cpu: Remove capstone meson dependency Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 002/123] cpu: Move breakpoint helpers to common code Philippe Mathieu-Daudé
@ 2023-02-27 12:36 ` Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 004/123] gdbstub: Use vaddr type for generic insert/remove_breakpoint() API Philippe Mathieu-Daudé
` (7 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-02-27 12:36 UTC (permalink / raw)
To: qemu-devel
Cc: Michael S. Tsirkin, Peter Maydell, John Snow, Paolo Bonzini,
Philippe Mathieu-Daudé, Richard Henderson, Eduardo Habkost,
Marcel Apfelbaum, Yanan Wang
Commit 2f3a57ee47 ("cputlb: ensure we save the IOTLB data in
case of reset") added the SavedIOTLB structure -- which is
system emulation specific -- in the generic CPUState structure.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221216215519.5522-3-philmd@linaro.org>
---
include/hw/core/cpu.h | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 671f041bec..56cbe9e678 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -222,7 +222,7 @@ struct CPUWatchpoint {
QTAILQ_ENTRY(CPUWatchpoint) entry;
};
-#ifdef CONFIG_PLUGIN
+#if defined(CONFIG_PLUGIN) && !defined(CONFIG_USER_ONLY)
/*
* For plugins we sometime need to save the resolved iotlb data before
* the memory regions get moved around by io_writex.
@@ -409,9 +409,11 @@ struct CPUState {
#ifdef CONFIG_PLUGIN
GArray *plugin_mem_cbs;
+#if !defined(CONFIG_USER_ONLY)
/* saved iotlb data from io_writex */
SavedIOTLB saved_iotlb;
-#endif
+#endif /* !CONFIG_USER_ONLY */
+#endif /* CONFIG_PLUGIN */
/* TODO Move common fields from CPUArchState here. */
int cpu_index;
--
2.38.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PULL 004/123] gdbstub: Use vaddr type for generic insert/remove_breakpoint() API
2023-02-27 12:36 [PULL 000/123] Buildsys / QOM / QDev / UI patches for 2023-02-27 Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2023-02-27 12:36 ` [PULL 003/123] cputlb: Restrict SavedIOTLB to system emulation Philippe Mathieu-Daudé
@ 2023-02-27 12:36 ` Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 005/123] target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu Philippe Mathieu-Daudé
` (6 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-02-27 12:36 UTC (permalink / raw)
To: qemu-devel
Cc: Michael S. Tsirkin, Peter Maydell, John Snow, Paolo Bonzini,
Philippe Mathieu-Daudé, Richard Henderson, Fabiano Rosas,
Alex Bennée, kvm
Both insert/remove_breakpoint() handlers are used in system and
user emulation. We can not use the 'hwaddr' type on user emulation,
we have to use 'vaddr' which is defined as "wide enough to contain
any #target_ulong virtual address".
gdbstub.c doesn't require to include "exec/hwaddr.h" anymore.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221216215519.5522-4-philmd@linaro.org>
---
accel/kvm/kvm-all.c | 4 ++--
accel/kvm/kvm-cpus.h | 4 ++--
accel/tcg/tcg-accel-ops.c | 4 ++--
gdbstub/gdbstub.c | 1 -
gdbstub/internals.h | 6 ++++--
gdbstub/softmmu.c | 5 ++---
gdbstub/user.c | 5 ++---
include/sysemu/accel-ops.h | 6 +++---
8 files changed, 17 insertions(+), 18 deletions(-)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 9b26582655..79b3d58a9c 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -3305,7 +3305,7 @@ bool kvm_supports_guest_debug(void)
return kvm_has_guest_debug;
}
-int kvm_insert_breakpoint(CPUState *cpu, int type, hwaddr addr, hwaddr len)
+int kvm_insert_breakpoint(CPUState *cpu, int type, vaddr addr, vaddr len)
{
struct kvm_sw_breakpoint *bp;
int err;
@@ -3343,7 +3343,7 @@ int kvm_insert_breakpoint(CPUState *cpu, int type, hwaddr addr, hwaddr len)
return 0;
}
-int kvm_remove_breakpoint(CPUState *cpu, int type, hwaddr addr, hwaddr len)
+int kvm_remove_breakpoint(CPUState *cpu, int type, vaddr addr, vaddr len)
{
struct kvm_sw_breakpoint *bp;
int err;
diff --git a/accel/kvm/kvm-cpus.h b/accel/kvm/kvm-cpus.h
index fd63fe6a59..ca40add32c 100644
--- a/accel/kvm/kvm-cpus.h
+++ b/accel/kvm/kvm-cpus.h
@@ -19,8 +19,8 @@ void kvm_cpu_synchronize_post_reset(CPUState *cpu);
void kvm_cpu_synchronize_post_init(CPUState *cpu);
void kvm_cpu_synchronize_pre_loadvm(CPUState *cpu);
bool kvm_supports_guest_debug(void);
-int kvm_insert_breakpoint(CPUState *cpu, int type, hwaddr addr, hwaddr len);
-int kvm_remove_breakpoint(CPUState *cpu, int type, hwaddr addr, hwaddr len);
+int kvm_insert_breakpoint(CPUState *cpu, int type, vaddr addr, vaddr len);
+int kvm_remove_breakpoint(CPUState *cpu, int type, vaddr addr, vaddr len);
void kvm_remove_all_breakpoints(CPUState *cpu);
#endif /* KVM_CPUS_H */
diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c
index 19cbf1db3a..d9228fd403 100644
--- a/accel/tcg/tcg-accel-ops.c
+++ b/accel/tcg/tcg-accel-ops.c
@@ -116,7 +116,7 @@ static inline int xlat_gdb_type(CPUState *cpu, int gdbtype)
return cputype;
}
-static int tcg_insert_breakpoint(CPUState *cs, int type, hwaddr addr, hwaddr len)
+static int tcg_insert_breakpoint(CPUState *cs, int type, vaddr addr, vaddr len)
{
CPUState *cpu;
int err = 0;
@@ -147,7 +147,7 @@ static int tcg_insert_breakpoint(CPUState *cs, int type, hwaddr addr, hwaddr len
}
}
-static int tcg_remove_breakpoint(CPUState *cs, int type, hwaddr addr, hwaddr len)
+static int tcg_remove_breakpoint(CPUState *cs, int type, vaddr addr, vaddr len)
{
CPUState *cpu;
int err = 0;
diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c
index be88ca0d71..c3fbc31123 100644
--- a/gdbstub/gdbstub.c
+++ b/gdbstub/gdbstub.c
@@ -48,7 +48,6 @@
#include "sysemu/runstate.h"
#include "semihosting/semihost.h"
#include "exec/exec-all.h"
-#include "exec/hwaddr.h"
#include "sysemu/replay.h"
#include "internals.h"
diff --git a/gdbstub/internals.h b/gdbstub/internals.h
index eabb0341d1..b23999f951 100644
--- a/gdbstub/internals.h
+++ b/gdbstub/internals.h
@@ -9,9 +9,11 @@
#ifndef _INTERNALS_H_
#define _INTERNALS_H_
+#include "exec/cpu-common.h"
+
bool gdb_supports_guest_debug(void);
-int gdb_breakpoint_insert(CPUState *cs, int type, hwaddr addr, hwaddr len);
-int gdb_breakpoint_remove(CPUState *cs, int type, hwaddr addr, hwaddr len);
+int gdb_breakpoint_insert(CPUState *cs, int type, vaddr addr, vaddr len);
+int gdb_breakpoint_remove(CPUState *cs, int type, vaddr addr, vaddr len);
void gdb_breakpoint_remove_all(CPUState *cs);
#endif /* _INTERNALS_H_ */
diff --git a/gdbstub/softmmu.c b/gdbstub/softmmu.c
index f208c6cf15..129575e510 100644
--- a/gdbstub/softmmu.c
+++ b/gdbstub/softmmu.c
@@ -11,7 +11,6 @@
#include "qemu/osdep.h"
#include "exec/gdbstub.h"
-#include "exec/hwaddr.h"
#include "sysemu/cpus.h"
#include "internals.h"
@@ -24,7 +23,7 @@ bool gdb_supports_guest_debug(void)
return false;
}
-int gdb_breakpoint_insert(CPUState *cs, int type, hwaddr addr, hwaddr len)
+int gdb_breakpoint_insert(CPUState *cs, int type, vaddr addr, vaddr len)
{
const AccelOpsClass *ops = cpus_get_accel();
if (ops->insert_breakpoint) {
@@ -33,7 +32,7 @@ int gdb_breakpoint_insert(CPUState *cs, int type, hwaddr addr, hwaddr len)
return -ENOSYS;
}
-int gdb_breakpoint_remove(CPUState *cs, int type, hwaddr addr, hwaddr len)
+int gdb_breakpoint_remove(CPUState *cs, int type, vaddr addr, vaddr len)
{
const AccelOpsClass *ops = cpus_get_accel();
if (ops->remove_breakpoint) {
diff --git a/gdbstub/user.c b/gdbstub/user.c
index 033e5fdd71..484bd8f461 100644
--- a/gdbstub/user.c
+++ b/gdbstub/user.c
@@ -9,7 +9,6 @@
*/
#include "qemu/osdep.h"
-#include "exec/hwaddr.h"
#include "exec/gdbstub.h"
#include "hw/core/cpu.h"
#include "internals.h"
@@ -20,7 +19,7 @@ bool gdb_supports_guest_debug(void)
return true;
}
-int gdb_breakpoint_insert(CPUState *cs, int type, hwaddr addr, hwaddr len)
+int gdb_breakpoint_insert(CPUState *cs, int type, vaddr addr, vaddr len)
{
CPUState *cpu;
int err = 0;
@@ -41,7 +40,7 @@ int gdb_breakpoint_insert(CPUState *cs, int type, hwaddr addr, hwaddr len)
}
}
-int gdb_breakpoint_remove(CPUState *cs, int type, hwaddr addr, hwaddr len)
+int gdb_breakpoint_remove(CPUState *cs, int type, vaddr addr, vaddr len)
{
CPUState *cpu;
int err = 0;
diff --git a/include/sysemu/accel-ops.h b/include/sysemu/accel-ops.h
index 8cc7996def..30690c71bd 100644
--- a/include/sysemu/accel-ops.h
+++ b/include/sysemu/accel-ops.h
@@ -10,7 +10,7 @@
#ifndef ACCEL_OPS_H
#define ACCEL_OPS_H
-#include "exec/hwaddr.h"
+#include "exec/cpu-common.h"
#include "qom/object.h"
#define ACCEL_OPS_SUFFIX "-ops"
@@ -48,8 +48,8 @@ struct AccelOpsClass {
/* gdbstub hooks */
bool (*supports_guest_debug)(void);
- int (*insert_breakpoint)(CPUState *cpu, int type, hwaddr addr, hwaddr len);
- int (*remove_breakpoint)(CPUState *cpu, int type, hwaddr addr, hwaddr len);
+ int (*insert_breakpoint)(CPUState *cpu, int type, vaddr addr, vaddr len);
+ int (*remove_breakpoint)(CPUState *cpu, int type, vaddr addr, vaddr len);
void (*remove_all_breakpoints)(CPUState *cpu);
};
--
2.38.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PULL 005/123] target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu
2023-02-27 12:36 [PULL 000/123] Buildsys / QOM / QDev / UI patches for 2023-02-27 Philippe Mathieu-Daudé
` (3 preceding siblings ...)
2023-02-27 12:36 ` [PULL 004/123] gdbstub: Use vaddr type for generic insert/remove_breakpoint() API Philippe Mathieu-Daudé
@ 2023-02-27 12:36 ` Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 006/123] target/cpu: Restrict do_transaction_failed() " Philippe Mathieu-Daudé
` (5 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-02-27 12:36 UTC (permalink / raw)
To: qemu-devel
Cc: Michael S. Tsirkin, Peter Maydell, John Snow, Paolo Bonzini,
Philippe Mathieu-Daudé, Richard Henderson, Edgar E. Iglesias,
Laurent Vivier, Chris Wulff, Marek Vasut, Stafford Horne,
Daniel Henrique Barboza, Cédric Le Goater, David Gibson,
Greg Kurz, Palmer Dabbelt, Alistair Francis, Bin Meng, Weiwei Li,
Liu Zhiwei, Yoshinori Sato, Mark Cave-Ayland, Artyom Tarasenko,
Max Filippov, qemu-arm, qemu-ppc, qemu-riscv
The 'hwaddr' type is only available / meaningful on system emulation.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221216215519.5522-5-philmd@linaro.org>
---
target/alpha/cpu.h | 2 +-
target/arm/cpu.h | 2 +-
target/cris/cpu.h | 3 +--
target/hppa/cpu.h | 2 +-
target/i386/cpu.h | 5 ++---
target/m68k/cpu.h | 2 +-
target/microblaze/cpu.h | 4 ++--
target/nios2/cpu.h | 2 +-
target/openrisc/cpu.h | 3 ++-
target/ppc/cpu.h | 2 +-
target/riscv/cpu.h | 2 +-
target/rx/cpu.h | 2 +-
target/rx/helper.c | 4 ++--
target/sh4/cpu.h | 2 +-
target/sparc/cpu.h | 3 ++-
target/xtensa/cpu.h | 2 +-
16 files changed, 21 insertions(+), 21 deletions(-)
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index d0abc949a8..5e67304d81 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -276,9 +276,9 @@ extern const VMStateDescription vmstate_alpha_cpu;
void alpha_cpu_do_interrupt(CPUState *cpu);
bool alpha_cpu_exec_interrupt(CPUState *cpu, int int_req);
+hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
#endif /* !CONFIG_USER_ONLY */
void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags);
-hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 12b1082537..787121694c 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1104,10 +1104,10 @@ extern const VMStateDescription vmstate_arm_cpu;
void arm_cpu_do_interrupt(CPUState *cpu);
void arm_v7m_cpu_do_interrupt(CPUState *cpu);
-#endif /* !CONFIG_USER_ONLY */
hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
MemTxAttrs *attrs);
+#endif /* !CONFIG_USER_ONLY */
int arm_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int arm_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
diff --git a/target/cris/cpu.h b/target/cris/cpu.h
index e6776f25b1..71fa1f96e0 100644
--- a/target/cris/cpu.h
+++ b/target/cris/cpu.h
@@ -193,12 +193,11 @@ bool cris_cpu_exec_interrupt(CPUState *cpu, int int_req);
bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
+hwaddr cris_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
#endif
void cris_cpu_dump_state(CPUState *cs, FILE *f, int flags);
-hwaddr cris_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-
int crisv10_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int cris_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int cris_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 6f3b6beecf..b595ef25a9 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -322,11 +322,11 @@ static inline void cpu_hppa_change_prot_id(CPUHPPAState *env) { }
void cpu_hppa_change_prot_id(CPUHPPAState *env);
#endif
-hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr);
int hppa_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int hppa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void hppa_cpu_dump_state(CPUState *cs, FILE *f, int);
#ifndef CONFIG_USER_ONLY
+hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr);
bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index d4bc19577a..f729e0f09c 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1987,9 +1987,6 @@ void x86_cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
void x86_cpu_dump_state(CPUState *cs, FILE *f, int flags);
-hwaddr x86_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
- MemTxAttrs *attrs);
-
int x86_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int x86_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
@@ -1997,6 +1994,8 @@ void x86_cpu_list(void);
int cpu_x86_support_mca_broadcast(CPUX86State *env);
#ifndef CONFIG_USER_ONLY
+hwaddr x86_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
+ MemTxAttrs *attrs);
int cpu_get_pic_interrupt(CPUX86State *s);
/* MSDOS compatibility mode FPU exception support */
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 3a9cfe2f33..68ed531fc3 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -176,9 +176,9 @@ struct ArchCPU {
#ifndef CONFIG_USER_ONLY
void m68k_cpu_do_interrupt(CPUState *cpu);
bool m68k_cpu_exec_interrupt(CPUState *cpu, int int_req);
+hwaddr m68k_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
#endif /* !CONFIG_USER_ONLY */
void m68k_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
-hwaddr m68k_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
int m68k_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int m68k_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index e541fbb0b3..f66df02226 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -358,13 +358,13 @@ struct ArchCPU {
#ifndef CONFIG_USER_ONLY
void mb_cpu_do_interrupt(CPUState *cs);
bool mb_cpu_exec_interrupt(CPUState *cs, int int_req);
+hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
+ MemTxAttrs *attrs);
#endif /* !CONFIG_USER_ONLY */
G_NORETURN void mb_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
MMUAccessType access_type,
int mmu_idx, uintptr_t retaddr);
void mb_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
-hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
- MemTxAttrs *attrs);
int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
int mb_cpu_gdb_read_stack_protect(CPUArchState *cpu, GByteArray *buf, int reg);
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index b1a5549074..20042c4332 100644
--- a/target/nios2/cpu.h
+++ b/target/nios2/cpu.h
@@ -262,7 +262,6 @@ void nios2_tcg_init(void);
void nios2_cpu_do_interrupt(CPUState *cs);
void dump_mmu(CPUNios2State *env);
void nios2_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
-hwaddr nios2_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
G_NORETURN void nios2_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
MMUAccessType access_type, int mmu_idx,
uintptr_t retaddr);
@@ -288,6 +287,7 @@ static inline int cpu_mmu_index(CPUNios2State *env, bool ifetch)
}
#ifndef CONFIG_USER_ONLY
+hwaddr nios2_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
bool nios2_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index 5f60749705..f16e8b3274 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -312,7 +312,6 @@ struct ArchCPU {
void cpu_openrisc_list(void);
void openrisc_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
-hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
int openrisc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int openrisc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void openrisc_translate_init(void);
@@ -321,6 +320,8 @@ int print_insn_or1k(bfd_vma addr, disassemble_info *info);
#define cpu_list cpu_openrisc_list
#ifndef CONFIG_USER_ONLY
+hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+
bool openrisc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 3923f174f8..557d736dab 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1361,12 +1361,12 @@ static inline bool vhyp_cpu_in_nested(PowerPCCPU *cpu)
#endif /* CONFIG_USER_ONLY */
void ppc_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
-hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
int ppc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int ppc_cpu_gdb_read_register_apple(CPUState *cpu, GByteArray *buf, int reg);
int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
int ppc_cpu_gdb_write_register_apple(CPUState *cpu, uint8_t *buf, int reg);
#ifndef CONFIG_USER_ONLY
+hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
void ppc_gdb_gen_spr_xml(PowerPCCPU *cpu);
const char *ppc_gdb_get_dynamic_xml(CPUState *cs, const char *xml_name);
#endif
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 7128438d8e..df9cbc0d3f 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -573,7 +573,6 @@ bool riscv_cpu_virt_enabled(CPURISCVState *env);
void riscv_cpu_set_virt_enabled(CPURISCVState *env, bool enable);
bool riscv_cpu_two_stage_lookup(int mmu_idx);
int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch);
-hwaddr riscv_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
G_NORETURN void riscv_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
MMUAccessType access_type, int mmu_idx,
uintptr_t retaddr);
@@ -592,6 +591,7 @@ void riscv_cpu_list(void);
#define cpu_mmu_index riscv_cpu_mmu_index
#ifndef CONFIG_USER_ONLY
+hwaddr riscv_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
bool riscv_cpu_exec_interrupt(CPUState *cs, int interrupt_request);
void riscv_cpu_swap_hypervisor_regs(CPURISCVState *env);
int riscv_cpu_claim_interrupts(RISCVCPU *cpu, uint64_t interrupts);
diff --git a/target/rx/cpu.h b/target/rx/cpu.h
index 5655dffeff..555d230f24 100644
--- a/target/rx/cpu.h
+++ b/target/rx/cpu.h
@@ -123,11 +123,11 @@ const char *rx_crname(uint8_t cr);
#ifndef CONFIG_USER_ONLY
void rx_cpu_do_interrupt(CPUState *cpu);
bool rx_cpu_exec_interrupt(CPUState *cpu, int int_req);
+hwaddr rx_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
#endif /* !CONFIG_USER_ONLY */
void rx_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
int rx_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int rx_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-hwaddr rx_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
void rx_translate_init(void);
void rx_cpu_list(void);
diff --git a/target/rx/helper.c b/target/rx/helper.c
index f34945e7e2..dad5fb4976 100644
--- a/target/rx/helper.c
+++ b/target/rx/helper.c
@@ -144,9 +144,9 @@ bool rx_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
return false;
}
-#endif /* !CONFIG_USER_ONLY */
-
hwaddr rx_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
{
return addr;
}
+
+#endif /* !CONFIG_USER_ONLY */
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index 727b829598..02bfd612ea 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -214,7 +214,6 @@ struct ArchCPU {
void superh_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
-hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
int superh_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int superh_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
G_NORETURN void superh_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
@@ -225,6 +224,7 @@ void sh4_translate_init(void);
void sh4_cpu_list(void);
#if !defined(CONFIG_USER_ONLY)
+hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index e478c5eb16..ed0069d0b1 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -569,10 +569,11 @@ struct ArchCPU {
#ifndef CONFIG_USER_ONLY
extern const VMStateDescription vmstate_sparc_cpu;
+
+hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
#endif
void sparc_cpu_do_interrupt(CPUState *cpu);
-hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
int sparc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
int sparc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
G_NORETURN void sparc_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index 579adcb769..b7a54711a6 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -576,9 +576,9 @@ void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
unsigned size, MMUAccessType access_type,
int mmu_idx, MemTxAttrs attrs,
MemTxResult response, uintptr_t retaddr);
+hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
#endif
void xtensa_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
-hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
void xtensa_count_regs(const XtensaConfig *config,
unsigned *n_regs, unsigned *n_core_regs);
int xtensa_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
--
2.38.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PULL 006/123] target/cpu: Restrict do_transaction_failed() handlers to sysemu
2023-02-27 12:36 [PULL 000/123] Buildsys / QOM / QDev / UI patches for 2023-02-27 Philippe Mathieu-Daudé
` (4 preceding siblings ...)
2023-02-27 12:36 ` [PULL 005/123] target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu Philippe Mathieu-Daudé
@ 2023-02-27 12:36 ` Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 007/123] target/i386: Remove NEED_CPU_H guard from target-specific headers Philippe Mathieu-Daudé
` (4 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-02-27 12:36 UTC (permalink / raw)
To: qemu-devel
Cc: Michael S. Tsirkin, Peter Maydell, John Snow, Paolo Bonzini,
Philippe Mathieu-Daudé, Richard Henderson, Laurent Vivier,
Palmer Dabbelt, Alistair Francis, Bin Meng, Weiwei Li,
Daniel Henrique Barboza, Liu Zhiwei, qemu-arm, qemu-riscv
The 'hwaddr' type is only available / meaningful on system emulation.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221216215519.5522-6-philmd@linaro.org>
---
target/arm/internals.h | 2 ++
target/m68k/cpu.h | 2 ++
target/riscv/cpu.h | 10 +++++-----
3 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 759b70c646..2ad4fc4633 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -614,6 +614,7 @@ G_NORETURN void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
MMUAccessType access_type,
int mmu_idx, uintptr_t retaddr);
+#ifndef CONFIG_USER_ONLY
/* arm_cpu_do_transaction_failed: handle a memory system error response
* (eg "no device/memory present at address") by raising an external abort
* exception
@@ -623,6 +624,7 @@ void arm_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
MMUAccessType access_type,
int mmu_idx, MemTxAttrs attrs,
MemTxResult response, uintptr_t retaddr);
+#endif
/* Call any registered EL change hooks */
static inline void arm_call_pre_el_change_hook(ARMCPU *cpu)
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 68ed531fc3..048d5aae2b 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -581,10 +581,12 @@ static inline int cpu_mmu_index (CPUM68KState *env, bool ifetch)
bool m68k_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
+#ifndef CONFIG_USER_ONLY
void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
unsigned size, MMUAccessType access_type,
int mmu_idx, MemTxAttrs attrs,
MemTxResult response, uintptr_t retaddr);
+#endif
#include "exec/cpu-all.h"
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index df9cbc0d3f..d8e72c3e7c 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -579,11 +579,6 @@ G_NORETURN void riscv_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
-void riscv_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
- vaddr addr, unsigned size,
- MMUAccessType access_type,
- int mmu_idx, MemTxAttrs attrs,
- MemTxResult response, uintptr_t retaddr);
char *riscv_isa_string(RISCVCPU *cpu);
void riscv_cpu_list(void);
@@ -591,6 +586,11 @@ void riscv_cpu_list(void);
#define cpu_mmu_index riscv_cpu_mmu_index
#ifndef CONFIG_USER_ONLY
+void riscv_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
+ vaddr addr, unsigned size,
+ MMUAccessType access_type,
+ int mmu_idx, MemTxAttrs attrs,
+ MemTxResult response, uintptr_t retaddr);
hwaddr riscv_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
bool riscv_cpu_exec_interrupt(CPUState *cs, int interrupt_request);
void riscv_cpu_swap_hypervisor_regs(CPURISCVState *env);
--
2.38.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PULL 007/123] target/i386: Remove NEED_CPU_H guard from target-specific headers
2023-02-27 12:36 [PULL 000/123] Buildsys / QOM / QDev / UI patches for 2023-02-27 Philippe Mathieu-Daudé
` (5 preceding siblings ...)
2023-02-27 12:36 ` [PULL 006/123] target/cpu: Restrict do_transaction_failed() " Philippe Mathieu-Daudé
@ 2023-02-27 12:36 ` Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 008/123] target/i386/cpu: Remove dead helper_lock() declaration Philippe Mathieu-Daudé
` (3 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-02-27 12:36 UTC (permalink / raw)
To: qemu-devel
Cc: Michael S. Tsirkin, Peter Maydell, John Snow, Paolo Bonzini,
Philippe Mathieu-Daudé, Richard Henderson, Cameron Esfahani,
Roman Bolshakov
NEED_CPU_H is always defined for these target-specific headers.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221216220158.6317-2-philmd@linaro.org>
---
target/i386/hax/hax-i386.h | 2 --
target/i386/hvf/hvf-i386.h | 4 ----
2 files changed, 6 deletions(-)
diff --git a/target/i386/hax/hax-i386.h b/target/i386/hax/hax-i386.h
index efbb346238..409ebdb4af 100644
--- a/target/i386/hax/hax-i386.h
+++ b/target/i386/hax/hax-i386.h
@@ -49,7 +49,6 @@ struct hax_vm {
struct hax_vcpu_state **vcpus;
};
-#ifdef NEED_CPU_H
/* Functions exported to host specific mode */
hax_fd hax_vcpu_get_fd(CPUArchState *env);
int valid_hax_tunnel_size(uint16_t size);
@@ -66,7 +65,6 @@ int hax_sync_vcpu_state(CPUArchState *env, struct vcpu_state_t *state,
int set);
int hax_sync_msr(CPUArchState *env, struct hax_msr_data *msrs, int set);
int hax_sync_fpu(CPUArchState *env, struct fx_layout *fl, int set);
-#endif
int hax_vm_destroy(struct hax_vm *vm);
int hax_capability(struct hax_state *hax, struct hax_capabilityinfo *cap);
diff --git a/target/i386/hvf/hvf-i386.h b/target/i386/hvf/hvf-i386.h
index 76e9235524..95b47c1c2e 100644
--- a/target/i386/hvf/hvf-i386.h
+++ b/target/i386/hvf/hvf-i386.h
@@ -24,11 +24,7 @@
void hvf_handle_io(CPUArchState *, uint16_t, void *, int, int, int);
-#ifdef NEED_CPU_H
-/* Functions exported to host specific mode */
-
/* Host specific functions */
int hvf_inject_interrupt(CPUArchState *env, int vector);
-#endif
#endif
--
2.38.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PULL 008/123] target/i386/cpu: Remove dead helper_lock() declaration
2023-02-27 12:36 [PULL 000/123] Buildsys / QOM / QDev / UI patches for 2023-02-27 Philippe Mathieu-Daudé
` (6 preceding siblings ...)
2023-02-27 12:36 ` [PULL 007/123] target/i386: Remove NEED_CPU_H guard from target-specific headers Philippe Mathieu-Daudé
@ 2023-02-27 12:36 ` Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 009/123] target/i386: Remove x86_cpu_dump_local_apic_state() dead stub Philippe Mathieu-Daudé
` (2 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-02-27 12:36 UTC (permalink / raw)
To: qemu-devel
Cc: Michael S. Tsirkin, Peter Maydell, John Snow, Paolo Bonzini,
Philippe Mathieu-Daudé, Richard Henderson
Missed in commit 37b995f6e7 ("target-i386: remove helper_lock()").
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221216220158.6317-3-philmd@linaro.org>
---
target/i386/cpu.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index f729e0f09c..9824b7f8f2 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2313,9 +2313,6 @@ static inline void cpu_set_fpuc(CPUX86State *env, uint16_t fpuc)
}
}
-/* mem_helper.c */
-void helper_lock_init(void);
-
/* svm_helper.c */
#ifdef CONFIG_USER_ONLY
static inline void
--
2.38.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PULL 009/123] target/i386: Remove x86_cpu_dump_local_apic_state() dead stub
2023-02-27 12:36 [PULL 000/123] Buildsys / QOM / QDev / UI patches for 2023-02-27 Philippe Mathieu-Daudé
` (7 preceding siblings ...)
2023-02-27 12:36 ` [PULL 008/123] target/i386/cpu: Remove dead helper_lock() declaration Philippe Mathieu-Daudé
@ 2023-02-27 12:36 ` Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 010/123] target/hppa: Extract FPU helpers to fpu_helper.c Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 011/123] target/hppa: Extract system helpers to sys_helper.c Philippe Mathieu-Daudé
10 siblings, 0 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-02-27 12:36 UTC (permalink / raw)
To: qemu-devel
Cc: Michael S. Tsirkin, Peter Maydell, John Snow, Paolo Bonzini,
Philippe Mathieu-Daudé, Richard Henderson
x86_cpu_dump_local_apic_state() is called from monitor.c which
is only compiled for system emulation since commit bf95728400
("monitor: remove target-specific code from monitor.c").
Interestingly this stub was added few weeks later in commit
1f871d49e3 ("hmp: added local apic dump state") and was not
necessary by that time.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221216220158.6317-5-philmd@linaro.org>
---
target/i386/cpu-dump.c | 5 +----
target/i386/cpu.h | 4 ++++
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target/i386/cpu-dump.c b/target/i386/cpu-dump.c
index 08ac957e99..40697064d9 100644
--- a/target/i386/cpu-dump.c
+++ b/target/i386/cpu-dump.c
@@ -335,10 +335,7 @@ void x86_cpu_dump_local_apic_state(CPUState *cs, int flags)
}
qemu_printf(" PPR 0x%02x\n", apic_get_ppr(s));
}
-#else
-void x86_cpu_dump_local_apic_state(CPUState *cs, int flags)
-{
-}
+
#endif /* !CONFIG_USER_ONLY */
#define DUMP_CODE_BYTES_TOTAL 50
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 9824b7f8f2..32d048f326 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2355,12 +2355,16 @@ typedef int X86CPUVersion;
*/
void x86_cpu_set_default_version(X86CPUVersion version);
+#ifndef CONFIG_USER_ONLY
+
#define APIC_DEFAULT_ADDRESS 0xfee00000
#define APIC_SPACE_SIZE 0x100000
/* cpu-dump.c */
void x86_cpu_dump_local_apic_state(CPUState *cs, int flags);
+#endif
+
/* cpu.c */
bool cpu_is_bsp(X86CPU *cpu);
--
2.38.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PULL 010/123] target/hppa: Extract FPU helpers to fpu_helper.c
2023-02-27 12:36 [PULL 000/123] Buildsys / QOM / QDev / UI patches for 2023-02-27 Philippe Mathieu-Daudé
` (8 preceding siblings ...)
2023-02-27 12:36 ` [PULL 009/123] target/i386: Remove x86_cpu_dump_local_apic_state() dead stub Philippe Mathieu-Daudé
@ 2023-02-27 12:36 ` Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 011/123] target/hppa: Extract system helpers to sys_helper.c Philippe Mathieu-Daudé
10 siblings, 0 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-02-27 12:36 UTC (permalink / raw)
To: qemu-devel
Cc: Michael S. Tsirkin, Peter Maydell, John Snow, Paolo Bonzini,
Philippe Mathieu-Daudé, Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221217173219.8715-2-philmd@linaro.org>
---
target/hppa/fpu_helper.c | 450 +++++++++++++++++++++++++++++++++++++++
target/hppa/meson.build | 1 +
target/hppa/op_helper.c | 427 -------------------------------------
3 files changed, 451 insertions(+), 427 deletions(-)
create mode 100644 target/hppa/fpu_helper.c
diff --git a/target/hppa/fpu_helper.c b/target/hppa/fpu_helper.c
new file mode 100644
index 0000000000..576f283b04
--- /dev/null
+++ b/target/hppa/fpu_helper.c
@@ -0,0 +1,450 @@
+/*
+ * Helpers for HPPA FPU instructions.
+ *
+ * Copyright (c) 2016 Richard Henderson <rth@twiddle.net>
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "exec/exec-all.h"
+#include "exec/helper-proto.h"
+#include "fpu/softfloat.h"
+
+void HELPER(loaded_fr0)(CPUHPPAState *env)
+{
+ uint32_t shadow = env->fr[0] >> 32;
+ int rm, d;
+
+ env->fr0_shadow = shadow;
+
+ switch (extract32(shadow, 9, 2)) {
+ default:
+ rm = float_round_nearest_even;
+ break;
+ case 1:
+ rm = float_round_to_zero;
+ break;
+ case 2:
+ rm = float_round_up;
+ break;
+ case 3:
+ rm = float_round_down;
+ break;
+ }
+ set_float_rounding_mode(rm, &env->fp_status);
+
+ d = extract32(shadow, 5, 1);
+ set_flush_to_zero(d, &env->fp_status);
+ set_flush_inputs_to_zero(d, &env->fp_status);
+}
+
+void cpu_hppa_loaded_fr0(CPUHPPAState *env)
+{
+ helper_loaded_fr0(env);
+}
+
+#define CONVERT_BIT(X, SRC, DST) \
+ ((SRC) > (DST) \
+ ? (X) / ((SRC) / (DST)) & (DST) \
+ : ((X) & (SRC)) * ((DST) / (SRC)))
+
+static void update_fr0_op(CPUHPPAState *env, uintptr_t ra)
+{
+ uint32_t soft_exp = get_float_exception_flags(&env->fp_status);
+ uint32_t hard_exp = 0;
+ uint32_t shadow = env->fr0_shadow;
+
+ if (likely(soft_exp == 0)) {
+ env->fr[0] = (uint64_t)shadow << 32;
+ return;
+ }
+ set_float_exception_flags(0, &env->fp_status);
+
+ hard_exp |= CONVERT_BIT(soft_exp, float_flag_inexact, 1u << 0);
+ hard_exp |= CONVERT_BIT(soft_exp, float_flag_underflow, 1u << 1);
+ hard_exp |= CONVERT_BIT(soft_exp, float_flag_overflow, 1u << 2);
+ hard_exp |= CONVERT_BIT(soft_exp, float_flag_divbyzero, 1u << 3);
+ hard_exp |= CONVERT_BIT(soft_exp, float_flag_invalid, 1u << 4);
+ shadow |= hard_exp << (32 - 5);
+ env->fr0_shadow = shadow;
+ env->fr[0] = (uint64_t)shadow << 32;
+
+ if (hard_exp & shadow) {
+ hppa_dynamic_excp(env, EXCP_ASSIST, ra);
+ }
+}
+
+float32 HELPER(fsqrt_s)(CPUHPPAState *env, float32 arg)
+{
+ float32 ret = float32_sqrt(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float32 HELPER(frnd_s)(CPUHPPAState *env, float32 arg)
+{
+ float32 ret = float32_round_to_int(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float32 HELPER(fadd_s)(CPUHPPAState *env, float32 a, float32 b)
+{
+ float32 ret = float32_add(a, b, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float32 HELPER(fsub_s)(CPUHPPAState *env, float32 a, float32 b)
+{
+ float32 ret = float32_sub(a, b, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float32 HELPER(fmpy_s)(CPUHPPAState *env, float32 a, float32 b)
+{
+ float32 ret = float32_mul(a, b, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float32 HELPER(fdiv_s)(CPUHPPAState *env, float32 a, float32 b)
+{
+ float32 ret = float32_div(a, b, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float64 HELPER(fsqrt_d)(CPUHPPAState *env, float64 arg)
+{
+ float64 ret = float64_sqrt(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float64 HELPER(frnd_d)(CPUHPPAState *env, float64 arg)
+{
+ float64 ret = float64_round_to_int(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float64 HELPER(fadd_d)(CPUHPPAState *env, float64 a, float64 b)
+{
+ float64 ret = float64_add(a, b, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float64 HELPER(fsub_d)(CPUHPPAState *env, float64 a, float64 b)
+{
+ float64 ret = float64_sub(a, b, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float64 HELPER(fmpy_d)(CPUHPPAState *env, float64 a, float64 b)
+{
+ float64 ret = float64_mul(a, b, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float64 HELPER(fdiv_d)(CPUHPPAState *env, float64 a, float64 b)
+{
+ float64 ret = float64_div(a, b, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float64 HELPER(fcnv_s_d)(CPUHPPAState *env, float32 arg)
+{
+ float64 ret = float32_to_float64(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float32 HELPER(fcnv_d_s)(CPUHPPAState *env, float64 arg)
+{
+ float32 ret = float64_to_float32(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float32 HELPER(fcnv_w_s)(CPUHPPAState *env, int32_t arg)
+{
+ float32 ret = int32_to_float32(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float32 HELPER(fcnv_dw_s)(CPUHPPAState *env, int64_t arg)
+{
+ float32 ret = int64_to_float32(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float64 HELPER(fcnv_w_d)(CPUHPPAState *env, int32_t arg)
+{
+ float64 ret = int32_to_float64(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float64 HELPER(fcnv_dw_d)(CPUHPPAState *env, int64_t arg)
+{
+ float64 ret = int64_to_float64(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+int32_t HELPER(fcnv_s_w)(CPUHPPAState *env, float32 arg)
+{
+ int32_t ret = float32_to_int32(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+int32_t HELPER(fcnv_d_w)(CPUHPPAState *env, float64 arg)
+{
+ int32_t ret = float64_to_int32(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+int64_t HELPER(fcnv_s_dw)(CPUHPPAState *env, float32 arg)
+{
+ int64_t ret = float32_to_int64(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+int64_t HELPER(fcnv_d_dw)(CPUHPPAState *env, float64 arg)
+{
+ int64_t ret = float64_to_int64(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+int32_t HELPER(fcnv_t_s_w)(CPUHPPAState *env, float32 arg)
+{
+ int32_t ret = float32_to_int32_round_to_zero(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+int32_t HELPER(fcnv_t_d_w)(CPUHPPAState *env, float64 arg)
+{
+ int32_t ret = float64_to_int32_round_to_zero(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+int64_t HELPER(fcnv_t_s_dw)(CPUHPPAState *env, float32 arg)
+{
+ int64_t ret = float32_to_int64_round_to_zero(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+int64_t HELPER(fcnv_t_d_dw)(CPUHPPAState *env, float64 arg)
+{
+ int64_t ret = float64_to_int64_round_to_zero(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float32 HELPER(fcnv_uw_s)(CPUHPPAState *env, uint32_t arg)
+{
+ float32 ret = uint32_to_float32(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float32 HELPER(fcnv_udw_s)(CPUHPPAState *env, uint64_t arg)
+{
+ float32 ret = uint64_to_float32(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float64 HELPER(fcnv_uw_d)(CPUHPPAState *env, uint32_t arg)
+{
+ float64 ret = uint32_to_float64(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float64 HELPER(fcnv_udw_d)(CPUHPPAState *env, uint64_t arg)
+{
+ float64 ret = uint64_to_float64(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+uint32_t HELPER(fcnv_s_uw)(CPUHPPAState *env, float32 arg)
+{
+ uint32_t ret = float32_to_uint32(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+uint32_t HELPER(fcnv_d_uw)(CPUHPPAState *env, float64 arg)
+{
+ uint32_t ret = float64_to_uint32(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+uint64_t HELPER(fcnv_s_udw)(CPUHPPAState *env, float32 arg)
+{
+ uint64_t ret = float32_to_uint64(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+uint64_t HELPER(fcnv_d_udw)(CPUHPPAState *env, float64 arg)
+{
+ uint64_t ret = float64_to_uint64(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+uint32_t HELPER(fcnv_t_s_uw)(CPUHPPAState *env, float32 arg)
+{
+ uint32_t ret = float32_to_uint32_round_to_zero(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+uint32_t HELPER(fcnv_t_d_uw)(CPUHPPAState *env, float64 arg)
+{
+ uint32_t ret = float64_to_uint32_round_to_zero(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+uint64_t HELPER(fcnv_t_s_udw)(CPUHPPAState *env, float32 arg)
+{
+ uint64_t ret = float32_to_uint64_round_to_zero(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+uint64_t HELPER(fcnv_t_d_udw)(CPUHPPAState *env, float64 arg)
+{
+ uint64_t ret = float64_to_uint64_round_to_zero(arg, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+static void update_fr0_cmp(CPUHPPAState *env, uint32_t y,
+ uint32_t c, FloatRelation r)
+{
+ uint32_t shadow = env->fr0_shadow;
+
+ switch (r) {
+ case float_relation_greater:
+ c = extract32(c, 4, 1);
+ break;
+ case float_relation_less:
+ c = extract32(c, 3, 1);
+ break;
+ case float_relation_equal:
+ c = extract32(c, 2, 1);
+ break;
+ case float_relation_unordered:
+ c = extract32(c, 1, 1);
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ if (y) {
+ /* targeted comparison */
+ /* set fpsr[ca[y - 1]] to current compare */
+ shadow = deposit32(shadow, 21 - (y - 1), 1, c);
+ } else {
+ /* queued comparison */
+ /* shift cq right by one place */
+ shadow = deposit32(shadow, 11, 10, extract32(shadow, 12, 10));
+ /* move fpsr[c] to fpsr[cq[0]] */
+ shadow = deposit32(shadow, 21, 1, extract32(shadow, 26, 1));
+ /* set fpsr[c] to current compare */
+ shadow = deposit32(shadow, 26, 1, c);
+ }
+
+ env->fr0_shadow = shadow;
+ env->fr[0] = (uint64_t)shadow << 32;
+}
+
+void HELPER(fcmp_s)(CPUHPPAState *env, float32 a, float32 b,
+ uint32_t y, uint32_t c)
+{
+ FloatRelation r;
+ if (c & 1) {
+ r = float32_compare(a, b, &env->fp_status);
+ } else {
+ r = float32_compare_quiet(a, b, &env->fp_status);
+ }
+ update_fr0_op(env, GETPC());
+ update_fr0_cmp(env, y, c, r);
+}
+
+void HELPER(fcmp_d)(CPUHPPAState *env, float64 a, float64 b,
+ uint32_t y, uint32_t c)
+{
+ FloatRelation r;
+ if (c & 1) {
+ r = float64_compare(a, b, &env->fp_status);
+ } else {
+ r = float64_compare_quiet(a, b, &env->fp_status);
+ }
+ update_fr0_op(env, GETPC());
+ update_fr0_cmp(env, y, c, r);
+}
+
+float32 HELPER(fmpyfadd_s)(CPUHPPAState *env, float32 a, float32 b, float32 c)
+{
+ float32 ret = float32_muladd(a, b, c, 0, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float32 HELPER(fmpynfadd_s)(CPUHPPAState *env, float32 a, float32 b, float32 c)
+{
+ float32 ret = float32_muladd(a, b, c, float_muladd_negate_product,
+ &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float64 HELPER(fmpyfadd_d)(CPUHPPAState *env, float64 a, float64 b, float64 c)
+{
+ float64 ret = float64_muladd(a, b, c, 0, &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
+
+float64 HELPER(fmpynfadd_d)(CPUHPPAState *env, float64 a, float64 b, float64 c)
+{
+ float64 ret = float64_muladd(a, b, c, float_muladd_negate_product,
+ &env->fp_status);
+ update_fr0_op(env, GETPC());
+ return ret;
+}
diff --git a/target/hppa/meson.build b/target/hppa/meson.build
index 021e42a2d0..fb90aed5de 100644
--- a/target/hppa/meson.build
+++ b/target/hppa/meson.build
@@ -4,6 +4,7 @@ hppa_ss = ss.source_set()
hppa_ss.add(gen)
hppa_ss.add(files(
'cpu.c',
+ 'fpu_helper.c',
'gdbstub.c',
'helper.c',
'int_helper.c',
diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c
index fbd80e4248..f5905c9fc2 100644
--- a/target/hppa/op_helper.c
+++ b/target/hppa/op_helper.c
@@ -25,7 +25,6 @@
#include "exec/cpu_ldst.h"
#include "qemu/timer.h"
#include "sysemu/runstate.h"
-#include "fpu/softfloat.h"
#include "trace.h"
G_NORETURN void HELPER(excp)(CPUHPPAState *env, int excp)
@@ -197,432 +196,6 @@ target_ureg HELPER(probe)(CPUHPPAState *env, target_ulong addr,
#endif
}
-void HELPER(loaded_fr0)(CPUHPPAState *env)
-{
- uint32_t shadow = env->fr[0] >> 32;
- int rm, d;
-
- env->fr0_shadow = shadow;
-
- switch (extract32(shadow, 9, 2)) {
- default:
- rm = float_round_nearest_even;
- break;
- case 1:
- rm = float_round_to_zero;
- break;
- case 2:
- rm = float_round_up;
- break;
- case 3:
- rm = float_round_down;
- break;
- }
- set_float_rounding_mode(rm, &env->fp_status);
-
- d = extract32(shadow, 5, 1);
- set_flush_to_zero(d, &env->fp_status);
- set_flush_inputs_to_zero(d, &env->fp_status);
-}
-
-void cpu_hppa_loaded_fr0(CPUHPPAState *env)
-{
- helper_loaded_fr0(env);
-}
-
-#define CONVERT_BIT(X, SRC, DST) \
- ((SRC) > (DST) \
- ? (X) / ((SRC) / (DST)) & (DST) \
- : ((X) & (SRC)) * ((DST) / (SRC)))
-
-static void update_fr0_op(CPUHPPAState *env, uintptr_t ra)
-{
- uint32_t soft_exp = get_float_exception_flags(&env->fp_status);
- uint32_t hard_exp = 0;
- uint32_t shadow = env->fr0_shadow;
-
- if (likely(soft_exp == 0)) {
- env->fr[0] = (uint64_t)shadow << 32;
- return;
- }
- set_float_exception_flags(0, &env->fp_status);
-
- hard_exp |= CONVERT_BIT(soft_exp, float_flag_inexact, 1u << 0);
- hard_exp |= CONVERT_BIT(soft_exp, float_flag_underflow, 1u << 1);
- hard_exp |= CONVERT_BIT(soft_exp, float_flag_overflow, 1u << 2);
- hard_exp |= CONVERT_BIT(soft_exp, float_flag_divbyzero, 1u << 3);
- hard_exp |= CONVERT_BIT(soft_exp, float_flag_invalid, 1u << 4);
- shadow |= hard_exp << (32 - 5);
- env->fr0_shadow = shadow;
- env->fr[0] = (uint64_t)shadow << 32;
-
- if (hard_exp & shadow) {
- hppa_dynamic_excp(env, EXCP_ASSIST, ra);
- }
-}
-
-float32 HELPER(fsqrt_s)(CPUHPPAState *env, float32 arg)
-{
- float32 ret = float32_sqrt(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float32 HELPER(frnd_s)(CPUHPPAState *env, float32 arg)
-{
- float32 ret = float32_round_to_int(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float32 HELPER(fadd_s)(CPUHPPAState *env, float32 a, float32 b)
-{
- float32 ret = float32_add(a, b, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float32 HELPER(fsub_s)(CPUHPPAState *env, float32 a, float32 b)
-{
- float32 ret = float32_sub(a, b, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float32 HELPER(fmpy_s)(CPUHPPAState *env, float32 a, float32 b)
-{
- float32 ret = float32_mul(a, b, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float32 HELPER(fdiv_s)(CPUHPPAState *env, float32 a, float32 b)
-{
- float32 ret = float32_div(a, b, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float64 HELPER(fsqrt_d)(CPUHPPAState *env, float64 arg)
-{
- float64 ret = float64_sqrt(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float64 HELPER(frnd_d)(CPUHPPAState *env, float64 arg)
-{
- float64 ret = float64_round_to_int(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float64 HELPER(fadd_d)(CPUHPPAState *env, float64 a, float64 b)
-{
- float64 ret = float64_add(a, b, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float64 HELPER(fsub_d)(CPUHPPAState *env, float64 a, float64 b)
-{
- float64 ret = float64_sub(a, b, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float64 HELPER(fmpy_d)(CPUHPPAState *env, float64 a, float64 b)
-{
- float64 ret = float64_mul(a, b, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float64 HELPER(fdiv_d)(CPUHPPAState *env, float64 a, float64 b)
-{
- float64 ret = float64_div(a, b, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float64 HELPER(fcnv_s_d)(CPUHPPAState *env, float32 arg)
-{
- float64 ret = float32_to_float64(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float32 HELPER(fcnv_d_s)(CPUHPPAState *env, float64 arg)
-{
- float32 ret = float64_to_float32(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float32 HELPER(fcnv_w_s)(CPUHPPAState *env, int32_t arg)
-{
- float32 ret = int32_to_float32(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float32 HELPER(fcnv_dw_s)(CPUHPPAState *env, int64_t arg)
-{
- float32 ret = int64_to_float32(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float64 HELPER(fcnv_w_d)(CPUHPPAState *env, int32_t arg)
-{
- float64 ret = int32_to_float64(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float64 HELPER(fcnv_dw_d)(CPUHPPAState *env, int64_t arg)
-{
- float64 ret = int64_to_float64(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-int32_t HELPER(fcnv_s_w)(CPUHPPAState *env, float32 arg)
-{
- int32_t ret = float32_to_int32(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-int32_t HELPER(fcnv_d_w)(CPUHPPAState *env, float64 arg)
-{
- int32_t ret = float64_to_int32(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-int64_t HELPER(fcnv_s_dw)(CPUHPPAState *env, float32 arg)
-{
- int64_t ret = float32_to_int64(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-int64_t HELPER(fcnv_d_dw)(CPUHPPAState *env, float64 arg)
-{
- int64_t ret = float64_to_int64(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-int32_t HELPER(fcnv_t_s_w)(CPUHPPAState *env, float32 arg)
-{
- int32_t ret = float32_to_int32_round_to_zero(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-int32_t HELPER(fcnv_t_d_w)(CPUHPPAState *env, float64 arg)
-{
- int32_t ret = float64_to_int32_round_to_zero(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-int64_t HELPER(fcnv_t_s_dw)(CPUHPPAState *env, float32 arg)
-{
- int64_t ret = float32_to_int64_round_to_zero(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-int64_t HELPER(fcnv_t_d_dw)(CPUHPPAState *env, float64 arg)
-{
- int64_t ret = float64_to_int64_round_to_zero(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float32 HELPER(fcnv_uw_s)(CPUHPPAState *env, uint32_t arg)
-{
- float32 ret = uint32_to_float32(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float32 HELPER(fcnv_udw_s)(CPUHPPAState *env, uint64_t arg)
-{
- float32 ret = uint64_to_float32(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float64 HELPER(fcnv_uw_d)(CPUHPPAState *env, uint32_t arg)
-{
- float64 ret = uint32_to_float64(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float64 HELPER(fcnv_udw_d)(CPUHPPAState *env, uint64_t arg)
-{
- float64 ret = uint64_to_float64(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-uint32_t HELPER(fcnv_s_uw)(CPUHPPAState *env, float32 arg)
-{
- uint32_t ret = float32_to_uint32(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-uint32_t HELPER(fcnv_d_uw)(CPUHPPAState *env, float64 arg)
-{
- uint32_t ret = float64_to_uint32(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-uint64_t HELPER(fcnv_s_udw)(CPUHPPAState *env, float32 arg)
-{
- uint64_t ret = float32_to_uint64(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-uint64_t HELPER(fcnv_d_udw)(CPUHPPAState *env, float64 arg)
-{
- uint64_t ret = float64_to_uint64(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-uint32_t HELPER(fcnv_t_s_uw)(CPUHPPAState *env, float32 arg)
-{
- uint32_t ret = float32_to_uint32_round_to_zero(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-uint32_t HELPER(fcnv_t_d_uw)(CPUHPPAState *env, float64 arg)
-{
- uint32_t ret = float64_to_uint32_round_to_zero(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-uint64_t HELPER(fcnv_t_s_udw)(CPUHPPAState *env, float32 arg)
-{
- uint64_t ret = float32_to_uint64_round_to_zero(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-uint64_t HELPER(fcnv_t_d_udw)(CPUHPPAState *env, float64 arg)
-{
- uint64_t ret = float64_to_uint64_round_to_zero(arg, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-static void update_fr0_cmp(CPUHPPAState *env, uint32_t y,
- uint32_t c, FloatRelation r)
-{
- uint32_t shadow = env->fr0_shadow;
-
- switch (r) {
- case float_relation_greater:
- c = extract32(c, 4, 1);
- break;
- case float_relation_less:
- c = extract32(c, 3, 1);
- break;
- case float_relation_equal:
- c = extract32(c, 2, 1);
- break;
- case float_relation_unordered:
- c = extract32(c, 1, 1);
- break;
- default:
- g_assert_not_reached();
- }
-
- if (y) {
- /* targeted comparison */
- /* set fpsr[ca[y - 1]] to current compare */
- shadow = deposit32(shadow, 21 - (y - 1), 1, c);
- } else {
- /* queued comparison */
- /* shift cq right by one place */
- shadow = deposit32(shadow, 11, 10, extract32(shadow, 12, 10));
- /* move fpsr[c] to fpsr[cq[0]] */
- shadow = deposit32(shadow, 21, 1, extract32(shadow, 26, 1));
- /* set fpsr[c] to current compare */
- shadow = deposit32(shadow, 26, 1, c);
- }
-
- env->fr0_shadow = shadow;
- env->fr[0] = (uint64_t)shadow << 32;
-}
-
-void HELPER(fcmp_s)(CPUHPPAState *env, float32 a, float32 b,
- uint32_t y, uint32_t c)
-{
- FloatRelation r;
- if (c & 1) {
- r = float32_compare(a, b, &env->fp_status);
- } else {
- r = float32_compare_quiet(a, b, &env->fp_status);
- }
- update_fr0_op(env, GETPC());
- update_fr0_cmp(env, y, c, r);
-}
-
-void HELPER(fcmp_d)(CPUHPPAState *env, float64 a, float64 b,
- uint32_t y, uint32_t c)
-{
- FloatRelation r;
- if (c & 1) {
- r = float64_compare(a, b, &env->fp_status);
- } else {
- r = float64_compare_quiet(a, b, &env->fp_status);
- }
- update_fr0_op(env, GETPC());
- update_fr0_cmp(env, y, c, r);
-}
-
-float32 HELPER(fmpyfadd_s)(CPUHPPAState *env, float32 a, float32 b, float32 c)
-{
- float32 ret = float32_muladd(a, b, c, 0, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float32 HELPER(fmpynfadd_s)(CPUHPPAState *env, float32 a, float32 b, float32 c)
-{
- float32 ret = float32_muladd(a, b, c, float_muladd_negate_product,
- &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float64 HELPER(fmpyfadd_d)(CPUHPPAState *env, float64 a, float64 b, float64 c)
-{
- float64 ret = float64_muladd(a, b, c, 0, &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
-float64 HELPER(fmpynfadd_d)(CPUHPPAState *env, float64 a, float64 b, float64 c)
-{
- float64 ret = float64_muladd(a, b, c, float_muladd_negate_product,
- &env->fp_status);
- update_fr0_op(env, GETPC());
- return ret;
-}
-
target_ureg HELPER(read_interval_timer)(void)
{
#ifdef CONFIG_USER_ONLY
--
2.38.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PULL 011/123] target/hppa: Extract system helpers to sys_helper.c
2023-02-27 12:36 [PULL 000/123] Buildsys / QOM / QDev / UI patches for 2023-02-27 Philippe Mathieu-Daudé
` (9 preceding siblings ...)
2023-02-27 12:36 ` [PULL 010/123] target/hppa: Extract FPU helpers to fpu_helper.c Philippe Mathieu-Daudé
@ 2023-02-27 12:36 ` Philippe Mathieu-Daudé
10 siblings, 0 replies; 12+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-02-27 12:36 UTC (permalink / raw)
To: qemu-devel
Cc: Michael S. Tsirkin, Peter Maydell, John Snow, Paolo Bonzini,
Philippe Mathieu-Daudé, Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221217173219.8715-3-philmd@linaro.org>
---
target/hppa/meson.build | 1 +
target/hppa/op_helper.c | 77 -------------------------------
target/hppa/sys_helper.c | 99 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 100 insertions(+), 77 deletions(-)
create mode 100644 target/hppa/sys_helper.c
diff --git a/target/hppa/meson.build b/target/hppa/meson.build
index fb90aed5de..81b4b4e617 100644
--- a/target/hppa/meson.build
+++ b/target/hppa/meson.build
@@ -16,6 +16,7 @@ hppa_softmmu_ss = ss.source_set()
hppa_softmmu_ss.add(files(
'machine.c',
'mem_helper.c',
+ 'sys_helper.c',
))
target_arch += {'hppa': hppa_ss}
diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c
index f5905c9fc2..32c27c66b2 100644
--- a/target/hppa/op_helper.c
+++ b/target/hppa/op_helper.c
@@ -24,7 +24,6 @@
#include "exec/helper-proto.h"
#include "exec/cpu_ldst.h"
#include "qemu/timer.h"
-#include "sysemu/runstate.h"
#include "trace.h"
G_NORETURN void HELPER(excp)(CPUHPPAState *env, int excp)
@@ -209,79 +208,3 @@ target_ureg HELPER(read_interval_timer)(void)
return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >> 2;
#endif
}
-
-#ifndef CONFIG_USER_ONLY
-void HELPER(write_interval_timer)(CPUHPPAState *env, target_ureg val)
-{
- HPPACPU *cpu = env_archcpu(env);
- uint64_t current = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
- uint64_t timeout;
-
- /* Even in 64-bit mode, the comparator is always 32-bit. But the
- value we expose to the guest is 1/4 of the speed of the clock,
- so moosh in 34 bits. */
- timeout = deposit64(current, 0, 34, (uint64_t)val << 2);
-
- /* If the mooshing puts the clock in the past, advance to next round. */
- if (timeout < current + 1000) {
- timeout += 1ULL << 34;
- }
-
- cpu->env.cr[CR_IT] = timeout;
- timer_mod(cpu->alarm_timer, timeout);
-}
-
-void HELPER(halt)(CPUHPPAState *env)
-{
- qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
- helper_excp(env, EXCP_HLT);
-}
-
-void HELPER(reset)(CPUHPPAState *env)
-{
- qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
- helper_excp(env, EXCP_HLT);
-}
-
-target_ureg HELPER(swap_system_mask)(CPUHPPAState *env, target_ureg nsm)
-{
- target_ulong psw = env->psw;
- /*
- * Setting the PSW Q bit to 1, if it was not already 1, is an
- * undefined operation.
- *
- * However, HP-UX 10.20 does this with the SSM instruction.
- * Tested this on HP9000/712 and HP9000/785/C3750 and both
- * machines set the Q bit from 0 to 1 without an exception,
- * so let this go without comment.
- */
- env->psw = (psw & ~PSW_SM) | (nsm & PSW_SM);
- return psw & PSW_SM;
-}
-
-void HELPER(rfi)(CPUHPPAState *env)
-{
- env->iasq_f = (uint64_t)env->cr[CR_IIASQ] << 32;
- env->iasq_b = (uint64_t)env->cr_back[0] << 32;
- env->iaoq_f = env->cr[CR_IIAOQ];
- env->iaoq_b = env->cr_back[1];
- cpu_hppa_put_psw(env, env->cr[CR_IPSW]);
-}
-
-void HELPER(getshadowregs)(CPUHPPAState *env)
-{
- env->gr[1] = env->shadow[0];
- env->gr[8] = env->shadow[1];
- env->gr[9] = env->shadow[2];
- env->gr[16] = env->shadow[3];
- env->gr[17] = env->shadow[4];
- env->gr[24] = env->shadow[5];
- env->gr[25] = env->shadow[6];
-}
-
-void HELPER(rfi_r)(CPUHPPAState *env)
-{
- helper_getshadowregs(env);
- helper_rfi(env);
-}
-#endif
diff --git a/target/hppa/sys_helper.c b/target/hppa/sys_helper.c
new file mode 100644
index 0000000000..b0dded9e07
--- /dev/null
+++ b/target/hppa/sys_helper.c
@@ -0,0 +1,99 @@
+/*
+ * Helpers for HPPA system instructions.
+ *
+ * Copyright (c) 2016 Richard Henderson <rth@twiddle.net>
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "exec/exec-all.h"
+#include "exec/helper-proto.h"
+#include "qemu/timer.h"
+#include "sysemu/runstate.h"
+
+void HELPER(write_interval_timer)(CPUHPPAState *env, target_ureg val)
+{
+ HPPACPU *cpu = env_archcpu(env);
+ uint64_t current = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
+ uint64_t timeout;
+
+ /* Even in 64-bit mode, the comparator is always 32-bit. But the
+ value we expose to the guest is 1/4 of the speed of the clock,
+ so moosh in 34 bits. */
+ timeout = deposit64(current, 0, 34, (uint64_t)val << 2);
+
+ /* If the mooshing puts the clock in the past, advance to next round. */
+ if (timeout < current + 1000) {
+ timeout += 1ULL << 34;
+ }
+
+ cpu->env.cr[CR_IT] = timeout;
+ timer_mod(cpu->alarm_timer, timeout);
+}
+
+void HELPER(halt)(CPUHPPAState *env)
+{
+ qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
+ helper_excp(env, EXCP_HLT);
+}
+
+void HELPER(reset)(CPUHPPAState *env)
+{
+ qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
+ helper_excp(env, EXCP_HLT);
+}
+
+target_ureg HELPER(swap_system_mask)(CPUHPPAState *env, target_ureg nsm)
+{
+ target_ulong psw = env->psw;
+ /*
+ * Setting the PSW Q bit to 1, if it was not already 1, is an
+ * undefined operation.
+ *
+ * However, HP-UX 10.20 does this with the SSM instruction.
+ * Tested this on HP9000/712 and HP9000/785/C3750 and both
+ * machines set the Q bit from 0 to 1 without an exception,
+ * so let this go without comment.
+ */
+ env->psw = (psw & ~PSW_SM) | (nsm & PSW_SM);
+ return psw & PSW_SM;
+}
+
+void HELPER(rfi)(CPUHPPAState *env)
+{
+ env->iasq_f = (uint64_t)env->cr[CR_IIASQ] << 32;
+ env->iasq_b = (uint64_t)env->cr_back[0] << 32;
+ env->iaoq_f = env->cr[CR_IIAOQ];
+ env->iaoq_b = env->cr_back[1];
+ cpu_hppa_put_psw(env, env->cr[CR_IPSW]);
+}
+
+void HELPER(getshadowregs)(CPUHPPAState *env)
+{
+ env->gr[1] = env->shadow[0];
+ env->gr[8] = env->shadow[1];
+ env->gr[9] = env->shadow[2];
+ env->gr[16] = env->shadow[3];
+ env->gr[17] = env->shadow[4];
+ env->gr[24] = env->shadow[5];
+ env->gr[25] = env->shadow[6];
+}
+
+void HELPER(rfi_r)(CPUHPPAState *env)
+{
+ helper_getshadowregs(env);
+ helper_rfi(env);
+}
--
2.38.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
end of thread, other threads:[~2023-02-27 12:46 UTC | newest]
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2023-02-27 12:36 [PULL 000/123] Buildsys / QOM / QDev / UI patches for 2023-02-27 Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 001/123] cpu: Remove capstone meson dependency Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 002/123] cpu: Move breakpoint helpers to common code Philippe Mathieu-Daudé
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2023-02-27 12:36 ` [PULL 004/123] gdbstub: Use vaddr type for generic insert/remove_breakpoint() API Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 005/123] target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 006/123] target/cpu: Restrict do_transaction_failed() " Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 007/123] target/i386: Remove NEED_CPU_H guard from target-specific headers Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 008/123] target/i386/cpu: Remove dead helper_lock() declaration Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 009/123] target/i386: Remove x86_cpu_dump_local_apic_state() dead stub Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 010/123] target/hppa: Extract FPU helpers to fpu_helper.c Philippe Mathieu-Daudé
2023-02-27 12:36 ` [PULL 011/123] target/hppa: Extract system helpers to sys_helper.c Philippe Mathieu-Daudé
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