From: Robert Hoo <robert.hu@linux.intel.com>
To: pbonzini@redhat.com, chao.gao@intel.com, binbin.wu@linux.intel.com
Cc: seanjc@google.com, qemu-devel@nongnu.org,
yang.zhong@linux.intel.com,
Robert Hoo <robert.hu@linux.intel.com>
Subject: [PATCH] i386: QEMU support LAM (Linear Address Masking)
Date: Mon, 27 Feb 2023 21:52:03 +0800 [thread overview]
Message-ID: <20230227135203.418404-1-robert.hu@linux.intel.com> (raw)
Define feature word "lam", so that QEMU can support this new feature.
LAM is enumerated by CPUID(7,1).EAX[26], it allows to use upper bits of
linear address for meta data storage. Analogous to ARM MTE, but more
flexible.
More info can be found ISE Chap10
https://cdrdv2.intel.com/v1/dl/getContent/671368
Signed-off-by: Robert Hoo <robert.hu@linux.intel.com>
---
target/i386/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 4d2b8d0444..d6d573ca38 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -876,7 +876,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
- NULL, NULL, NULL, NULL,
+ NULL, NULL, "lam", NULL,
NULL, NULL, NULL, NULL,
},
.cpuid = {
--
2.31.1
reply other threads:[~2023-02-27 13:57 UTC|newest]
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