From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, Fabiano Rosas <farosas@suse.de>,
Peter Maydell <peter.maydell@linaro.org>
Subject: [PATCH v3 04/14] target/arm: Split out output_vector_union_type
Date: Mon, 27 Feb 2023 11:33:19 -1000 [thread overview]
Message-ID: <20230227213329.793795-5-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230227213329.793795-1-richard.henderson@linaro.org>
Create a subroutine for creating the union of unions
of the various type sizes that a vector may contain.
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/gdbstub64.c | 83 +++++++++++++++++++++++-------------------
1 file changed, 45 insertions(+), 38 deletions(-)
diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c
index 59fb5465d5..811833d8de 100644
--- a/target/arm/gdbstub64.c
+++ b/target/arm/gdbstub64.c
@@ -210,44 +210,39 @@ int aarch64_gdb_set_sve_reg(CPUARMState *env, uint8_t *buf, int reg)
return 0;
}
-struct TypeSize {
- const char *gdb_type;
- short size;
- char sz, suffix;
-};
-
-static const struct TypeSize vec_lanes[] = {
- /* quads */
- { "uint128", 128, 'q', 'u' },
- { "int128", 128, 'q', 's' },
- /* 64 bit */
- { "ieee_double", 64, 'd', 'f' },
- { "uint64", 64, 'd', 'u' },
- { "int64", 64, 'd', 's' },
- /* 32 bit */
- { "ieee_single", 32, 's', 'f' },
- { "uint32", 32, 's', 'u' },
- { "int32", 32, 's', 's' },
- /* 16 bit */
- { "ieee_half", 16, 'h', 'f' },
- { "uint16", 16, 'h', 'u' },
- { "int16", 16, 'h', 's' },
- /* bytes */
- { "uint8", 8, 'b', 'u' },
- { "int8", 8, 'b', 's' },
-};
-
-int arm_gen_dynamic_svereg_xml(CPUState *cs, int base_reg)
+static void output_vector_union_type(GString *s, int reg_width)
{
- ARMCPU *cpu = ARM_CPU(cs);
- GString *s = g_string_new(NULL);
- DynamicGDBXMLInfo *info = &cpu->dyn_svereg_xml;
+ struct TypeSize {
+ const char *gdb_type;
+ short size;
+ char sz, suffix;
+ };
+
+ static const struct TypeSize vec_lanes[] = {
+ /* quads */
+ { "uint128", 128, 'q', 'u' },
+ { "int128", 128, 'q', 's' },
+ /* 64 bit */
+ { "ieee_double", 64, 'd', 'f' },
+ { "uint64", 64, 'd', 'u' },
+ { "int64", 64, 'd', 's' },
+ /* 32 bit */
+ { "ieee_single", 32, 's', 'f' },
+ { "uint32", 32, 's', 'u' },
+ { "int32", 32, 's', 's' },
+ /* 16 bit */
+ { "ieee_half", 16, 'h', 'f' },
+ { "uint16", 16, 'h', 'u' },
+ { "int16", 16, 'h', 's' },
+ /* bytes */
+ { "uint8", 8, 'b', 'u' },
+ { "int8", 8, 'b', 's' },
+ };
+
+ static const char suf[] = { 'q', 'd', 's', 'h', 'b' };
+
g_autoptr(GString) ts = g_string_new("");
- int i, j, bits, reg_width = (cpu->sve_max_vq * 128);
- info->num = 0;
- g_string_printf(s, "<?xml version=\"1.0\"?>");
- g_string_append_printf(s, "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">");
- g_string_append_printf(s, "<feature name=\"org.gnu.gdb.aarch64.sve\">");
+ int i, j, bits;
/* First define types and totals in a whole VL */
for (i = 0; i < ARRAY_SIZE(vec_lanes); i++) {
@@ -263,7 +258,6 @@ int arm_gen_dynamic_svereg_xml(CPUState *cs, int base_reg)
* 8 bits.
*/
for (bits = 128, i = 0; bits >= 8; bits /= 2, i++) {
- const char suf[] = { 'q', 'd', 's', 'h', 'b' };
g_string_append_printf(s, "<union id=\"svevn%c\">", suf[i]);
for (j = 0; j < ARRAY_SIZE(vec_lanes); j++) {
if (vec_lanes[j].size == bits) {
@@ -277,11 +271,24 @@ int arm_gen_dynamic_svereg_xml(CPUState *cs, int base_reg)
/* And now the final union of unions */
g_string_append(s, "<union id=\"svev\">");
for (bits = 128, i = 0; bits >= 8; bits /= 2, i++) {
- const char suf[] = { 'q', 'd', 's', 'h', 'b' };
g_string_append_printf(s, "<field name=\"%c\" type=\"svevn%c\"/>",
suf[i], suf[i]);
}
g_string_append(s, "</union>");
+}
+
+int arm_gen_dynamic_svereg_xml(CPUState *cs, int base_reg)
+{
+ ARMCPU *cpu = ARM_CPU(cs);
+ GString *s = g_string_new(NULL);
+ DynamicGDBXMLInfo *info = &cpu->dyn_svereg_xml;
+ int i, reg_width = (cpu->sve_max_vq * 128);
+ info->num = 0;
+ g_string_printf(s, "<?xml version=\"1.0\"?>");
+ g_string_append_printf(s, "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">");
+ g_string_append_printf(s, "<feature name=\"org.gnu.gdb.aarch64.sve\">");
+
+ output_vector_union_type(s, reg_width);
/* Finally the sve prefix type */
g_string_append_printf(s,
--
2.34.1
next prev parent reply other threads:[~2023-02-27 21:37 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-27 21:33 [PATCH v3 00/14] target/arm: gdbstub cleanups and additions Richard Henderson
2023-02-27 21:33 ` [PATCH v3 01/14] target/arm: Normalize aarch64 gdbstub get/set function names Richard Henderson
2023-02-27 21:33 ` [PATCH v3 02/14] target/arm: Unexport arm_gen_dynamic_sysreg_xml Richard Henderson
2023-02-27 21:33 ` [PATCH v3 03/14] target/arm: Move arm_gen_dynamic_svereg_xml to gdbstub64.c Richard Henderson
2023-02-27 21:33 ` Richard Henderson [this message]
2023-02-27 21:33 ` [PATCH v3 05/14] target/arm: Simplify register counting in arm_gen_dynamic_svereg_xml Richard Henderson
2023-02-27 21:33 ` [PATCH v3 06/14] target/arm: Hoist pred_width " Richard Henderson
2023-02-27 21:33 ` [PATCH v3 07/14] target/arm: Fix svep width " Richard Henderson
2023-02-27 21:33 ` [PATCH v3 08/14] target/arm: Add name argument to output_vector_union_type Richard Henderson
2023-02-27 21:33 ` [PATCH v3 09/14] target/arm: Simplify iteration over bit widths Richard Henderson
2023-02-27 21:33 ` [PATCH v3 10/14] target/arm: Create pauth_ptr_mask Richard Henderson
2023-02-27 21:33 ` [PATCH v3 11/14] target/arm: Implement gdbstub pauth extension Richard Henderson
2023-02-27 21:33 ` [PATCH v3 12/14] target/arm: Export arm_v7m_mrs_control Richard Henderson
2023-02-27 21:33 ` [PATCH v3 13/14] target/arm: Export arm_v7m_get_sp_ptr Richard Henderson
2023-02-27 21:33 ` [PATCH v3 14/14] target/arm: Implement gdbstub m-profile systemreg and secext Richard Henderson
2023-03-03 14:03 ` [PATCH v3 00/14] target/arm: gdbstub cleanups and additions Peter Maydell
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