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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [PULL 50/62] target/arm: Drop copies in gen_sve_{ldr,str}
Date: Tue, 28 Feb 2023 16:56:31 -1000	[thread overview]
Message-ID: <20230301025643.1227244-51-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230301025643.1227244-1-richard.henderson@linaro.org>

Since we now get TEMP_TB temporaries by default, we no longer
need to make copies across these loops.  These were the only
uses of new_tmp_a64_local(), so remove that as well.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/tcg/translate-a64.h |  1 -
 target/arm/tcg/translate-a64.c |  6 ------
 target/arm/tcg/translate-sve.c | 32 --------------------------------
 3 files changed, 39 deletions(-)

diff --git a/target/arm/tcg/translate-a64.h b/target/arm/tcg/translate-a64.h
index ad3762d1ac..ca24c39dbe 100644
--- a/target/arm/tcg/translate-a64.h
+++ b/target/arm/tcg/translate-a64.h
@@ -19,7 +19,6 @@
 #define TARGET_ARM_TRANSLATE_A64_H
 
 TCGv_i64 new_tmp_a64(DisasContext *s);
-TCGv_i64 new_tmp_a64_local(DisasContext *s);
 TCGv_i64 new_tmp_a64_zero(DisasContext *s);
 TCGv_i64 cpu_reg(DisasContext *s, int reg);
 TCGv_i64 cpu_reg_sp(DisasContext *s, int reg);
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 7bbffdd1fe..f092aec801 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -436,12 +436,6 @@ TCGv_i64 new_tmp_a64(DisasContext *s)
     return s->tmp_a64[s->tmp_a64_count++] = tcg_temp_new_i64();
 }
 
-TCGv_i64 new_tmp_a64_local(DisasContext *s)
-{
-    assert(s->tmp_a64_count < TMP_A64_MAX);
-    return s->tmp_a64[s->tmp_a64_count++] = tcg_temp_local_new_i64();
-}
-
 TCGv_i64 new_tmp_a64_zero(DisasContext *s)
 {
     TCGv_i64 t = new_tmp_a64(s);
diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c
index 621a2abb22..02150d93e8 100644
--- a/target/arm/tcg/translate-sve.c
+++ b/target/arm/tcg/translate-sve.c
@@ -4344,17 +4344,6 @@ void gen_sve_ldr(DisasContext *s, TCGv_ptr base, int vofs,
         TCGLabel *loop = gen_new_label();
         TCGv_ptr tp, i = tcg_const_local_ptr(0);
 
-        /* Copy the clean address into a local temp, live across the loop. */
-        t0 = clean_addr;
-        clean_addr = new_tmp_a64_local(s);
-        tcg_gen_mov_i64(clean_addr, t0);
-
-        if (base != cpu_env) {
-            TCGv_ptr b = tcg_temp_local_new_ptr();
-            tcg_gen_mov_ptr(b, base);
-            base = b;
-        }
-
         gen_set_label(loop);
 
         t0 = tcg_temp_new_i64();
@@ -4370,11 +4359,6 @@ void gen_sve_ldr(DisasContext *s, TCGv_ptr base, int vofs,
 
         tcg_gen_brcondi_ptr(TCG_COND_LTU, i, len_align, loop);
         tcg_temp_free_ptr(i);
-
-        if (base != cpu_env) {
-            tcg_temp_free_ptr(base);
-            assert(len_remain == 0);
-        }
     }
 
     /*
@@ -4445,17 +4429,6 @@ void gen_sve_str(DisasContext *s, TCGv_ptr base, int vofs,
         TCGLabel *loop = gen_new_label();
         TCGv_ptr tp, i = tcg_const_local_ptr(0);
 
-        /* Copy the clean address into a local temp, live across the loop. */
-        t0 = clean_addr;
-        clean_addr = new_tmp_a64_local(s);
-        tcg_gen_mov_i64(clean_addr, t0);
-
-        if (base != cpu_env) {
-            TCGv_ptr b = tcg_temp_local_new_ptr();
-            tcg_gen_mov_ptr(b, base);
-            base = b;
-        }
-
         gen_set_label(loop);
 
         t0 = tcg_temp_new_i64();
@@ -4471,11 +4444,6 @@ void gen_sve_str(DisasContext *s, TCGv_ptr base, int vofs,
 
         tcg_gen_brcondi_ptr(TCG_COND_LTU, i, len_align, loop);
         tcg_temp_free_ptr(i);
-
-        if (base != cpu_env) {
-            tcg_temp_free_ptr(base);
-            assert(len_remain == 0);
-        }
     }
 
     /* Predicate register stores can be any multiple of 2.  */
-- 
2.34.1



  parent reply	other threads:[~2023-03-01  3:01 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-01  2:55 [PULL 00/62] tcg patch queue Richard Henderson
2023-03-01  2:55 ` [PULL 01/62] exec/helper-head: Include missing "fpu/softfloat-types.h" header Richard Henderson
2023-03-01  2:55 ` [PULL 02/62] softmmu: Use memmove in flatview_write_continue Richard Henderson
2023-03-01  2:55 ` [PULL 03/62] accel/tcg: Add 'size' param to probe_access_flags() Richard Henderson
2023-03-01  2:55 ` [PULL 04/62] accel/tcg: Add 'size' param to probe_access_full Richard Henderson
2023-03-01  2:55 ` [PULL 05/62] include/exec: Introduce `CF_PCREL` Richard Henderson
2023-03-01  2:55 ` [PULL 06/62] target/i386: set `CF_PCREL` in `x86_cpu_realizefn` Richard Henderson
2023-03-01  2:55 ` [PULL 07/62] target/arm: set `CF_PCREL` in `arm_cpu_realizefn` Richard Henderson
2023-03-01  2:55 ` [PULL 08/62] accel/tcg: Replace `TARGET_TB_PCREL` with `CF_PCREL` Richard Henderson
2023-03-01  2:55 ` [PULL 09/62] include/exec: " Richard Henderson
2023-03-01  2:55 ` [PULL 10/62] target/arm: " Richard Henderson
2023-03-01  2:55 ` [PULL 11/62] target/i386: " Richard Henderson
2023-03-01  2:55 ` [PULL 12/62] include/exec: Remove `TARGET_TB_PCREL` define Richard Henderson
2023-03-01  2:55 ` [PULL 13/62] target/arm: " Richard Henderson
2023-03-01  2:55 ` [PULL 14/62] target/i386: " Richard Henderson
2023-03-01  2:55 ` [PULL 15/62] accel/tcg: Move jmp-cache `CF_PCREL` checks to caller Richard Henderson
2023-03-01  2:55 ` [PULL 16/62] accel/tcg: Replace `tb_pc()` with `tb->pc` Richard Henderson
2023-03-01  2:55 ` [PULL 17/62] target/tricore: " Richard Henderson
2023-03-01  2:55 ` [PULL 18/62] target/sparc: " Richard Henderson
2023-03-01  2:56 ` [PULL 19/62] target/sh4: " Richard Henderson
2023-03-01  2:56 ` [PULL 20/62] target/rx: " Richard Henderson
2023-03-01  2:56 ` [PULL 21/62] target/riscv: " Richard Henderson
2023-03-01  2:56 ` [PULL 22/62] target/openrisc: " Richard Henderson
2023-03-01  2:56 ` [PULL 23/62] target/mips: " Richard Henderson
2023-03-01  2:56 ` [PULL 24/62] target/microblaze: " Richard Henderson
2023-03-01  2:56 ` [PULL 25/62] target/loongarch: " Richard Henderson
2023-03-01  2:56 ` [PULL 26/62] target/i386: " Richard Henderson
2023-03-01  2:56 ` [PULL 27/62] target/hppa: " Richard Henderson
2023-03-01  2:56 ` [PULL 28/62] target/hexagon: " Richard Henderson
2023-03-01  2:56 ` [PULL 29/62] target/avr: " Richard Henderson
2023-03-01  2:56 ` [PULL 30/62] target/arm: " Richard Henderson
2023-03-01  2:56 ` [PULL 31/62] include/exec: Remove `tb_pc()` Richard Henderson
2023-03-01  2:56 ` [PULL 32/62] tcg: Adjust TCGContext.temps_in_use check Richard Henderson
2023-03-01  2:56 ` [PULL 33/62] accel/tcg: Pass max_insn to gen_intermediate_code by pointer Richard Henderson
2023-03-01  2:56 ` [PULL 34/62] accel/tcg: Use more accurate max_insns for tb_overflow Richard Henderson
2023-03-01  2:56 ` [PULL 35/62] tcg: Remove branch-to-next regardless of reference count Richard Henderson
2023-03-01  2:56 ` [PULL 36/62] tcg: Rename TEMP_LOCAL to TEMP_TB Richard Henderson
2023-03-01  2:56 ` [PULL 37/62] tcg: Use noinline for major tcg_gen_code subroutines Richard Henderson
2023-03-01  2:56 ` [PULL 38/62] tcg: Add liveness_pass_0 Richard Henderson
2023-03-01  2:56 ` [PULL 39/62] tcg: Remove TEMP_NORMAL Richard Henderson
2023-03-01  2:56 ` [PULL 40/62] tcg: Pass TCGTempKind to tcg_temp_new_internal Richard Henderson
2023-03-01  2:56 ` [PULL 41/62] tcg: Use tcg_constant_i32 in tcg_gen_io_start Richard Henderson
2023-03-01  2:56 ` [PULL 42/62] tcg: Add tcg_gen_movi_ptr Richard Henderson
2023-03-01  2:56 ` [PULL 43/62] tcg: Add tcg_temp_ebb_new_{i32,i64,ptr} Richard Henderson
2023-03-01  2:56 ` [PULL 44/62] tcg: Use tcg_temp_ebb_new_* in tcg/ Richard Henderson
2023-03-01  2:56 ` [PULL 45/62] tcg: Use tcg_constant_ptr in do_dup Richard Henderson
2023-03-01  2:56 ` [PULL 46/62] accel/tcg/plugin: Use tcg_temp_ebb_* Richard Henderson
2023-03-01  2:56 ` [PULL 47/62] accel/tcg/plugin: Tidy plugin_gen_disable_mem_helpers Richard Henderson
2023-03-01  2:56 ` [PULL 48/62] tcg: Don't re-use TEMP_TB temporaries Richard Henderson
2023-03-01  2:56 ` [PULL 49/62] tcg: Change default temp lifetime to TEMP_TB Richard Henderson
2023-03-01  2:56 ` Richard Henderson [this message]
2023-03-01  2:56 ` [PULL 51/62] target/arm: Don't use tcg_temp_local_new_* Richard Henderson
2023-03-01  2:56 ` [PULL 52/62] target/cris: Don't use tcg_temp_local_new Richard Henderson
2023-03-01  2:56 ` [PULL 53/62] target/hexagon: Don't use tcg_temp_local_new_* Richard Henderson
2023-03-01  2:56 ` [PULL 54/62] target/hexagon/idef-parser: Drop gen_tmp_local Richard Henderson
2023-03-01  2:56 ` [PULL 55/62] target/hppa: Don't use tcg_temp_local_new Richard Henderson
2023-03-01  2:56 ` [PULL 56/62] target/i386: " Richard Henderson
2023-03-01  2:56 ` [PULL 57/62] target/mips: " Richard Henderson
2023-03-01  2:56 ` [PULL 58/62] target/ppc: " Richard Henderson
2023-03-01  2:56 ` [PULL 59/62] target/xtensa: Don't use tcg_temp_local_new_* Richard Henderson
2023-03-01  2:56 ` [PULL 60/62] exec/gen-icount: Don't use tcg_temp_local_new_i32 Richard Henderson
2023-03-01  2:56 ` [PULL 61/62] tcg: Remove tcg_temp_local_new_*, tcg_const_local_* Richard Henderson
2023-03-01  2:56 ` [PULL 62/62] tcg: Update docs/devel/tcg-ops.rst for temporary changes Richard Henderson
2023-03-01 11:07 ` [PULL 00/62] tcg patch queue Peter Maydell

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