From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, "Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PULL 57/62] target/mips: Don't use tcg_temp_local_new
Date: Tue, 28 Feb 2023 16:56:38 -1000 [thread overview]
Message-ID: <20230301025643.1227244-58-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230301025643.1227244-1-richard.henderson@linaro.org>
Since tcg_temp_new is now identical, use that.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/mips/tcg/translate.c | 57 ++++++------------------
target/mips/tcg/nanomips_translate.c.inc | 4 +-
2 files changed, 16 insertions(+), 45 deletions(-)
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index bd70fcad25..8cad3d15a0 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -2400,7 +2400,7 @@ static void gen_arith_imm(DisasContext *ctx, uint32_t opc,
switch (opc) {
case OPC_ADDI:
{
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label();
@@ -2434,7 +2434,7 @@ static void gen_arith_imm(DisasContext *ctx, uint32_t opc,
#if defined(TARGET_MIPS64)
case OPC_DADDI:
{
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label();
@@ -2630,7 +2630,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc,
switch (opc) {
case OPC_ADD:
{
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label();
@@ -2666,7 +2666,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc,
break;
case OPC_SUB:
{
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label();
@@ -2707,7 +2707,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc,
#if defined(TARGET_MIPS64)
case OPC_DADD:
{
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label();
@@ -2741,7 +2741,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc,
break;
case OPC_DSUB:
{
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
TCGv t2 = tcg_temp_new();
TCGLabel *l1 = gen_new_label();
@@ -3759,26 +3759,8 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc,
return;
}
- switch (opc) {
- case OPC_MULT_G_2E:
- case OPC_MULT_G_2F:
- case OPC_MULTU_G_2E:
- case OPC_MULTU_G_2F:
-#if defined(TARGET_MIPS64)
- case OPC_DMULT_G_2E:
- case OPC_DMULT_G_2F:
- case OPC_DMULTU_G_2E:
- case OPC_DMULTU_G_2F:
-#endif
- t0 = tcg_temp_new();
- t1 = tcg_temp_new();
- break;
- default:
- t0 = tcg_temp_local_new();
- t1 = tcg_temp_local_new();
- break;
- }
-
+ t0 = tcg_temp_new();
+ t1 = tcg_temp_new();
gen_load_gpr(t0, rs);
gen_load_gpr(t1, rt);
@@ -3955,21 +3937,10 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt)
TCGCond cond;
opc = MASK_LMMI(ctx->opcode);
- switch (opc) {
- case OPC_ADD_CP2:
- case OPC_SUB_CP2:
- case OPC_DADD_CP2:
- case OPC_DSUB_CP2:
- t0 = tcg_temp_local_new_i64();
- t1 = tcg_temp_local_new_i64();
- break;
- default:
- t0 = tcg_temp_new_i64();
- t1 = tcg_temp_new_i64();
- break;
- }
-
check_cp1_enabled(ctx);
+
+ t0 = tcg_temp_new_i64();
+ t1 = tcg_temp_new_i64();
gen_load_fpr64(ctx, t0, rs);
gen_load_fpr64(ctx, t1, rt);
@@ -8650,7 +8621,7 @@ static void gen_mftr(CPUMIPSState *env, DisasContext *ctx, int rt, int rd,
int u, int sel, int h)
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
if ((env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) == 0 &&
((env->tcs[other_tc].CP0_TCBind & (0xf << CP0TCBd_CurVPE)) !=
@@ -8878,7 +8849,7 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
int u, int sel, int h)
{
int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
gen_load_gpr(t0, rt);
if ((env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP)) == 0 &&
@@ -11409,7 +11380,7 @@ static void gen_flt3_arith(DisasContext *ctx, uint32_t opc,
case OPC_ALNV_PS:
check_ps(ctx);
{
- TCGv t0 = tcg_temp_local_new();
+ TCGv t0 = tcg_temp_new();
TCGv_i32 fp = tcg_temp_new_i32();
TCGv_i32 fph = tcg_temp_new_i32();
TCGLabel *l1 = gen_new_label();
diff --git a/target/mips/tcg/nanomips_translate.c.inc b/target/mips/tcg/nanomips_translate.c.inc
index 812c111e3c..faf6d679bd 100644
--- a/target/mips/tcg/nanomips_translate.c.inc
+++ b/target/mips/tcg/nanomips_translate.c.inc
@@ -1017,8 +1017,8 @@ static void gen_llwp(DisasContext *ctx, uint32_t base, int16_t offset,
static void gen_scwp(DisasContext *ctx, uint32_t base, int16_t offset,
uint32_t reg1, uint32_t reg2, bool eva)
{
- TCGv taddr = tcg_temp_local_new();
- TCGv lladdr = tcg_temp_local_new();
+ TCGv taddr = tcg_temp_new();
+ TCGv lladdr = tcg_temp_new();
TCGv_i64 tval = tcg_temp_new_i64();
TCGv_i64 llval = tcg_temp_new_i64();
TCGv_i64 val = tcg_temp_new_i64();
--
2.34.1
next prev parent reply other threads:[~2023-03-01 3:04 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-01 2:55 [PULL 00/62] tcg patch queue Richard Henderson
2023-03-01 2:55 ` [PULL 01/62] exec/helper-head: Include missing "fpu/softfloat-types.h" header Richard Henderson
2023-03-01 2:55 ` [PULL 02/62] softmmu: Use memmove in flatview_write_continue Richard Henderson
2023-03-01 2:55 ` [PULL 03/62] accel/tcg: Add 'size' param to probe_access_flags() Richard Henderson
2023-03-01 2:55 ` [PULL 04/62] accel/tcg: Add 'size' param to probe_access_full Richard Henderson
2023-03-01 2:55 ` [PULL 05/62] include/exec: Introduce `CF_PCREL` Richard Henderson
2023-03-01 2:55 ` [PULL 06/62] target/i386: set `CF_PCREL` in `x86_cpu_realizefn` Richard Henderson
2023-03-01 2:55 ` [PULL 07/62] target/arm: set `CF_PCREL` in `arm_cpu_realizefn` Richard Henderson
2023-03-01 2:55 ` [PULL 08/62] accel/tcg: Replace `TARGET_TB_PCREL` with `CF_PCREL` Richard Henderson
2023-03-01 2:55 ` [PULL 09/62] include/exec: " Richard Henderson
2023-03-01 2:55 ` [PULL 10/62] target/arm: " Richard Henderson
2023-03-01 2:55 ` [PULL 11/62] target/i386: " Richard Henderson
2023-03-01 2:55 ` [PULL 12/62] include/exec: Remove `TARGET_TB_PCREL` define Richard Henderson
2023-03-01 2:55 ` [PULL 13/62] target/arm: " Richard Henderson
2023-03-01 2:55 ` [PULL 14/62] target/i386: " Richard Henderson
2023-03-01 2:55 ` [PULL 15/62] accel/tcg: Move jmp-cache `CF_PCREL` checks to caller Richard Henderson
2023-03-01 2:55 ` [PULL 16/62] accel/tcg: Replace `tb_pc()` with `tb->pc` Richard Henderson
2023-03-01 2:55 ` [PULL 17/62] target/tricore: " Richard Henderson
2023-03-01 2:55 ` [PULL 18/62] target/sparc: " Richard Henderson
2023-03-01 2:56 ` [PULL 19/62] target/sh4: " Richard Henderson
2023-03-01 2:56 ` [PULL 20/62] target/rx: " Richard Henderson
2023-03-01 2:56 ` [PULL 21/62] target/riscv: " Richard Henderson
2023-03-01 2:56 ` [PULL 22/62] target/openrisc: " Richard Henderson
2023-03-01 2:56 ` [PULL 23/62] target/mips: " Richard Henderson
2023-03-01 2:56 ` [PULL 24/62] target/microblaze: " Richard Henderson
2023-03-01 2:56 ` [PULL 25/62] target/loongarch: " Richard Henderson
2023-03-01 2:56 ` [PULL 26/62] target/i386: " Richard Henderson
2023-03-01 2:56 ` [PULL 27/62] target/hppa: " Richard Henderson
2023-03-01 2:56 ` [PULL 28/62] target/hexagon: " Richard Henderson
2023-03-01 2:56 ` [PULL 29/62] target/avr: " Richard Henderson
2023-03-01 2:56 ` [PULL 30/62] target/arm: " Richard Henderson
2023-03-01 2:56 ` [PULL 31/62] include/exec: Remove `tb_pc()` Richard Henderson
2023-03-01 2:56 ` [PULL 32/62] tcg: Adjust TCGContext.temps_in_use check Richard Henderson
2023-03-01 2:56 ` [PULL 33/62] accel/tcg: Pass max_insn to gen_intermediate_code by pointer Richard Henderson
2023-03-01 2:56 ` [PULL 34/62] accel/tcg: Use more accurate max_insns for tb_overflow Richard Henderson
2023-03-01 2:56 ` [PULL 35/62] tcg: Remove branch-to-next regardless of reference count Richard Henderson
2023-03-01 2:56 ` [PULL 36/62] tcg: Rename TEMP_LOCAL to TEMP_TB Richard Henderson
2023-03-01 2:56 ` [PULL 37/62] tcg: Use noinline for major tcg_gen_code subroutines Richard Henderson
2023-03-01 2:56 ` [PULL 38/62] tcg: Add liveness_pass_0 Richard Henderson
2023-03-01 2:56 ` [PULL 39/62] tcg: Remove TEMP_NORMAL Richard Henderson
2023-03-01 2:56 ` [PULL 40/62] tcg: Pass TCGTempKind to tcg_temp_new_internal Richard Henderson
2023-03-01 2:56 ` [PULL 41/62] tcg: Use tcg_constant_i32 in tcg_gen_io_start Richard Henderson
2023-03-01 2:56 ` [PULL 42/62] tcg: Add tcg_gen_movi_ptr Richard Henderson
2023-03-01 2:56 ` [PULL 43/62] tcg: Add tcg_temp_ebb_new_{i32,i64,ptr} Richard Henderson
2023-03-01 2:56 ` [PULL 44/62] tcg: Use tcg_temp_ebb_new_* in tcg/ Richard Henderson
2023-03-01 2:56 ` [PULL 45/62] tcg: Use tcg_constant_ptr in do_dup Richard Henderson
2023-03-01 2:56 ` [PULL 46/62] accel/tcg/plugin: Use tcg_temp_ebb_* Richard Henderson
2023-03-01 2:56 ` [PULL 47/62] accel/tcg/plugin: Tidy plugin_gen_disable_mem_helpers Richard Henderson
2023-03-01 2:56 ` [PULL 48/62] tcg: Don't re-use TEMP_TB temporaries Richard Henderson
2023-03-01 2:56 ` [PULL 49/62] tcg: Change default temp lifetime to TEMP_TB Richard Henderson
2023-03-01 2:56 ` [PULL 50/62] target/arm: Drop copies in gen_sve_{ldr,str} Richard Henderson
2023-03-01 2:56 ` [PULL 51/62] target/arm: Don't use tcg_temp_local_new_* Richard Henderson
2023-03-01 2:56 ` [PULL 52/62] target/cris: Don't use tcg_temp_local_new Richard Henderson
2023-03-01 2:56 ` [PULL 53/62] target/hexagon: Don't use tcg_temp_local_new_* Richard Henderson
2023-03-01 2:56 ` [PULL 54/62] target/hexagon/idef-parser: Drop gen_tmp_local Richard Henderson
2023-03-01 2:56 ` [PULL 55/62] target/hppa: Don't use tcg_temp_local_new Richard Henderson
2023-03-01 2:56 ` [PULL 56/62] target/i386: " Richard Henderson
2023-03-01 2:56 ` Richard Henderson [this message]
2023-03-01 2:56 ` [PULL 58/62] target/ppc: " Richard Henderson
2023-03-01 2:56 ` [PULL 59/62] target/xtensa: Don't use tcg_temp_local_new_* Richard Henderson
2023-03-01 2:56 ` [PULL 60/62] exec/gen-icount: Don't use tcg_temp_local_new_i32 Richard Henderson
2023-03-01 2:56 ` [PULL 61/62] tcg: Remove tcg_temp_local_new_*, tcg_const_local_* Richard Henderson
2023-03-01 2:56 ` [PULL 62/62] tcg: Update docs/devel/tcg-ops.rst for temporary changes Richard Henderson
2023-03-01 11:07 ` [PULL 00/62] tcg patch queue Peter Maydell
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