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From: "Michael S. Tsirkin" <mst@redhat.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Cc: "Jonathan Cameron" <Jonathan.Cameron@huawei.com>,
	qemu <qemu-devel@nongnu.org>,
	"Ben Widawsky" <bwidawsk@kernel.org>,
	linux-cxl@vger.kernel.org, linuxarm@huawei.com,
	"Ira Weiny" <ira.weiny@intel.com>,
	"Gregory Price" <gourry.memverge@gmail.com>,
	"Mike Maslenkin" <mike.maslenkin@gmail.com>,
	"Dave Jiang" <dave.jiang@intel.com>,
	"Markus Armbruster" <armbru@redhat.com>,
	"Marc-André Lureau" <marcandre.lureau@redhat.com>,
	"Thomas Huth" <thuth@redhat.com>,
	"Michael Roth" <michael.roth@amd.com>
Subject: Re: [PATCH v6 8/8] hw/mem/cxl_type3: Add CXL RAS Error Injection Support.
Date: Thu, 2 Mar 2023 05:55:00 -0500	[thread overview]
Message-ID: <20230302055254-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <e9287de7-94a6-944b-1627-3fa8f7f1a9bc@linaro.org>

On Thu, Mar 02, 2023 at 11:49:52AM +0100, Philippe Mathieu-Daudé wrote:
> On 2/3/23 11:06, Jonathan Cameron wrote:
> > +CC Michael Roth.
> > 
> > Michael Tsirkin noted I'd missed CCing QAPI maintaintainers on the
> > poison injection series so I went back to check the others I had out for review.
> > For this series I'd managed to pick up one of two as Markus gave comments on
> > earlier versions.
> 
> Now LGTM for meson/QAPI (although I'm not a QAPI maintainer).
> 
> Hopefully MST can take your series just in time for soft freeze.


Bottleneck is QAPI right now. Consider CC Eric and maybe Daniel
because Daniel is awesome and has been helping out with lots
of stuff among them QAPI.

> > On Mon, 27 Feb 2023 11:27:51 +0000
> > Jonathan Cameron via <qemu-devel@nongnu.org> wrote:
> > 
> > > CXL uses PCI AER Internal errors to signal to the host that an error has
> > > occurred. The host can then read more detailed status from the CXL RAS
> > > capability.
> > > 
> > > For uncorrectable errors: support multiple injection in one operation
> > > as this is needed to reliably test multiple header logging support in an
> > > OS. The equivalent feature doesn't exist for correctable errors, so only
> > > one error need be injected at a time.
> > > 
> > > Note:
> > >   - Header content needs to be manually specified in a fashion that
> > >     matches the specification for what can be in the header for each
> > >     error type.
> > > 
> > > Injection via QMP:
> > > { "execute": "qmp_capabilities" }
> > > ...
> > > { "execute": "cxl-inject-uncorrectable-errors",
> > >    "arguments": {
> > >      "path": "/machine/peripheral/cxl-pmem0",
> > >      "errors": [
> > >          {
> > >              "type": "cache-address-parity",
> > >              "header": [ 3, 4]
> > >          },
> > >          {
> > >              "type": "cache-data-parity",
> > >              "header": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31]
> > >          },
> > >          {
> > >              "type": "internal",
> > >              "header": [ 1, 2, 4]
> > >          }
> > >          ]
> > >    }}
> > > ...
> > > { "execute": "cxl-inject-correctable-error",
> > >      "arguments": {
> > >          "path": "/machine/peripheral/cxl-pmem0",
> > >          "type": "physical"
> > >      } }
> > > 
> > > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > > ---
> > > v6: (Thanks to Philippe Mathieu-Daudé)
> > > - Add Since entries in cxl.json
> > > - Add error prints in the stub functions so that if they are called without
> > >    CONFIG_CXL_MEM_DEVICE then we get a useful print rather than just silently
> > >    eating them.
> > > ---
> > >   hw/cxl/cxl-component-utils.c   |   4 +-
> > >   hw/mem/cxl_type3.c             | 281 +++++++++++++++++++++++++++++++++
> > >   hw/mem/cxl_type3_stubs.c       |  17 ++
> > >   hw/mem/meson.build             |   2 +
> > >   include/hw/cxl/cxl_component.h |  26 +++
> > >   include/hw/cxl/cxl_device.h    |  11 ++
> > >   qapi/cxl.json                  | 128 +++++++++++++++
> > >   qapi/meson.build               |   1 +
> > >   qapi/qapi-schema.json          |   1 +
> > >   9 files changed, 470 insertions(+), 1 deletion(-)



  reply	other threads:[~2023-03-02 10:55 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-27 11:27 [PATCH v6 0/8] hw/cxl: RAS error emulation and injection Jonathan Cameron via
2023-02-27 11:27 ` [PATCH v6 1/8] hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register Jonathan Cameron via
2023-02-27 11:27 ` [PATCH v6 2/8] hw/pci/aer: Add missing routing for AER errors Jonathan Cameron via
2023-02-27 11:27 ` [PATCH v6 3/8] hw/pci-bridge/cxl_root_port: Wire up AER Jonathan Cameron via
2023-02-27 11:27 ` [PATCH v6 4/8] hw/pci-bridge/cxl_root_port: Wire up MSI Jonathan Cameron via
2023-02-27 11:27 ` [PATCH v6 5/8] hw/mem/cxl-type3: Add AER extended capability Jonathan Cameron via
2023-02-27 11:27 ` [PATCH v6 6/8] hw/cxl: Fix endian issues in CXL RAS capability defaults / masks Jonathan Cameron via
2023-02-27 11:27 ` [PATCH v6 7/8] hw/pci/aer: Make PCIE AER error injection facility available for other emulation to use Jonathan Cameron via
2023-02-27 11:27 ` [PATCH v6 8/8] hw/mem/cxl_type3: Add CXL RAS Error Injection Support Jonathan Cameron via
2023-03-02 10:06   ` Jonathan Cameron via
2023-03-02 10:49     ` Philippe Mathieu-Daudé
2023-03-02 10:55       ` Michael S. Tsirkin [this message]
2023-03-02 17:22         ` Jonathan Cameron via

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