From: Tao Su <tao1.su@linux.intel.com>
To: qemu-devel@nongnu.org
Cc: pbonzini@redhat.com, richard.henderson@linaro.org,
yang.zhong@intel.com, jing2.liu@intel.com, vkuznets@redhat.com,
philmd@linaro.org
Subject: [PATCH v2 1/6] target/i386: Add support for CMPCCXADD in CPUID enumeration
Date: Fri, 3 Mar 2023 14:59:08 +0800 [thread overview]
Message-ID: <20230303065913.1246327-2-tao1.su@linux.intel.com> (raw)
In-Reply-To: <20230303065913.1246327-1-tao1.su@linux.intel.com>
From: Jiaxi Chen <jiaxi.chen@linux.intel.com>
CMPccXADD is a new set of instructions in the latest Intel platform
Sierra Forest. This new instruction set includes a semaphore operation
that can compare and add the operands if condition is met, which can
improve database performance.
The bit definition:
CPUID.(EAX=7,ECX=1):EAX[bit 7]
Add CPUID definition for CMPCCXADD.
Signed-off-by: Jiaxi Chen <jiaxi.chen@linux.intel.com>
Signed-off-by: Tao Su <tao1.su@linux.intel.com>
---
target/i386/cpu.c | 2 +-
target/i386/cpu.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 4bad3d41d3..e54e13d050 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -872,7 +872,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
.type = CPUID_FEATURE_WORD,
.feat_names = {
NULL, NULL, NULL, NULL,
- "avx-vnni", "avx512-bf16", NULL, NULL,
+ "avx-vnni", "avx512-bf16", NULL, "cmpccxadd",
NULL, NULL, "fzrm", "fsrs",
"fsrc", NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index ea650e68a3..7df8f4b8f9 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -904,6 +904,8 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w,
#define CPUID_7_1_EAX_AVX_VNNI (1U << 4)
/* AVX512 BFloat16 Instruction */
#define CPUID_7_1_EAX_AVX512_BF16 (1U << 5)
+/* CMPCCXADD Instructions */
+#define CPUID_7_1_EAX_CMPCCXADD (1U << 7)
/* Fast Zero REP MOVS */
#define CPUID_7_1_EAX_FZRM (1U << 10)
/* Fast Short REP STOS */
--
2.34.1
next prev parent reply other threads:[~2023-03-03 7:01 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-03 6:59 [PATCH v2 0/6] target/i386: Support new Intel platform Instructions in CPUID enumeration Tao Su
2023-03-03 6:59 ` Tao Su [this message]
2023-03-03 6:59 ` [PATCH v2 2/6] target/i386: Add support for AMX-FP16 " Tao Su
2023-03-03 6:59 ` [PATCH v2 3/6] target/i386: Add support for AVX-IFMA " Tao Su
2023-03-03 6:59 ` [PATCH v2 4/6] target/i386: Add support for AVX-VNNI-INT8 " Tao Su
2023-03-03 6:59 ` [PATCH v2 5/6] target/i386: Add support for AVX-NE-CONVERT " Tao Su
2023-03-03 6:59 ` [PATCH v2 6/6] target/i386: Add support for PREFETCHIT0/1 " Tao Su
2023-03-04 4:04 ` [PATCH v2 0/6] target/i386: Support new Intel platform Instructions " Xiaoyao Li
2023-04-26 12:24 ` Paolo Bonzini
2023-04-27 1:39 ` Tao Su
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