From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Artyom Tarasenko" <atar4qemu@gmail.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
"Paul Burton" <paulburton@kernel.org>,
"Huacai Chen" <chenhuacai@kernel.org>,
"BALATON Zoltan" <balaton@eik.bme.hu>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Hervé Poussineau" <hpoussin@reactos.org>,
"Eduardo Habkost" <eduardo@habkost.net>,
qemu-ppc@nongnu.org,
"Richard Henderson" <richard.henderson@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Bernhard Beschow" <shentey@gmail.com>
Subject: [PATCH 1/5] hw/isa/vt82c686: Fix wiring of PIC -> CPU interrupt
Date: Sat, 4 Mar 2023 12:40:39 +0100 [thread overview]
Message-ID: <20230304114043.121024-2-shentey@gmail.com> (raw)
In-Reply-To: <20230304114043.121024-1-shentey@gmail.com>
Commit bb98e0f59cde ("hw/isa/vt82c686: Remove intermediate IRQ forwarder")
passes s->cpu_intr to i8259_init() in via_isa_realize() directly. However,
s->cpu_intr isn't initialized yet since that happens after the south
bridge's pci_realize_and_unref() in board code. Fix this by initializing s-
>cpu_intr before realizing the south bridge.
Fixes: bb98e0f59cde ("hw/isa/vt82c686: Remove intermediate IRQ forwarder")
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
hw/isa/vt82c686.c | 3 ++-
hw/mips/fuloong2e.c | 9 +++++----
hw/ppc/pegasos2.c | 10 ++++++----
3 files changed, 13 insertions(+), 9 deletions(-)
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index f4c40965cd..8900d87f59 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -578,6 +578,8 @@ static void via_isa_init(Object *obj)
object_initialize_child(obj, "uhci2", &s->uhci[1], TYPE_VT82C686B_USB_UHCI);
object_initialize_child(obj, "ac97", &s->ac97, TYPE_VIA_AC97);
object_initialize_child(obj, "mc97", &s->mc97, TYPE_VIA_MC97);
+
+ qdev_init_gpio_out(DEVICE(obj), &s->cpu_intr, 1);
}
static const TypeInfo via_isa_info = {
@@ -606,7 +608,6 @@ static void via_isa_realize(PCIDevice *d, Error **errp)
ISABus *isa_bus;
int i;
- qdev_init_gpio_out(dev, &s->cpu_intr, 1);
isa_bus = isa_bus_new(dev, pci_address_space(d), pci_address_space_io(d),
errp);
diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index cfc8ca6ae4..30944f8fe7 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -295,14 +295,15 @@ static void mips_fuloong2e_init(MachineState *machine)
pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
/* South bridge -> IP5 */
- pci_dev = pci_create_simple_multifunction(pci_bus,
- PCI_DEVFN(FULOONG2E_VIA_SLOT, 0),
- true, TYPE_VT82C686B_ISA);
+ pci_dev = pci_new_multifunction(PCI_DEVFN(FULOONG2E_VIA_SLOT, 0), true,
+ TYPE_VT82C686B_ISA);
+ qdev_connect_gpio_out(DEVICE(pci_dev), 0, env->irq[5]);
+ pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
+
object_property_add_alias(OBJECT(machine), "rtc-time",
object_resolve_path_component(OBJECT(pci_dev),
"rtc"),
"date");
- qdev_connect_gpio_out(DEVICE(pci_dev), 0, env->irq[5]);
dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide"));
pci_ide_create_devs(PCI_DEVICE(dev));
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
index 7cc375df05..b0ada9c963 100644
--- a/hw/ppc/pegasos2.c
+++ b/hw/ppc/pegasos2.c
@@ -159,13 +159,15 @@ static void pegasos2_init(MachineState *machine)
pci_bus = mv64361_get_pci_bus(pm->mv, 1);
/* VIA VT8231 South Bridge (multifunction PCI device) */
- via = OBJECT(pci_create_simple_multifunction(pci_bus, PCI_DEVFN(12, 0),
- true, TYPE_VT8231_ISA));
+ via = OBJECT(pci_new_multifunction(PCI_DEVFN(12, 0), true,
+ TYPE_VT8231_ISA));
+ qdev_connect_gpio_out(DEVICE(via), 0,
+ qdev_get_gpio_in_named(pm->mv, "gpp", 31));
+ pci_realize_and_unref(PCI_DEVICE(via), pci_bus, &error_fatal);
+
object_property_add_alias(OBJECT(machine), "rtc-time",
object_resolve_path_component(via, "rtc"),
"date");
- qdev_connect_gpio_out(DEVICE(via), 0,
- qdev_get_gpio_in_named(pm->mv, "gpp", 31));
dev = PCI_DEVICE(object_resolve_path_component(via, "ide"));
pci_ide_create_devs(dev);
--
2.39.2
next prev parent reply other threads:[~2023-03-04 11:42 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-04 11:40 [PATCH 0/5] Fix recent PIC -> CPU interrupt wiring regressions Bernhard Beschow
2023-03-04 11:40 ` Bernhard Beschow [this message]
2023-03-04 13:11 ` [PATCH 1/5] hw/isa/vt82c686: Fix wiring of PIC -> CPU interrupt BALATON Zoltan
2023-03-04 11:40 ` [PATCH 2/5] hw/alpha/dp264: " Bernhard Beschow
2023-03-04 11:40 ` [PATCH 3/5] hw/ppc/prep: " Bernhard Beschow
2023-05-27 18:00 ` Daniel Henrique Barboza
2023-03-04 11:40 ` [PATCH 4/5] hw/pci/pci: Remove multifunction parameter from pci_create_simple_multifunction() Bernhard Beschow
2023-03-04 11:40 ` [PATCH 5/5] hw/pci/pci: Remove multifunction parameter from pci_new_multifunction() Bernhard Beschow
2023-03-04 11:54 ` [PATCH 0/5] Fix recent PIC -> CPU interrupt wiring regressions Bernhard Beschow
2023-03-04 13:29 ` BALATON Zoltan
2023-03-04 14:13 ` Peter Maydell
2023-03-05 10:01 ` Michael S. Tsirkin
2023-03-06 23:59 ` Mark Cave-Ayland
2023-03-07 11:06 ` Philippe Mathieu-Daudé
2023-03-07 17:32 ` Michael S. Tsirkin
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