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From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: Eduardo Habkost <eduardo@habkost.net>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
	Bernhard Beschow <shentey@gmail.com>
Subject: [PATCH v2 04/13] hw/pci-host/q35: Initialize PCMachineState::bus in board code
Date: Sat,  4 Mar 2023 16:26:39 +0100	[thread overview]
Message-ID: <20230304152648.103749-5-shentey@gmail.com> (raw)
In-Reply-To: <20230304152648.103749-1-shentey@gmail.com>

The Q35 PCI host currently sets the PC machine's PCI bus attribute
through global state, thereby assuming the machine to be a PC machine.
The Q35 machine code already holds on to Q35's pci bus attribute, so can
easily set its own property while preserving encapsulation.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 hw/i386/pc_q35.c  | 4 +++-
 hw/pci-host/q35.c | 1 -
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 68097bea55..42e79433a5 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -231,10 +231,12 @@ static void pc_q35_init(MachineState *machine)
                             x86ms->below_4g_mem_size, NULL);
     object_property_set_int(phb, PCI_HOST_ABOVE_4G_MEM_SIZE,
                             x86ms->above_4g_mem_size, NULL);
+    sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal);
 
     /* pci */
-    sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal);
     host_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pcie.0"));
+    pcms->bus = host_bus;
+
     /* create ISA bus */
     lpc = pci_new_multifunction(PCI_DEVFN(ICH9_LPC_DEV, ICH9_LPC_FUNC), true,
                                 TYPE_ICH9_LPC_DEVICE);
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 0497194983..9d21915a55 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -66,7 +66,6 @@ static void q35_host_realize(DeviceState *dev, Error **errp)
                                 s->mch.pci_address_space,
                                 s->mch.address_space_io,
                                 0, TYPE_PCIE_BUS);
-    PC_MACHINE(qdev_get_machine())->bus = pci->bus;
     pci->bypass_iommu =
         PC_MACHINE(qdev_get_machine())->default_bus_bypass_iommu;
     qdev_realize(DEVICE(&s->mch), BUS(pci->bus), &error_fatal);
-- 
2.39.2



  parent reply	other threads:[~2023-03-04 15:28 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-04 15:26 [PATCH v2 00/13] Q35 PCI host fixes and QOM cleanup Bernhard Beschow
2023-03-04 15:26 ` [PATCH v2 01/13] hw/i386/pc_q35: Resolve redundant q35_host variable Bernhard Beschow
2023-03-04 15:26 ` [PATCH v2 02/13] hw/pci-host/q35: Fix double, contradicting .endianness assignment Bernhard Beschow
2023-03-04 15:26 ` [PATCH v2 03/13] hw/pci-host/q35: Use memory_region_set_address() also for tseg_blackhole Bernhard Beschow
2023-03-04 15:26 ` Bernhard Beschow [this message]
2023-03-04 15:26 ` [PATCH v2 05/13] hw/pci/pci_host: Introduce PCI_HOST_BYPASS_IOMMU macro Bernhard Beschow
2023-03-04 15:26 ` [PATCH v2 06/13] hw/pci-host/q35: Initialize "bypass-iommu" property from board code Bernhard Beschow
2023-03-04 15:26 ` [PATCH v2 07/13] hw/pci-host/q35: Initialize properties just once Bernhard Beschow
2023-03-04 15:26 ` [PATCH v2 08/13] hw/pci-host/q35: Initialize PCI hole boundaries " Bernhard Beschow
2023-03-04 15:26 ` [PATCH v2 09/13] hw/pci-host/q35: Turn PCI hole properties into class properties Bernhard Beschow
2023-03-04 15:26 ` [PATCH v2 10/13] hw/pci-host/q35: Rename local variable to more idiomatic "phb" Bernhard Beschow
2023-03-04 15:26 ` [PATCH v2 11/13] hw/pci-host/q35: Propagate to errp rather than doing error_fatal Bernhard Beschow
2023-03-04 15:26 ` [PATCH v2 12/13] hw/pci-host/q35: Merge mch_realize() into q35_host_realize() Bernhard Beschow
2023-03-04 15:26 ` [PATCH v2 13/13] hw/pci-host/q35: Move MemoryRegion pointers to host device Bernhard Beschow

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