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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, Taylor Simpson <tsimpson@quicinc.com>
Subject: [PULL 02/84] tcg: Link branches to the labels
Date: Sun,  5 Mar 2023 16:38:32 -0800	[thread overview]
Message-ID: <20230306003954.1866998-3-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230306003954.1866998-1-richard.henderson@linaro.org>

This allows us to easily find all branches that use a label.
Since 'refs' is only tested vs zero, remove it and test for
an empty list instead.  Drop the use of bitfields, which had
been used to pack refs into a single 32-bit word.

Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/tcg/tcg-op.h |  7 +------
 include/tcg/tcg.h    | 19 +++++++++++++------
 tcg/tcg-op.c         | 22 +++++++++++++++++++---
 tcg/tcg.c            | 30 ++++++++++++++++++++----------
 4 files changed, 53 insertions(+), 25 deletions(-)

diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h
index 353d430a63..70856147c5 100644
--- a/include/tcg/tcg-op.h
+++ b/include/tcg/tcg-op.h
@@ -259,12 +259,7 @@ static inline void gen_set_label(TCGLabel *l)
     tcg_gen_op1(INDEX_op_set_label, label_arg(l));
 }
 
-static inline void tcg_gen_br(TCGLabel *l)
-{
-    l->refs++;
-    tcg_gen_op1(INDEX_op_br, label_arg(l));
-}
-
+void tcg_gen_br(TCGLabel *l);
 void tcg_gen_mb(TCGBar);
 
 /* Helper calls. */
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index 7e2b954dbc..0dc88011ce 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -238,16 +238,23 @@ struct TCGRelocation {
     int type;
 };
 
+typedef struct TCGOp TCGOp;
+typedef struct TCGLabelUse TCGLabelUse;
+struct TCGLabelUse {
+    QSIMPLEQ_ENTRY(TCGLabelUse) next;
+    TCGOp *op;
+};
+
 typedef struct TCGLabel TCGLabel;
 struct TCGLabel {
-    unsigned present : 1;
-    unsigned has_value : 1;
-    unsigned id : 14;
-    unsigned refs : 16;
+    bool present;
+    bool has_value;
+    uint16_t id;
     union {
         uintptr_t value;
         const tcg_insn_unit *value_ptr;
     } u;
+    QSIMPLEQ_HEAD(, TCGLabelUse) branches;
     QSIMPLEQ_HEAD(, TCGRelocation) relocs;
     QSIMPLEQ_ENTRY(TCGLabel) next;
 };
@@ -487,7 +494,7 @@ typedef struct TCGTempSet {
 #define SYNC_ARG  (1 << 0)
 typedef uint32_t TCGLifeData;
 
-typedef struct TCGOp {
+struct TCGOp {
     TCGOpcode opc   : 8;
     unsigned nargs  : 8;
 
@@ -506,7 +513,7 @@ typedef struct TCGOp {
 
     /* Arguments for the opcode.  */
     TCGArg args[];
-} TCGOp;
+};
 
 #define TCGOP_CALLI(X)    (X)->param1
 #define TCGOP_CALLO(X)    (X)->param2
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index f2269a1b91..77658a88f0 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -84,6 +84,22 @@ void tcg_gen_op6(TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3,
     op->args[5] = a6;
 }
 
+/* Generic ops.  */
+
+static void add_last_as_label_use(TCGLabel *l)
+{
+    TCGLabelUse *u = tcg_malloc(sizeof(TCGLabelUse));
+
+    u->op = tcg_last_op();
+    QSIMPLEQ_INSERT_TAIL(&l->branches, u, next);
+}
+
+void tcg_gen_br(TCGLabel *l)
+{
+    tcg_gen_op1(INDEX_op_br, label_arg(l));
+    add_last_as_label_use(l);
+}
+
 void tcg_gen_mb(TCGBar mb_type)
 {
     if (tcg_ctx->gen_tb->cflags & CF_PARALLEL) {
@@ -216,8 +232,8 @@ void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *l)
     if (cond == TCG_COND_ALWAYS) {
         tcg_gen_br(l);
     } else if (cond != TCG_COND_NEVER) {
-        l->refs++;
         tcg_gen_op4ii_i32(INDEX_op_brcond_i32, arg1, arg2, cond, label_arg(l));
+        add_last_as_label_use(l);
     }
 }
 
@@ -1474,7 +1490,6 @@ void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *l)
     if (cond == TCG_COND_ALWAYS) {
         tcg_gen_br(l);
     } else if (cond != TCG_COND_NEVER) {
-        l->refs++;
         if (TCG_TARGET_REG_BITS == 32) {
             tcg_gen_op6ii_i32(INDEX_op_brcond2_i32, TCGV_LOW(arg1),
                               TCGV_HIGH(arg1), TCGV_LOW(arg2),
@@ -1483,6 +1498,7 @@ void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *l)
             tcg_gen_op4ii_i64(INDEX_op_brcond_i64, arg1, arg2, cond,
                               label_arg(l));
         }
+        add_last_as_label_use(l);
     }
 }
 
@@ -1493,12 +1509,12 @@ void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *l)
     } else if (cond == TCG_COND_ALWAYS) {
         tcg_gen_br(l);
     } else if (cond != TCG_COND_NEVER) {
-        l->refs++;
         tcg_gen_op6ii_i32(INDEX_op_brcond2_i32,
                           TCGV_LOW(arg1), TCGV_HIGH(arg1),
                           tcg_constant_i32(arg2),
                           tcg_constant_i32(arg2 >> 32),
                           cond, label_arg(l));
+        add_last_as_label_use(l);
     }
 }
 
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 6b830ade4c..0b93359d3c 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -283,6 +283,7 @@ TCGLabel *gen_new_label(void)
 
     memset(l, 0, sizeof(TCGLabel));
     l->id = s->nb_labels++;
+    QSIMPLEQ_INIT(&l->branches);
     QSIMPLEQ_INIT(&l->relocs);
 
     QSIMPLEQ_INSERT_TAIL(&s->labels, l, next);
@@ -2520,23 +2521,32 @@ static void process_op_defs(TCGContext *s)
     }
 }
 
+static void remove_label_use(TCGOp *op, int idx)
+{
+    TCGLabel *label = arg_label(op->args[idx]);
+    TCGLabelUse *use;
+
+    QSIMPLEQ_FOREACH(use, &label->branches, next) {
+        if (use->op == op) {
+            QSIMPLEQ_REMOVE(&label->branches, use, TCGLabelUse, next);
+            return;
+        }
+    }
+    g_assert_not_reached();
+}
+
 void tcg_op_remove(TCGContext *s, TCGOp *op)
 {
-    TCGLabel *label;
-
     switch (op->opc) {
     case INDEX_op_br:
-        label = arg_label(op->args[0]);
-        label->refs--;
+        remove_label_use(op, 0);
         break;
     case INDEX_op_brcond_i32:
     case INDEX_op_brcond_i64:
-        label = arg_label(op->args[3]);
-        label->refs--;
+        remove_label_use(op, 3);
         break;
     case INDEX_op_brcond2_i32:
-        label = arg_label(op->args[5]);
-        label->refs--;
+        remove_label_use(op, 5);
         break;
     default:
         break;
@@ -2648,7 +2658,7 @@ reachable_code_pass(TCGContext *s)
                 dead = false;
             }
 
-            if (label->refs == 0) {
+            if (QSIMPLEQ_EMPTY(&label->branches)) {
                 /*
                  * While there is an occasional backward branch, virtually
                  * all branches generated by the translators are forward.
@@ -4892,7 +4902,7 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb, target_ulong pc_start)
         bool error = false;
 
         QSIMPLEQ_FOREACH(l, &s->labels, next) {
-            if (unlikely(!l->present) && l->refs) {
+            if (unlikely(!l->present) && !QSIMPLEQ_EMPTY(&l->branches)) {
                 qemu_log_mask(CPU_LOG_TB_OP,
                               "$L%d referenced but not present.\n", l->id);
                 error = true;
-- 
2.34.1



  parent reply	other threads:[~2023-03-06  0:40 UTC|newest]

Thread overview: 86+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-06  0:38 [PULL 00/84] tcg patch queue Richard Henderson
2023-03-06  0:38 ` [PULL 01/84] tcg: Include "qemu/timer.h" for profile_getclock Richard Henderson
2023-03-06  0:38 ` Richard Henderson [this message]
2023-03-06  0:38 ` [PULL 03/84] tcg: Merge two sequential labels Richard Henderson
2023-03-06  0:38 ` [PULL 04/84] target/sparc: Use tlb_set_page_full Richard Henderson
2023-03-06  0:38 ` [PULL 05/84] accel/tcg: Retain prot flags from tlb_fill Richard Henderson
2023-03-06  0:38 ` [PULL 06/84] accel/tcg: Honor TLB_DISCARD_WRITE in atomic_mmu_lookup Richard Henderson
2023-03-06  0:38 ` [PULL 07/84] softmmu: Check watchpoints for read+write at once Richard Henderson
2023-03-06  0:38 ` [PULL 08/84] accel/tcg: Trigger watchpoints from atomic_mmu_lookup Richard Henderson
2023-03-06  0:38 ` [PULL 09/84] include/qemu/cpuid: Introduce xgetbv_low Richard Henderson
2023-03-06  0:38 ` [PULL 10/84] tcg/i386: Mark Win64 call-saved vector regs as reserved Richard Henderson
2023-03-06  0:38 ` [PULL 11/84] tcg: Decode the operand to INDEX_op_mb in dumps Richard Henderson
2023-03-06  0:38 ` [PULL 12/84] tcg: Remove tcg_check_temp_count, tcg_clear_temp_count Richard Henderson
2023-03-06  0:38 ` [PULL 13/84] accel/tcg: Remove translator_loop_temp_check Richard Henderson
2023-03-06  0:38 ` [PULL 14/84] target/alpha: Drop tcg_temp_free Richard Henderson
2023-03-06  0:38 ` [PULL 15/84] target/arm: Remove arm_free_cc, a64_free_cc Richard Henderson
2023-03-06  0:38 ` [PULL 16/84] target/arm: Remove value_global from DisasCompare Richard Henderson
2023-03-06  0:38 ` [PULL 17/84] target/arm: Drop tcg_temp_free from translator.c Richard Henderson
2023-03-06  0:38 ` [PULL 18/84] target/arm: Drop DisasContext.tmp_a64 Richard Henderson
2023-03-06  0:38 ` [PULL 19/84] target/arm: Drop new_tmp_a64 Richard Henderson
2023-03-06  0:38 ` [PULL 20/84] target/arm: Drop new_tmp_a64_zero Richard Henderson
2023-03-06  0:38 ` [PULL 21/84] target/arm: Drop tcg_temp_free from translator-a64.c Richard Henderson
2023-03-06  0:38 ` [PULL 22/84] target/arm: Drop tcg_temp_free from translator-m-nocp.c Richard Henderson
2023-03-06  0:38 ` [PULL 23/84] target/arm: Drop tcg_temp_free from translator-mve.c Richard Henderson
2023-03-06  0:38 ` [PULL 24/84] target/arm: Drop tcg_temp_free from translator-neon.c Richard Henderson
2023-03-06  0:38 ` [PULL 25/84] target/arm: Drop tcg_temp_free from translator-sme.c Richard Henderson
2023-03-06  0:38 ` [PULL 26/84] target/arm: Drop tcg_temp_free from translator-sve.c Richard Henderson
2023-03-06  0:38 ` [PULL 27/84] target/arm: Drop tcg_temp_free from translator-vfp.c Richard Henderson
2023-03-06  0:38 ` [PULL 28/84] target/arm: Drop tcg_temp_free from translator.h Richard Henderson
2023-03-06  0:38 ` [PULL 29/84] target/avr: Drop DisasContext.free_skip_var0 Richard Henderson
2023-03-06  0:39 ` [PULL 30/84] target/avr: Drop R from trans_COM Richard Henderson
2023-03-06  0:39 ` [PULL 31/84] target/avr: Drop tcg_temp_free Richard Henderson
2023-03-06  0:39 ` [PULL 32/84] target/cris: Drop cris_alu_free_temps Richard Henderson
2023-03-06  0:39 ` [PULL 33/84] target/cris: Drop cris_alu_m_free_temps Richard Henderson
2023-03-06  0:39 ` [PULL 34/84] target/cris: Drop addr from dec10_ind_move_m_pr Richard Henderson
2023-03-06  0:39 ` [PULL 35/84] target/cris: Drop tcg_temp_free Richard Henderson
2023-03-06  0:39 ` [PULL 36/84] target/hexagon: Drop tcg_temp_free from C code Richard Henderson
2023-03-06  0:39 ` [PULL 37/84] target/hexagon: Drop tcg_temp_free from gen_tcg_funcs.py Richard Henderson
2023-03-06  0:39 ` [PULL 38/84] target/hexagon/idef-parser: Drop tcg_temp_free Richard Henderson
2023-03-06  0:39 ` [PULL 39/84] target/hexagon/idef-parser: Drop HexValue.is_manual Richard Henderson
2023-03-06  0:39 ` [PULL 40/84] target/hppa: Drop tcg_temp_free Richard Henderson
2023-03-06  0:39 ` [PULL 41/84] target/loongarch: Drop temp_new Richard Henderson
2023-03-06  0:39 ` [PULL 42/84] target/loongarch: Drop tcg_temp_free Richard Henderson
2023-03-06  0:39 ` [PULL 43/84] target/m68k: Drop mark_to_release Richard Henderson
2023-03-06  0:39 ` [PULL 44/84] target/m68k: Drop free_cond Richard Henderson
2023-03-06  0:39 ` [PULL 45/84] target/m68k: Drop tcg_temp_free Richard Henderson
2023-03-06  0:39 ` [PULL 46/84] target/microblaze: " Richard Henderson
2023-03-06  0:39 ` [PULL 47/84] target/nios2: " Richard Henderson
2023-03-06  0:39 ` [PULL 48/84] target/openrisc: " Richard Henderson
2023-03-06  0:39 ` [PULL 49/84] target/ppc: " Richard Henderson
2023-03-06  0:39 ` [PULL 50/84] target/riscv: Drop ftemp_new Richard Henderson
2023-03-06  0:39 ` [PULL 51/84] target/riscv: Drop temp_new Richard Henderson
2023-03-06  0:39 ` [PULL 52/84] target/riscv: Drop tcg_temp_free Richard Henderson
2023-03-06  0:39 ` [PULL 53/84] target/rx: " Richard Henderson
2023-03-06  0:39 ` [PULL 54/84] target/sh4: " Richard Henderson
2023-03-06  0:39 ` [PULL 55/84] target/sparc: Drop get_temp_tl Richard Henderson
2023-03-06  0:39 ` [PULL 56/84] target/sparc: Drop get_temp_i32 Richard Henderson
2023-03-06  0:39 ` [PULL 57/84] target/sparc: Remove egress label in disas_sparc_context Richard Henderson
2023-03-06  0:39 ` [PULL 58/84] target/sparc: Drop free_compare Richard Henderson
2023-03-06  0:39 ` [PULL 59/84] target/sparc: Drop tcg_temp_free Richard Henderson
2023-03-06  0:39 ` [PULL 60/84] target/xtensa: Drop reset_sar_tracker Richard Henderson
2023-03-06  0:39 ` [PULL 61/84] target/xtensa: Drop tcg_temp_free Richard Henderson
2023-03-06  0:39 ` [PULL 62/84] target/i386: " Richard Henderson
2023-03-06  0:39 ` [PULL 63/84] target/mips: Drop tcg_temp_free from mips16e_translate.c.inc Richard Henderson
2023-03-06  0:39 ` [PULL 64/84] target/mips: Fix trans_mult_acc return Richard Henderson
2023-03-06  0:39 ` [PULL 65/84] target/tricore: Drop tcg_temp_free Richard Henderson
2023-03-06  0:39 ` [PULL 66/84] include/exec/gen-icount: Drop tcg_temp_free in gen_tb_start Richard Henderson
2023-03-06  0:39 ` [PULL 67/84] tracing: remove transform.py Richard Henderson
2023-03-06  0:39 ` [PULL 68/84] docs/devel/tcg-ops: Drop recommendation to free temps Richard Henderson
2023-03-06  0:39 ` [PULL 69/84] target/hexagon: Use tcg_constant_* for gen_constant_from_imm Richard Henderson
2023-03-06  0:39 ` [PULL 70/84] target/hexagon/idef-parser: Use gen_tmp for LPCFG Richard Henderson
2023-03-06  0:39 ` [PULL 71/84] target/hexagon/idef-parser: Use gen_tmp for gen_pred_assign Richard Henderson
2023-03-06  0:39 ` [PULL 72/84] target/hexagon/idef-parser: Use gen_tmp for gen_rvalue_pred Richard Henderson
2023-03-06  0:39 ` [PULL 73/84] target/hexagon/idef-parser: Use gen_constant for gen_extend_tcg_width_op Richard Henderson
2023-03-06  0:39 ` [PULL 74/84] target/i386: Simplify POPF Richard Henderson
2023-03-06  0:39 ` [PULL 75/84] target/microblaze: Avoid tcg_const_* throughout Richard Henderson
2023-03-06  0:39 ` [PULL 76/84] target/riscv: Avoid tcg_const_* Richard Henderson
2023-03-06  0:39 ` [PULL 77/84] target/s390x: Split out gen_ri2 Richard Henderson
2023-03-06  0:39 ` [PULL 78/84] target/sparc: Avoid tcg_const_{tl,i32} Richard Henderson
2023-03-06  0:39 ` [PULL 79/84] target/xtensa: Tidy translate_bb Richard Henderson
2023-03-06  0:39 ` [PULL 80/84] target/xtensa: Tidy translate_clamps Richard Henderson
2023-03-06  0:39 ` [PULL 81/84] target/xtensa: Avoid tcg_const_i32 in translate_l32r Richard Henderson
2023-03-06  0:39 ` [PULL 82/84] target/xtensa: Use tcg_gen_subfi_i32 in translate_sll Richard Henderson
2023-03-06  0:39 ` [PULL 83/84] target/xtensa: Split constant in bit shift Richard Henderson
2023-03-06  0:39 ` [PULL 84/84] target/xtensa: Avoid tcg_const_i32 Richard Henderson
2023-03-06 14:05 ` [PULL 00/84] tcg patch queue Peter Maydell

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