From: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
To: qemu-devel@nongnu.org
Cc: Nina Schoetterl-Glausch <nsg@linux.ibm.com>,
Richard Henderson <richard.henderson@linaro.org>,
David Hildenbrand <david@redhat.com>,
Ilya Leoshkevich <iii@linux.ibm.com>,
Thomas Huth <thuth@redhat.com>,
qemu-s390x@nongnu.org
Subject: [PATCH v2 1/2] target/s390x: Fix emulation of C(G)HRL
Date: Wed, 8 Mar 2023 22:02:25 +0100 [thread overview]
Message-ID: <20230308210226.2847503-2-nsg@linux.ibm.com> (raw)
In-Reply-To: <20230308210226.2847503-1-nsg@linux.ibm.com>
The second operand of COMPARE HALFWORD RELATIVE LONG is a signed
halfword, it does not have the same size as the first operand.
Fixes: a7e836d5eb ("target-s390: Convert COMPARE, COMPARE LOGICAL")
Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
---
target/s390x/tcg/insn-data.h.inc | 4 ++--
target/s390x/tcg/translate.c | 7 +++++++
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc
index 9d2d35f084..6fe8ca5143 100644
--- a/target/s390x/tcg/insn-data.h.inc
+++ b/target/s390x/tcg/insn-data.h.inc
@@ -199,8 +199,8 @@
C(0xe55c, CHSI, SIL, GIE, m1_32s, i2, 0, 0, 0, cmps64)
C(0xe558, CGHSI, SIL, GIE, m1_64, i2, 0, 0, 0, cmps64)
/* COMPARE HALFWORD RELATIVE LONG */
- C(0xc605, CHRL, RIL_b, GIE, r1_o, mri2_32s, 0, 0, 0, cmps32)
- C(0xc604, CGHRL, RIL_b, GIE, r1_o, mri2_64, 0, 0, 0, cmps64)
+ C(0xc605, CHRL, RIL_b, GIE, r1_o, mri2_16s, 0, 0, 0, cmps32)
+ C(0xc604, CGHRL, RIL_b, GIE, r1_o, mri2_16s, 0, 0, 0, cmps64)
/* COMPARE HIGH */
C(0xb9cd, CHHR, RRE, HW, r1_sr32, r2_sr32, 0, 0, 0, cmps32)
C(0xb9dd, CHLR, RRE, HW, r1_sr32, r2_o, 0, 0, 0, cmps32)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index 21a57d5eb2..d324c0b6f2 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -5979,6 +5979,13 @@ static void in2_m2_64a(DisasContext *s, DisasOps *o)
#define SPEC_in2_m2_64a 0
#endif
+static void in2_mri2_16s(DisasContext *s, DisasOps *o)
+{
+ o->in2 = tcg_temp_new_i64();
+ tcg_gen_qemu_ld16s(o->in2, gen_ri2(s), get_mem_index(s));
+}
+#define SPEC_in2_mri2_16s 0
+
static void in2_mri2_16u(DisasContext *s, DisasOps *o)
{
o->in2 = tcg_temp_new_i64();
--
2.37.2
next prev parent reply other threads:[~2023-03-08 21:03 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-08 21:02 [PATCH v2 0/2] target/s390x: Fix emulation of C(G)HRL Nina Schoetterl-Glausch
2023-03-08 21:02 ` Nina Schoetterl-Glausch [this message]
2023-03-08 22:48 ` [PATCH v2 1/2] " Richard Henderson
2023-03-08 21:02 ` [PATCH v2 2/2] tests/tcg/s390x: Add C(G)HRL test Nina Schoetterl-Glausch
2023-03-08 22:49 ` Richard Henderson
2023-03-09 13:47 ` Thomas Huth
2023-03-09 14:55 ` Nina Schoetterl-Glausch
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