From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"David Woodhouse" <dwmw@amazon.co.uk>,
"Anthony Perard" <anthony.perard@citrix.com>,
"Hervé Poussineau" <hpoussin@reactos.org>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Paul Durrant" <paul@xen.org>,
xen-devel@lists.xenproject.org,
"Michael S. Tsirkin" <mst@redhat.com>,
"Stefano Stabellini" <sstabellini@kernel.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Chuck Zmudzinski" <brchuckz@aol.com>,
"Bernhard Beschow" <shentey@gmail.com>
Subject: [PATCH v3 3/6] hw/isa/piix3: Wire up Xen PCI IRQ handling outside of PIIX3
Date: Sun, 12 Mar 2023 13:02:18 +0100 [thread overview]
Message-ID: <20230312120221.99183-4-shentey@gmail.com> (raw)
In-Reply-To: <20230312120221.99183-1-shentey@gmail.com>
xen_intx_set_irq() doesn't depend on PIIX3State. In order to resolve
TYPE_PIIX3_XEN_DEVICE and in order to make Xen agnostic about the
precise south bridge being used, set up Xen's PCI IRQ handling of PIIX3
in the board.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
---
hw/i386/pc_piix.c | 13 +++++++++++++
hw/isa/piix3.c | 24 +-----------------------
2 files changed, 14 insertions(+), 23 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 30eedd62a3..99232701b1 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -69,6 +69,7 @@
#include "kvm/kvm-cpu.h"
#define MAX_IDE_BUS 2
+#define XEN_IOAPIC_NUM_PIRQS 128ULL
#ifdef CONFIG_IDE_ISA
static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
@@ -236,6 +237,18 @@ static void pc_init1(MachineState *machine,
pcms->bus = pci_bus;
pci_dev = pci_create_simple_multifunction(pci_bus, -1, true, type);
+
+ if (xen_enabled()) {
+ /*
+ * Xen supports additional interrupt routes from the PCI devices to
+ * the IOAPIC: the four pins of each PCI device on the bus are also
+ * connected to the IOAPIC directly.
+ * These additional routes can be discovered through ACPI.
+ */
+ pci_bus_irqs(pci_bus, xen_intx_set_irq, pci_dev,
+ XEN_IOAPIC_NUM_PIRQS);
+ }
+
piix3 = PIIX3_PCI_DEVICE(pci_dev);
piix3->pic = x86ms->gsi;
piix3_devfn = piix3->dev.devfn;
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index a86cd23ef4..7a31caf2b6 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -34,8 +34,6 @@
#include "migration/vmstate.h"
#include "hw/acpi/acpi_aml_interface.h"
-#define XEN_IOAPIC_NUM_PIRQS 128ULL
-
static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq)
{
qemu_set_irq(piix3->pic[pic_irq],
@@ -388,32 +386,12 @@ static const TypeInfo piix3_info = {
.class_init = piix3_class_init,
};
-static void piix3_xen_realize(PCIDevice *dev, Error **errp)
-{
- ERRP_GUARD();
- PIIX3State *piix3 = PIIX3_PCI_DEVICE(dev);
- PCIBus *pci_bus = pci_get_bus(dev);
-
- piix3_realize(dev, errp);
- if (*errp) {
- return;
- }
-
- /*
- * Xen supports additional interrupt routes from the PCI devices to
- * the IOAPIC: the four pins of each PCI device on the bus are also
- * connected to the IOAPIC directly.
- * These additional routes can be discovered through ACPI.
- */
- pci_bus_irqs(pci_bus, xen_intx_set_irq, piix3, XEN_IOAPIC_NUM_PIRQS);
-}
-
static void piix3_xen_class_init(ObjectClass *klass, void *data)
{
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
k->config_write = piix3_write_config_xen;
- k->realize = piix3_xen_realize;
+ k->realize = piix3_realize;
}
static const TypeInfo piix3_xen_info = {
--
2.39.2
next prev parent reply other threads:[~2023-03-12 12:03 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-12 12:02 [PATCH v3 0/6] Resolve TYPE_PIIX3_XEN_DEVICE Bernhard Beschow
2023-03-12 12:02 ` [PATCH v3 1/6] include/hw/xen/xen: Rename xen_piix3_set_irq() to xen_intx_set_irq() Bernhard Beschow
2023-03-30 12:54 ` Anthony PERARD via
2023-03-12 12:02 ` [PATCH v3 2/6] hw/isa/piix3: Reuse piix3_realize() in piix3_xen_realize() Bernhard Beschow
2023-03-30 13:00 ` Anthony PERARD via
2023-04-01 22:36 ` Bernhard Beschow
2023-04-03 8:08 ` Bernhard Beschow
2023-04-03 9:32 ` Anthony PERARD via
2023-04-03 12:27 ` Jason Andryuk
2023-04-03 20:36 ` Bernhard Beschow
2023-09-19 20:02 ` Bernhard Beschow
2023-09-20 14:44 ` Chuck Zmudzinski
2023-09-24 15:41 ` Bernhard Beschow
2023-03-12 12:02 ` Bernhard Beschow [this message]
2023-03-30 13:03 ` [PATCH v3 3/6] hw/isa/piix3: Wire up Xen PCI IRQ handling outside of PIIX3 Anthony PERARD via
2023-03-12 12:02 ` [PATCH v3 4/6] hw/isa/piix3: Avoid Xen-specific variant of piix3_write_config() Bernhard Beschow
2023-03-30 13:04 ` Anthony PERARD via
2023-03-12 12:02 ` [PATCH v3 5/6] hw/isa/piix3: Resolve redundant k->config_write assignments Bernhard Beschow
2023-03-30 13:05 ` Anthony PERARD via
2023-03-12 12:02 ` [PATCH v3 6/6] hw/isa/piix3: Resolve redundant TYPE_PIIX3_XEN_DEVICE Bernhard Beschow
2023-03-30 13:05 ` Anthony PERARD via
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