From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Wei Huang <wei.huang2@amd.com>, qemu-devel@nongnu.org
Cc: "Thomas Huth" <thuth@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Ani Sinha" <ani@anisinha.ca>, "Peter Xu" <peterx@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Eduardo Habkost" <eduardo@habkost.net>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH 3/6] hw/i386/amd_iommu: Remove intermediate AMDVIState::devid field
Date: Mon, 13 Mar 2023 16:30:28 +0100 [thread overview]
Message-ID: <20230313153031.86107-4-philmd@linaro.org> (raw)
In-Reply-To: <20230313153031.86107-1-philmd@linaro.org>
AMDVIState::devid is only accessed by build_amd_iommu() which
has access to the PCIDevice state. Directly get the property
calling object_property_get_int() there.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/i386/acpi-build.c | 4 +++-
hw/i386/amd_iommu.c | 2 --
hw/i386/amd_iommu.h | 2 --
3 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index ec857a117e..a27bc33956 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -2395,7 +2395,9 @@ build_amd_iommu(GArray *table_data, BIOSLinker *linker, const char *oem_id,
/* IVHD length */
build_append_int_noprefix(table_data, ivhd_table_len, 2);
/* DeviceID */
- build_append_int_noprefix(table_data, s->devid, 2);
+ build_append_int_noprefix(table_data,
+ object_property_get_int(OBJECT(&s->pci), "addr",
+ &error_abort), 2);
/* Capability offset */
build_append_int_noprefix(table_data, s->capab_offset, 2);
/* IOMMU base address */
diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
index 3813b341ec..19f57e6318 100644
--- a/hw/i386/amd_iommu.c
+++ b/hw/i386/amd_iommu.c
@@ -1513,7 +1513,6 @@ static void amdvi_init(AMDVIState *s)
/* reset device ident */
pci_config_set_vendor_id(s->pci.dev.config, PCI_VENDOR_ID_AMD);
pci_config_set_prog_interface(s->pci.dev.config, 00);
- pci_config_set_device_id(s->pci.dev.config, s->devid);
pci_config_set_class(s->pci.dev.config, 0x0806);
/* reset AMDVI specific capabilities, all r/o */
@@ -1581,7 +1580,6 @@ static void amdvi_sysbus_realize(DeviceState *dev, Error **errp)
sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->mmio);
sysbus_mmio_map(SYS_BUS_DEVICE(s), 0, AMDVI_BASE_ADDR);
pci_setup_iommu(bus, amdvi_host_dma_iommu, s);
- s->devid = object_property_get_int(OBJECT(&s->pci), "addr", &error_abort);
msi_init(&s->pci.dev, 0, 1, true, false, errp);
amdvi_init(s);
}
diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h
index 79d38a3e41..5eccaad790 100644
--- a/hw/i386/amd_iommu.h
+++ b/hw/i386/amd_iommu.h
@@ -319,8 +319,6 @@ struct AMDVIState {
uint64_t mmio_addr;
- uint32_t devid; /* auto-assigned devid */
-
bool enabled; /* IOMMU enabled */
bool ats_enabled; /* address translation enabled */
bool cmdbuf_enabled; /* command buffer enabled */
--
2.38.1
next prev parent reply other threads:[~2023-03-13 15:32 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-13 15:30 [PATCH 0/6] hw/i386/amd_iommu: Orphanize & QDev cleanups Philippe Mathieu-Daudé
2023-03-13 15:30 ` [PATCH 1/6] MAINTAINERS: Mark AMD-Vi emulation as orphan Philippe Mathieu-Daudé
2023-03-13 15:30 ` [PATCH 2/6] hw/i386/amd_iommu: Explicit use of AMDVI_BASE_ADDR in amdvi_init Philippe Mathieu-Daudé
2023-03-13 15:30 ` Philippe Mathieu-Daudé [this message]
2023-03-13 15:30 ` [PATCH 4/6] hw/i386/amd_iommu: Move capab_offset from AMDVIState to AMDVIPCIState Philippe Mathieu-Daudé
2023-03-13 15:30 ` [PATCH 5/6] hw/i386/amd_iommu: Set PCI static/const fields via PCIDeviceClass Philippe Mathieu-Daudé
2023-03-13 15:30 ` [PATCH 6/6] hw/i386/amd_iommu: Factor amdvi_pci_realize out of amdvi_sysbus_realize Philippe Mathieu-Daudé
2023-03-13 15:32 ` [PATCH 0/6] hw/i386/amd_iommu: Orphanize & QDev cleanups Philippe Mathieu-Daudé
2025-02-18 16:52 ` Philippe Mathieu-Daudé
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