From: Ilya Leoshkevich <iii@linux.ibm.com>
To: Richard Henderson <richard.henderson@linaro.org>,
David Hildenbrand <david@redhat.com>
Cc: Thomas Huth <thuth@redhat.com>,
qemu-s390x@nongnu.org, qemu-devel@nongnu.org,
Ilya Leoshkevich <iii@linux.ibm.com>,
Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Subject: [PATCH v2 03/12] target/s390x: Handle LGRL from non-aligned addresses
Date: Mon, 13 Mar 2023 16:38:35 +0100 [thread overview]
Message-ID: <20230313153844.9231-4-iii@linux.ibm.com> (raw)
In-Reply-To: <20230313153844.9231-1-iii@linux.ibm.com>
Use MO_ALIGN and let do_unaligned_access() generate a specification
exception.
Reported-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Suggested-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
target/s390x/tcg/insn-data.h.inc | 6 +++---
target/s390x/tcg/translate.c | 3 ++-
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc
index 6fe8ca51437..d439d803509 100644
--- a/target/s390x/tcg/insn-data.h.inc
+++ b/target/s390x/tcg/insn-data.h.inc
@@ -414,7 +414,7 @@
C(0xe358, LY, RXY_a, LD, 0, a2, new, r1_32, ld32s, 0)
C(0xb904, LGR, RRE, Z, 0, r2_o, 0, r1, mov2, 0)
C(0xb914, LGFR, RRE, Z, 0, r2_32s, 0, r1, mov2, 0)
- C(0xe304, LG, RXY_a, Z, 0, a2, r1, 0, ld64, 0)
+ D(0xe304, LG, RXY_a, Z, 0, a2, r1, 0, ld64, 0, 0)
C(0xe314, LGF, RXY_a, Z, 0, a2, r1, 0, ld32s, 0)
F(0x2800, LDR, RR_a, Z, 0, f2, 0, f1, mov2, 0, IF_AFP1 | IF_AFP2)
F(0x6800, LD, RX_a, Z, 0, m2_64, 0, f1, mov2, 0, IF_AFP1)
@@ -427,7 +427,7 @@
C(0xc001, LGFI, RIL_a, EI, 0, i2, 0, r1, mov2, 0)
/* LOAD RELATIVE LONG */
C(0xc40d, LRL, RIL_b, GIE, 0, ri2, new, r1_32, ld32s, 0)
- C(0xc408, LGRL, RIL_b, GIE, 0, ri2, r1, 0, ld64, 0)
+ D(0xc408, LGRL, RIL_b, GIE, 0, ri2, r1, 0, ld64, 0, MO_ALIGN)
C(0xc40c, LGFRL, RIL_b, GIE, 0, ri2, r1, 0, ld32s, 0)
/* LOAD ADDRESS */
C(0x4100, LA, RX_a, Z, 0, a2, 0, r1, mov2, 0)
@@ -457,7 +457,7 @@
C(0xb902, LTGR, RRE, Z, 0, r2_o, 0, r1, mov2, s64)
C(0xb912, LTGFR, RRE, Z, 0, r2_32s, 0, r1, mov2, s64)
C(0xe312, LT, RXY_a, EI, 0, a2, new, r1_32, ld32s, s64)
- C(0xe302, LTG, RXY_a, EI, 0, a2, r1, 0, ld64, s64)
+ D(0xe302, LTG, RXY_a, EI, 0, a2, r1, 0, ld64, s64, 0)
C(0xe332, LTGF, RXY_a, GIE, 0, a2, r1, 0, ld32s, s64)
F(0xb302, LTEBR, RRE, Z, 0, e2, 0, cond_e1e2, mov2, f32, IF_BFP)
F(0xb312, LTDBR, RRE, Z, 0, f2, 0, f1, mov2, f64, IF_BFP)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index d324c0b6f2a..924efdad7a4 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -2851,7 +2851,8 @@ static DisasJumpType op_ld32u(DisasContext *s, DisasOps *o)
static DisasJumpType op_ld64(DisasContext *s, DisasOps *o)
{
- tcg_gen_qemu_ld64(o->out, o->in2, get_mem_index(s));
+ tcg_gen_qemu_ld_i64(o->out, o->in2, get_mem_index(s),
+ MO_TEUQ | s->insn->data);
return DISAS_NEXT;
}
--
2.39.2
next prev parent reply other threads:[~2023-03-13 15:39 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-13 15:38 [PATCH v2 00/12] target/s390x: Handle unaligned accesses Ilya Leoshkevich
2023-03-13 15:38 ` [PATCH v2 01/12] target/s390x: Handle branching to odd addresses Ilya Leoshkevich
2023-03-13 19:54 ` Richard Henderson
2023-03-13 15:38 ` [PATCH v2 02/12] target/s390x: Handle EXECUTE of " Ilya Leoshkevich
2023-03-13 15:38 ` Ilya Leoshkevich [this message]
2023-03-13 15:38 ` [PATCH v2 04/12] target/s390x: Handle LRL and LGFRL from non-aligned addresses Ilya Leoshkevich
2023-03-13 15:38 ` [PATCH v2 05/12] target/s390x: Handle LLGFRL " Ilya Leoshkevich
2023-03-13 15:38 ` [PATCH v2 06/12] target/s390x: Handle CRL and CGFRL with " Ilya Leoshkevich
2023-03-13 15:38 ` [PATCH v2 07/12] target/s390x: Handle CGRL and CLGRL " Ilya Leoshkevich
2023-03-13 15:38 ` [PATCH v2 08/12] target/s390x: Handle CLRL and CLGFRL " Ilya Leoshkevich
2023-03-13 15:38 ` [PATCH v2 09/12] target/s390x: Handle STRL to " Ilya Leoshkevich
2023-03-13 15:38 ` [PATCH v2 10/12] target/s390x: Handle STGRL " Ilya Leoshkevich
2023-03-13 15:38 ` [PATCH v2 11/12] target/s390x: Update do_unaligned_access() comment Ilya Leoshkevich
2023-03-13 15:38 ` [PATCH v2 12/12] tests/tcg/s390x: Test unaligned accesses Ilya Leoshkevich
2023-03-15 18:09 ` Thomas Huth
2023-03-15 18:13 ` Ilya Leoshkevich
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