From: Thomas Huth <thuth@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: Ilya Leoshkevich <iii@linux.ibm.com>,
Nina Schoetterl-Glausch <nsg@linux.ibm.com>,
Richard Henderson <richard.henderson@linaro.org>
Subject: [PULL 17/24] target/s390x: Handle STRL to non-aligned addresses
Date: Mon, 20 Mar 2023 14:03:23 +0100 [thread overview]
Message-ID: <20230320130330.406378-18-thuth@redhat.com> (raw)
In-Reply-To: <20230320130330.406378-1-thuth@redhat.com>
From: Ilya Leoshkevich <iii@linux.ibm.com>
Use MO_ALIGN and let do_unaligned_access() generate a specification
exception.
Reported-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Suggested-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230316164428.275147-10-iii@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
target/s390x/tcg/insn-data.h.inc | 12 ++++++------
target/s390x/tcg/translate.c | 3 ++-
2 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc
index 3abd2dbedd..30c02b3fcd 100644
--- a/target/s390x/tcg/insn-data.h.inc
+++ b/target/s390x/tcg/insn-data.h.inc
@@ -840,15 +840,15 @@
F(0xed15, SQDB, RXE, Z, 0, m2_64, new, f1, sqdb, 0, IF_BFP)
/* STORE */
- C(0x5000, ST, RX_a, Z, r1_o, a2, 0, 0, st32, 0)
- C(0xe350, STY, RXY_a, LD, r1_o, a2, 0, 0, st32, 0)
+ D(0x5000, ST, RX_a, Z, r1_o, a2, 0, 0, st32, 0, 0)
+ D(0xe350, STY, RXY_a, LD, r1_o, a2, 0, 0, st32, 0, 0)
C(0xe324, STG, RXY_a, Z, r1_o, a2, 0, 0, st64, 0)
F(0x6000, STD, RX_a, Z, f1, a2, 0, 0, st64, 0, IF_AFP1)
F(0xed67, STDY, RXY_a, LD, f1, a2, 0, 0, st64, 0, IF_AFP1)
- F(0x7000, STE, RX_a, Z, e1, a2, 0, 0, st32, 0, IF_AFP1)
- F(0xed66, STEY, RXY_a, LD, e1, a2, 0, 0, st32, 0, IF_AFP1)
+ E(0x7000, STE, RX_a, Z, e1, a2, 0, 0, st32, 0, 0, IF_AFP1)
+ E(0xed66, STEY, RXY_a, LD, e1, a2, 0, 0, st32, 0, 0, IF_AFP1)
/* STORE RELATIVE LONG */
- C(0xc40f, STRL, RIL_b, GIE, r1_o, ri2, 0, 0, st32, 0)
+ D(0xc40f, STRL, RIL_b, GIE, r1_o, ri2, 0, 0, st32, 0, MO_ALIGN)
C(0xc40b, STGRL, RIL_b, GIE, r1_o, ri2, 0, 0, st64, 0)
/* STORE CHARACTER */
C(0x4200, STC, RX_a, Z, r1_o, a2, 0, 0, st8, 0)
@@ -867,7 +867,7 @@
/* STORE HALFWORD RELATIVE LONG */
C(0xc407, STHRL, RIL_b, GIE, r1_o, ri2, 0, 0, st16, 0)
/* STORE HIGH */
- C(0xe3cb, STFH, RXY_a, HW, r1_sr32, a2, 0, 0, st32, 0)
+ D(0xe3cb, STFH, RXY_a, HW, r1_sr32, a2, 0, 0, st32, 0, 0)
/* STORE ON CONDITION */
D(0xebf3, STOC, RSY_b, LOC, 0, 0, 0, 0, soc, 0, 0)
D(0xebe3, STOCG, RSY_b, LOC, 0, 0, 0, 0, soc, 0, 1)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index 0de3edd2eb..4250c052b9 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -4392,7 +4392,8 @@ static DisasJumpType op_st16(DisasContext *s, DisasOps *o)
static DisasJumpType op_st32(DisasContext *s, DisasOps *o)
{
- tcg_gen_qemu_st32(o->in1, o->in2, get_mem_index(s));
+ tcg_gen_qemu_st_tl(o->in1, o->in2, get_mem_index(s),
+ MO_TEUL | s->insn->data);
return DISAS_NEXT;
}
--
2.31.1
next prev parent reply other threads:[~2023-03-20 13:04 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-20 13:03 [PULL 00/24] s390x and misc patches for 8.0-rc1 Thomas Huth
2023-03-20 13:03 ` [PULL 01/24] MAINTAINERS: Mark the Nios II CPU as orphan Thomas Huth
2023-03-20 13:03 ` [PULL 02/24] target/s390x: Fix LPSW Thomas Huth
2023-03-20 13:03 ` [PULL 03/24] target/s390x: Implement Early Exception Recognition Thomas Huth
2023-03-20 13:03 ` [PULL 04/24] tests/tcg/s390x: Add PSW modification tests Thomas Huth
2023-03-20 13:03 ` [PULL 05/24] target/s390x: Fix R[NOX]SBG with T=1 Thomas Huth
2023-03-20 13:03 ` [PULL 06/24] tests/tcg/s390x: Add rxsbg.c Thomas Huth
2023-03-20 13:03 ` [PULL 07/24] target/s390x: Fix EXECUTE of relative long instructions Thomas Huth
2023-03-20 13:03 ` [PULL 08/24] tests/tcg/s390x: Add ex-relative-long.c Thomas Huth
2023-03-20 13:03 ` [PULL 09/24] target/s390x: Handle branching to odd addresses Thomas Huth
2023-03-20 13:03 ` [PULL 10/24] target/s390x: Handle EXECUTE of " Thomas Huth
2023-03-20 13:03 ` [PULL 11/24] target/s390x: Handle LGRL from non-aligned addresses Thomas Huth
2023-03-20 13:03 ` [PULL 12/24] target/s390x: Handle LRL and LGFRL " Thomas Huth
2023-03-20 13:03 ` [PULL 13/24] target/s390x: Handle LLGFRL " Thomas Huth
2023-03-20 13:03 ` [PULL 14/24] target/s390x: Handle CRL and CGFRL with " Thomas Huth
2023-03-20 13:03 ` [PULL 15/24] target/s390x: Handle CGRL and CLGRL " Thomas Huth
2023-03-20 13:03 ` [PULL 16/24] target/s390x: Handle CLRL and CLGFRL " Thomas Huth
2023-03-20 13:03 ` Thomas Huth [this message]
2023-03-20 13:03 ` [PULL 18/24] target/s390x: Handle STGRL to " Thomas Huth
2023-03-20 13:03 ` [PULL 19/24] target/s390x: Update do_unaligned_access() comment Thomas Huth
2023-03-20 13:03 ` [PULL 20/24] tests/tcg/s390x: Test unaligned accesses Thomas Huth
2023-03-20 13:03 ` [PULL 21/24] target/s390x/tcg/mem_helper: Remove bad assert() statement Thomas Huth
2023-03-20 13:03 ` [PULL 22/24] tests/unit/test-blockjob: Disable complete_in_standby test Thomas Huth
2023-03-20 13:03 ` [PULL 23/24] qemu/osdep: Switch position of "extern" and "G_NORETURN" Thomas Huth
2023-03-20 13:03 ` [PULL 24/24] replace TABs with spaces Thomas Huth
2023-03-20 14:02 ` [PULL 00/24] s390x and misc patches for 8.0-rc1 Thomas Huth
2023-03-20 15:10 ` Peter Maydell
2023-03-20 15:27 ` Philippe Mathieu-Daudé
2023-03-20 15:36 ` Thomas Huth
2023-03-20 17:50 ` Peter Maydell
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