From: Thomas Huth <thuth@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: Ilya Leoshkevich <iii@linux.ibm.com>,
Richard Henderson <richard.henderson@linaro.org>,
Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Subject: [PULL 08/24] tests/tcg/s390x: Add ex-relative-long.c
Date: Mon, 20 Mar 2023 14:03:14 +0100 [thread overview]
Message-ID: <20230320130330.406378-9-thuth@redhat.com> (raw)
In-Reply-To: <20230320130330.406378-1-thuth@redhat.com>
From: Ilya Leoshkevich <iii@linux.ibm.com>
Test EXECUTE and EXECUTE RELATIVE LONG with relative long instructions
as targets.
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Message-Id: <20230316210751.302423-3-iii@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
tests/tcg/s390x/ex-relative-long.c | 156 +++++++++++++++++++++++++++++
tests/tcg/s390x/Makefile.target | 1 +
2 files changed, 157 insertions(+)
create mode 100644 tests/tcg/s390x/ex-relative-long.c
diff --git a/tests/tcg/s390x/ex-relative-long.c b/tests/tcg/s390x/ex-relative-long.c
new file mode 100644
index 0000000000..21fbef6258
--- /dev/null
+++ b/tests/tcg/s390x/ex-relative-long.c
@@ -0,0 +1,156 @@
+/* Check EXECUTE with relative long instructions as targets. */
+#include <stdlib.h>
+#include <stdio.h>
+
+struct test {
+ const char *name;
+ long (*func)(long reg, long *cc);
+ long exp_reg;
+ long exp_mem;
+ long exp_cc;
+};
+
+/*
+ * Each test sets the MEM_IDXth element of the mem array to MEM and uses a
+ * single relative long instruction on it. The other elements remain zero.
+ * This is in order to prevent stumbling upon MEM in random memory in case
+ * there is an off-by-a-small-value bug.
+ *
+ * Note that while gcc supports the ZL constraint for relative long operands,
+ * clang doesn't, so the assembly code accesses mem[MEM_IDX] using MEM_ASM.
+ */
+static long mem[0x1000];
+#define MEM_IDX 0x800
+#define MEM_ASM "mem+0x800*8"
+
+/* Initial %r2 value. */
+#define REG 0x1234567887654321
+
+/* Initial mem[MEM_IDX] value. */
+#define MEM 0xfedcba9889abcdef
+
+/* Initial cc value. */
+#define CC 0
+
+/* Relative long instructions and their expected effects. */
+#define FOR_EACH_INSN(F) \
+ F(cgfrl, REG, MEM, 2) \
+ F(cghrl, REG, MEM, 2) \
+ F(cgrl, REG, MEM, 2) \
+ F(chrl, REG, MEM, 1) \
+ F(clgfrl, REG, MEM, 2) \
+ F(clghrl, REG, MEM, 2) \
+ F(clgrl, REG, MEM, 1) \
+ F(clhrl, REG, MEM, 2) \
+ F(clrl, REG, MEM, 1) \
+ F(crl, REG, MEM, 1) \
+ F(larl, (long)&mem[MEM_IDX], MEM, CC) \
+ F(lgfrl, 0xfffffffffedcba98, MEM, CC) \
+ F(lghrl, 0xfffffffffffffedc, MEM, CC) \
+ F(lgrl, MEM, MEM, CC) \
+ F(lhrl, 0x12345678fffffedc, MEM, CC) \
+ F(llghrl, 0x000000000000fedc, MEM, CC) \
+ F(llhrl, 0x123456780000fedc, MEM, CC) \
+ F(lrl, 0x12345678fedcba98, MEM, CC) \
+ F(stgrl, REG, REG, CC) \
+ F(sthrl, REG, 0x4321ba9889abcdef, CC) \
+ F(strl, REG, 0x8765432189abcdef, CC)
+
+/* Test functions. */
+#define DEFINE_EX_TEST(insn, exp_reg, exp_mem, exp_cc) \
+ static long test_ex_ ## insn(long reg, long *cc) \
+ { \
+ register long r2 asm("r2"); \
+ char mask = 0x20; /* make target use %r2 */ \
+ long pm, target; \
+ \
+ r2 = reg; \
+ asm("larl %[target],0f\n" \
+ "cr %%r0,%%r0\n" /* initial cc */ \
+ "ex %[mask],0(%[target])\n" \
+ "jg 1f\n" \
+ "0: " #insn " %%r0," MEM_ASM "\n" \
+ "1: ipm %[pm]\n" \
+ : [target] "=&a" (target), [r2] "+r" (r2), [pm] "=r" (pm) \
+ : [mask] "a" (mask) \
+ : "cc", "memory"); \
+ reg = r2; \
+ *cc = (pm >> 28) & 3; \
+ \
+ return reg; \
+ }
+
+#define DEFINE_EXRL_TEST(insn, exp_reg, exp_mem, exp_cc) \
+ static long test_exrl_ ## insn(long reg, long *cc) \
+ { \
+ register long r2 asm("r2"); \
+ char mask = 0x20; /* make target use %r2 */ \
+ long pm; \
+ \
+ r2 = reg; \
+ asm("cr %%r0,%%r0\n" /* initial cc */ \
+ "exrl %[mask],0f\n" \
+ "jg 1f\n" \
+ "0: " #insn " %%r0," MEM_ASM "\n" \
+ "1: ipm %[pm]\n" \
+ : [r2] "+r" (r2), [pm] "=r" (pm) \
+ : [mask] "a" (mask) \
+ : "cc", "memory"); \
+ reg = r2; \
+ *cc = (pm >> 28) & 3; \
+ \
+ return reg; \
+ }
+
+FOR_EACH_INSN(DEFINE_EX_TEST)
+FOR_EACH_INSN(DEFINE_EXRL_TEST)
+
+/* Test definitions. */
+#define REGISTER_EX_EXRL_TEST(ex_insn, insn, _exp_reg, _exp_mem, _exp_cc) \
+ { \
+ .name = #ex_insn " " #insn, \
+ .func = test_ ## ex_insn ## _ ## insn, \
+ .exp_reg = (_exp_reg), \
+ .exp_mem = (_exp_mem), \
+ .exp_cc = (_exp_cc), \
+ },
+
+#define REGISTER_EX_TEST(insn, exp_reg, exp_mem, exp_cc) \
+ REGISTER_EX_EXRL_TEST(ex, insn, exp_reg, exp_mem, exp_cc)
+
+#define REGISTER_EXRL_TEST(insn, exp_reg, exp_mem, exp_cc) \
+ REGISTER_EX_EXRL_TEST(exrl, insn, exp_reg, exp_mem, exp_cc)
+
+static const struct test tests[] = {
+ FOR_EACH_INSN(REGISTER_EX_TEST)
+ FOR_EACH_INSN(REGISTER_EXRL_TEST)
+};
+
+/* Loop over all tests and run them. */
+int main(void)
+{
+ const struct test *test;
+ int ret = EXIT_SUCCESS;
+ long reg, cc;
+ size_t i;
+
+ for (i = 0; i < sizeof(tests) / sizeof(tests[0]); i++) {
+ test = &tests[i];
+ mem[MEM_IDX] = MEM;
+ cc = -1;
+ reg = test->func(REG, &cc);
+#define ASSERT_EQ(expected, actual) do { \
+ if (expected != actual) { \
+ fprintf(stderr, "%s: " #expected " (0x%lx) != " #actual " (0x%lx)\n", \
+ test->name, expected, actual); \
+ ret = EXIT_FAILURE; \
+ } \
+} while (0)
+ ASSERT_EQ(test->exp_reg, reg);
+ ASSERT_EQ(test->exp_mem, mem[MEM_IDX]);
+ ASSERT_EQ(test->exp_cc, cc);
+#undef ASSERT_EQ
+ }
+
+ return ret;
+}
diff --git a/tests/tcg/s390x/Makefile.target b/tests/tcg/s390x/Makefile.target
index 3c940ac952..510bbd9b28 100644
--- a/tests/tcg/s390x/Makefile.target
+++ b/tests/tcg/s390x/Makefile.target
@@ -30,6 +30,7 @@ TESTS+=long-double
TESTS+=cdsg
TESTS+=chrl
TESTS+=rxsbg
+TESTS+=ex-relative-long
cdsg: CFLAGS+=-pthread
cdsg: LDFLAGS+=-pthread
--
2.31.1
next prev parent reply other threads:[~2023-03-20 13:05 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-20 13:03 [PULL 00/24] s390x and misc patches for 8.0-rc1 Thomas Huth
2023-03-20 13:03 ` [PULL 01/24] MAINTAINERS: Mark the Nios II CPU as orphan Thomas Huth
2023-03-20 13:03 ` [PULL 02/24] target/s390x: Fix LPSW Thomas Huth
2023-03-20 13:03 ` [PULL 03/24] target/s390x: Implement Early Exception Recognition Thomas Huth
2023-03-20 13:03 ` [PULL 04/24] tests/tcg/s390x: Add PSW modification tests Thomas Huth
2023-03-20 13:03 ` [PULL 05/24] target/s390x: Fix R[NOX]SBG with T=1 Thomas Huth
2023-03-20 13:03 ` [PULL 06/24] tests/tcg/s390x: Add rxsbg.c Thomas Huth
2023-03-20 13:03 ` [PULL 07/24] target/s390x: Fix EXECUTE of relative long instructions Thomas Huth
2023-03-20 13:03 ` Thomas Huth [this message]
2023-03-20 13:03 ` [PULL 09/24] target/s390x: Handle branching to odd addresses Thomas Huth
2023-03-20 13:03 ` [PULL 10/24] target/s390x: Handle EXECUTE of " Thomas Huth
2023-03-20 13:03 ` [PULL 11/24] target/s390x: Handle LGRL from non-aligned addresses Thomas Huth
2023-03-20 13:03 ` [PULL 12/24] target/s390x: Handle LRL and LGFRL " Thomas Huth
2023-03-20 13:03 ` [PULL 13/24] target/s390x: Handle LLGFRL " Thomas Huth
2023-03-20 13:03 ` [PULL 14/24] target/s390x: Handle CRL and CGFRL with " Thomas Huth
2023-03-20 13:03 ` [PULL 15/24] target/s390x: Handle CGRL and CLGRL " Thomas Huth
2023-03-20 13:03 ` [PULL 16/24] target/s390x: Handle CLRL and CLGFRL " Thomas Huth
2023-03-20 13:03 ` [PULL 17/24] target/s390x: Handle STRL to " Thomas Huth
2023-03-20 13:03 ` [PULL 18/24] target/s390x: Handle STGRL " Thomas Huth
2023-03-20 13:03 ` [PULL 19/24] target/s390x: Update do_unaligned_access() comment Thomas Huth
2023-03-20 13:03 ` [PULL 20/24] tests/tcg/s390x: Test unaligned accesses Thomas Huth
2023-03-20 13:03 ` [PULL 21/24] target/s390x/tcg/mem_helper: Remove bad assert() statement Thomas Huth
2023-03-20 13:03 ` [PULL 22/24] tests/unit/test-blockjob: Disable complete_in_standby test Thomas Huth
2023-03-20 13:03 ` [PULL 23/24] qemu/osdep: Switch position of "extern" and "G_NORETURN" Thomas Huth
2023-03-20 13:03 ` [PULL 24/24] replace TABs with spaces Thomas Huth
2023-03-20 14:02 ` [PULL 00/24] s390x and misc patches for 8.0-rc1 Thomas Huth
2023-03-20 15:10 ` Peter Maydell
2023-03-20 15:27 ` Philippe Mathieu-Daudé
2023-03-20 15:36 ` Thomas Huth
2023-03-20 17:50 ` Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230320130330.406378-9-thuth@redhat.com \
--to=thuth@redhat.com \
--cc=iii@linux.ibm.com \
--cc=nsg@linux.ibm.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).