From: Aaron Lindsay <aaron@os.amperecomputing.com>
To: qemu-devel@nongnu.org, qemu-arm@nongnu.org,
"Richard Henderson" <richard.henderson@linaro.org>,
"Vincent Dehors" <vincent.dehors@smile.fr>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Peter Maydell" <peter.maydell@linaro.org>
Cc: Aaron Lindsay <aaron@os.amperecomputing.com>
Subject: [PATCH v3 8/8] target/arm: Add CPU property for QARMA3, enable FPACCombined by default
Date: Wed, 22 Mar 2023 16:25:41 -0400 [thread overview]
Message-ID: <20230322202541.1404058-9-aaron@os.amperecomputing.com> (raw)
In-Reply-To: <20230322202541.1404058-1-aaron@os.amperecomputing.com>
Signed-off-by: Aaron Lindsay <aaron@os.amperecomputing.com>
---
target/arm/cpu.h | 1 +
target/arm/cpu64.c | 48 +++++++++++++++++++++++++++++++---------------
2 files changed, 34 insertions(+), 15 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 868d844d5a..80683c428f 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1053,6 +1053,7 @@ struct ArchCPU {
*/
bool prop_pauth;
bool prop_pauth_impdef;
+ bool prop_pauth_qarma3;
bool prop_lpa2;
/* DCZ blocksize, in log_2(words), ie low 4 bits of DCZID_EL0 */
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 0fb07cc7b6..a5f4540c73 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -591,9 +591,6 @@ static void aarch64_add_sme_properties(Object *obj)
void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp)
{
- int arch_val = 0, impdef_val = 0;
- uint64_t t;
-
/* Exit early if PAuth is enabled, and fall through to disable it */
if ((kvm_enabled() || hvf_enabled()) && cpu->prop_pauth) {
if (!cpu_isar_feature(aa64_pauth, cpu)) {
@@ -604,30 +601,50 @@ void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp)
return;
}
- /* TODO: Handle HaveEnhancedPAC, HaveEnhancedPAC2, HaveFPAC. */
+ /* Write the features into the correct field for the algorithm in use */
if (cpu->prop_pauth) {
+ uint64_t t;
+
+ if (cpu->prop_pauth_impdef && cpu->prop_pauth_qarma3) {
+ error_setg(errp, "Cannot set both qarma3 ('pauth-qarma3') and "
+ "impdef ('pauth-impdef') pointer authentication ciphers");
+ return;
+ }
+
+ /* Implement FEAT_FPACCOMBINE for address authentication and enable
+ * generic authentication for the chosen cipher.
+ */
+ int address_auth = 0b0101;
+ int generic_auth = 0b0001;
+
if (cpu->prop_pauth_impdef) {
- impdef_val = 1;
+ t = cpu->isar.id_aa64isar1;
+ t = FIELD_DP64(t, ID_AA64ISAR1, API, address_auth);
+ t = FIELD_DP64(t, ID_AA64ISAR1, GPI, generic_auth);
+ cpu->isar.id_aa64isar1 = t;
+ } else if (cpu->prop_pauth_qarma3) {
+ t = cpu->isar.id_aa64isar2;
+ t = FIELD_DP64(t, ID_AA64ISAR2, APA3, address_auth);
+ t = FIELD_DP64(t, ID_AA64ISAR2, GPA3, generic_auth);
+ cpu->isar.id_aa64isar2 = t;
} else {
- arch_val = 1;
+ t = cpu->isar.id_aa64isar1;
+ t = FIELD_DP64(t, ID_AA64ISAR1, APA, address_auth);
+ t = FIELD_DP64(t, ID_AA64ISAR1, GPA, generic_auth);
+ cpu->isar.id_aa64isar1 = t;
}
- } else if (cpu->prop_pauth_impdef) {
- error_setg(errp, "cannot enable pauth-impdef without pauth");
+ } else if (cpu->prop_pauth_impdef || cpu->prop_pauth_qarma3) {
+ error_setg(errp, "cannot enable pauth-impdef or pauth-qarma3 without pauth");
error_append_hint(errp, "Add pauth=on to the CPU property list.\n");
}
-
- t = cpu->isar.id_aa64isar1;
- t = FIELD_DP64(t, ID_AA64ISAR1, APA, arch_val);
- t = FIELD_DP64(t, ID_AA64ISAR1, GPA, arch_val);
- t = FIELD_DP64(t, ID_AA64ISAR1, API, impdef_val);
- t = FIELD_DP64(t, ID_AA64ISAR1, GPI, impdef_val);
- cpu->isar.id_aa64isar1 = t;
}
static Property arm_cpu_pauth_property =
DEFINE_PROP_BOOL("pauth", ARMCPU, prop_pauth, true);
static Property arm_cpu_pauth_impdef_property =
DEFINE_PROP_BOOL("pauth-impdef", ARMCPU, prop_pauth_impdef, false);
+static Property arm_cpu_pauth_qarma3_property =
+ DEFINE_PROP_BOOL("pauth-qarma3", ARMCPU, prop_pauth_qarma3, false);
static void aarch64_add_pauth_properties(Object *obj)
{
@@ -647,6 +664,7 @@ static void aarch64_add_pauth_properties(Object *obj)
cpu->prop_pauth = cpu_isar_feature(aa64_pauth, cpu);
} else {
qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_impdef_property);
+ qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_qarma3_property);
}
}
--
2.25.1
next prev parent reply other threads:[~2023-03-22 20:27 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-22 20:25 [PATCH v3 0/8] Implement Most ARMv8.3 Pointer Authentication Features Aaron Lindsay
2023-03-22 20:25 ` [PATCH v3 1/8] target/arm: Add ID_AA64ISAR2_EL1 Aaron Lindsay
2023-03-23 17:33 ` Richard Henderson
2023-03-22 20:25 ` [PATCH v3 2/8] target/arm: v8.3 PAC ID_AA64ISAR[12] feature-detection Aaron Lindsay
2023-03-23 17:42 ` Richard Henderson
2023-03-22 20:25 ` [PATCH v3 3/8] target/arm: Implement v8.3 QARMA3 PAC cipher Aaron Lindsay
2023-03-22 20:25 ` [PATCH v3 4/8] target/arm: Implement v8.3 EnhancedPAC Aaron Lindsay
2023-03-22 20:25 ` [PATCH v3 5/8] target/arm: Implement v8.3 Pauth2 Aaron Lindsay
2023-03-22 20:25 ` [PATCH v3 6/8] targer/arm: Inform helpers whether a PAC instruction is 'combined' Aaron Lindsay
2023-03-22 20:25 ` [PATCH v3 7/8] target/arm: Implement v8.3 FPAC and FPACCOMBINE Aaron Lindsay
2023-03-23 17:48 ` Richard Henderson
2023-03-22 20:25 ` Aaron Lindsay [this message]
2023-03-23 17:51 ` [PATCH v3 8/8] target/arm: Add CPU property for QARMA3, enable FPACCombined by default Richard Henderson
-- strict thread matches above, loose matches on Subject: below --
2023-06-09 17:23 [PATCH v3 0/8] Implement Most ARMv8.3 Pointer Authentication Features Aaron Lindsay
2023-06-09 17:23 ` [PATCH v3 8/8] target/arm: Add CPU property for QARMA3, enable FPACCombined by default Aaron Lindsay
2023-07-04 13:43 ` Peter Maydell
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