From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-ppc@nongnu.org
Cc: Nicholas Piggin <npiggin@gmail.com>, qemu-devel@nongnu.org
Subject: [PATCH 5/6] target/ppc: Add SRR1 prefix indication to interrupt handlers
Date: Thu, 23 Mar 2023 12:22:36 +1000 [thread overview]
Message-ID: <20230323022237.1807512-5-npiggin@gmail.com> (raw)
In-Reply-To: <20230323022237.1807512-1-npiggin@gmail.com>
ISA v3.1 introduced prefix instructions. Among the changes, various
synchronous interrupts report whether they were caused by a prefix
instruction in (H)SRR1.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/excp_helper.c | 37 +++++++++++++++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index c8b8eca3b1..2e0321ab69 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -1353,12 +1353,26 @@ static bool books_vhyp_handles_hv_excp(PowerPCCPU *cpu)
return false;
}
+static bool is_prefix_excp(CPUPPCState *env, uint32_t insn)
+{
+ switch (env->excp_model) {
+ case POWERPC_EXCP_970:
+ case POWERPC_EXCP_POWER7:
+ case POWERPC_EXCP_POWER8:
+ case POWERPC_EXCP_POWER9:
+ return false;
+ default: /* POWER10 / ISAv3.1 onward */
+ return ((insn & 0xfc000000) == 0x04000000);
+ }
+}
+
static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
{
CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
target_ulong msr, new_msr, vector;
int srr0, srr1, lev = -1;
+ uint32_t insn = 0;
/* new srr1 value excluding must-be-zero bits */
msr = env->msr & ~0x783f0000ULL;
@@ -1397,6 +1411,29 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
vector |= env->excp_prefix;
+ switch (excp) {
+ case POWERPC_EXCP_MCHECK:
+ case POWERPC_EXCP_DSI:
+ case POWERPC_EXCP_DSEG:
+ case POWERPC_EXCP_ALIGN:
+ case POWERPC_EXCP_PROGRAM:
+ case POWERPC_EXCP_FPU:
+ case POWERPC_EXCP_TRACE:
+ case POWERPC_EXCP_HDSI:
+ case POWERPC_EXCP_HV_EMU:
+ case POWERPC_EXCP_VPU:
+ case POWERPC_EXCP_VSXU:
+ case POWERPC_EXCP_FU:
+ case POWERPC_EXCP_HV_FU:
+ insn = ppc_ldl_code(env, env->nip);
+ if (is_prefix_excp(env, insn)) {
+ msr |= PPC_BIT(34);
+ }
+ break;
+ default:
+ break;
+ }
+
switch (excp) {
case POWERPC_EXCP_MCHECK: /* Machine check exception */
if (!FIELD_EX64(env->msr, MSR, ME)) {
--
2.37.2
next prev parent reply other threads:[~2023-03-23 2:24 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-23 2:22 [PATCH 1/6] target/ppc: Fix width of some 32-bit SPRs Nicholas Piggin
2023-03-23 2:22 ` [PATCH 2/6] target/ppc: Better CTRL SPR implementation Nicholas Piggin
2023-03-23 2:22 ` [PATCH 3/6] target/ppc: Fix instruction loading endianness in alignment interrupt Nicholas Piggin
2023-03-24 13:30 ` Fabiano Rosas
2023-03-27 4:25 ` Nicholas Piggin
2023-03-23 2:22 ` [PATCH 4/6] target/ppc: Alignment faults do not set DSISR in ISA v3.0 onward Nicholas Piggin
2023-03-24 13:39 ` Fabiano Rosas
2023-03-27 4:26 ` Nicholas Piggin
2023-03-23 2:22 ` Nicholas Piggin [this message]
2023-03-23 2:22 ` [PATCH 6/6] target/ppc: Implement HEIR SPR Nicholas Piggin
2023-05-09 9:51 ` Harsh Prateek Bora
2023-05-15 8:26 ` Nicholas Piggin
2023-05-15 8:32 ` Harsh Prateek Bora
2023-05-15 9:32 ` Harsh Prateek Bora
2023-05-15 10:45 ` Nicholas Piggin
2023-05-15 10:54 ` Harsh Prateek Bora
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230323022237.1807512-5-npiggin@gmail.com \
--to=npiggin@gmail.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).