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From: Weiwei Li <liweiwei@iscas.ac.cn>
To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Cc: palmer@dabbelt.com, alistair.francis@wdc.com,
	bin.meng@windriver.com, dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com, wangjunqiang@iscas.ac.cn,
	lazyparser@gmail.com, Weiwei Li <liweiwei@iscas.ac.cn>
Subject: [PATCH v2 00/10] target/riscv: Simplification for RVH related check and code style fix
Date: Mon, 27 Mar 2023 16:08:48 +0800	[thread overview]
Message-ID: <20230327080858.39703-1-liweiwei@iscas.ac.cn> (raw)

This patchset tries to simplify the RVH related check and fix some code style problems, such as problems for indentation, multi-line comments and lines with over 80 characters.

The port is available here:
https://github.com/plctlab/plct-qemu/tree/plct-virtfix-upstream

v2:
* add comment to specify riscv_cpu_set_virt_enabled() can only be called when RVH is enabled in patch 4 (suggested by Richard Henderson)
* merge patch from LIU Zhiwei(Message-ID: <20230325145348.1208-1-zhiwei_liu@linux.alibaba.com>) to patch 5
* use env->virt_enabled directly instead of riscv_cpu_virt_enabled() in patch 6 (suggested by LIU Zhiwei)
* remain the orginal identation for macro name in patch 8 (suggested by LIU Zhiwei)

LIU Zhiwei (1):
  target/riscv: Convert env->virt to a bool env->virt_enabled

Weiwei Li (9):
  target/riscv: Remove redundant call to riscv_cpu_virt_enabled
  target/riscv: Remove redundant check on RVH
  target/riscv: Remove check on RVH for riscv_cpu_virt_enabled
  target/riscv: Remove check on RVH for riscv_cpu_set_virt_enabled
  target/riscv: Remove riscv_cpu_virt_enabled()
  target/riscv: Remove redundant parentheses
  target/riscv: Fix format for indentation
  target/riscv: Fix format for comments
  target/riscv: Fix lines with over 80 characters

 target/riscv/arch_dump.c                |   7 +-
 target/riscv/cpu.c                      |   8 +-
 target/riscv/cpu.h                      |  29 +--
 target/riscv/cpu_bits.h                 |   5 +-
 target/riscv/cpu_helper.c               | 142 ++++++------
 target/riscv/csr.c                      |  52 ++---
 target/riscv/debug.c                    |  10 +-
 target/riscv/insn_trans/trans_rvv.c.inc |  36 +--
 target/riscv/machine.c                  |   6 +-
 target/riscv/op_helper.c                |  21 +-
 target/riscv/pmp.c                      |  48 ++--
 target/riscv/pmp.h                      |   9 +-
 target/riscv/pmu.c                      |   7 +-
 target/riscv/sbi_ecall_interface.h      |   8 +-
 target/riscv/translate.c                |  14 +-
 target/riscv/vector_helper.c            | 292 ++++++++++++++----------
 16 files changed, 378 insertions(+), 316 deletions(-)

-- 
2.25.1



             reply	other threads:[~2023-03-27  8:10 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-27  8:08 Weiwei Li [this message]
2023-03-27  8:08 ` [PATCH v2 01/10] target/riscv: Remove redundant call to riscv_cpu_virt_enabled Weiwei Li
2023-04-05  5:17   ` Alistair Francis
2023-03-27  8:08 ` [PATCH v2 02/10] target/riscv: Remove redundant check on RVH Weiwei Li
2023-04-05  5:17   ` Alistair Francis
2023-03-27  8:08 ` [PATCH v2 03/10] target/riscv: Remove check on RVH for riscv_cpu_virt_enabled Weiwei Li
2023-04-05  5:18   ` Alistair Francis
2023-03-27  8:08 ` [PATCH v2 04/10] target/riscv: Remove check on RVH for riscv_cpu_set_virt_enabled Weiwei Li
2023-04-05  5:20   ` Alistair Francis
2023-03-27  8:08 ` [PATCH v2 05/10] target/riscv: Convert env->virt to a bool env->virt_enabled Weiwei Li
2023-03-27 18:09   ` Richard Henderson
2023-04-05  5:26   ` Alistair Francis
2023-03-27  8:08 ` [PATCH v2 06/10] target/riscv: Remove riscv_cpu_virt_enabled() Weiwei Li
2023-03-27 18:10   ` Richard Henderson
2023-03-28  1:14   ` LIU Zhiwei
2023-04-05  5:26   ` Alistair Francis
2023-03-27  8:08 ` [PATCH v2 07/10] target/riscv: Remove redundant parentheses Weiwei Li
2023-04-05  5:27   ` Alistair Francis
2023-03-27  8:08 ` [PATCH v2 08/10] target/riscv: Fix format for indentation Weiwei Li
2023-04-05  5:29   ` Alistair Francis
2023-03-27  8:08 ` [PATCH v2 09/10] target/riscv: Fix format for comments Weiwei Li
2023-04-05  5:28   ` Alistair Francis
2023-03-27  8:08 ` [PATCH v2 10/10] target/riscv: Fix lines with over 80 characters Weiwei Li
2023-04-05  5:30   ` Alistair Francis
2023-04-05  5:30 ` [PATCH v2 00/10] target/riscv: Simplification for RVH related check and code style fix Alistair Francis
2023-04-05  5:39   ` Alistair Francis

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