From: Weiwei Li <liweiwei@iscas.ac.cn>
To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Cc: palmer@dabbelt.com, alistair.francis@wdc.com,
bin.meng@windriver.com, dbarboza@ventanamicro.com,
zhiwei_liu@linux.alibaba.com, wangjunqiang@iscas.ac.cn,
lazyparser@gmail.com, Weiwei Li <liweiwei@iscas.ac.cn>
Subject: [PATCH 0/5] target/riscv: Fix pointer mask related support
Date: Mon, 27 Mar 2023 18:00:22 +0800 [thread overview]
Message-ID: <20230327100027.61160-1-liweiwei@iscas.ac.cn> (raw)
This patchset tries to fix some problems in current implementation for pointer
mask extension, and add support for pointer mask of instruction fetch.
The port is available here:
https://github.com/plctlab/plct-qemu/tree/plct-pm-fix
Weiwei Li (5):
target/riscv: Fix effective address for pointer mask
target/riscv: Use sign-extended data address when xl = 32
target/riscv: Fix pointer mask transformation for vector address
target/riscv: take xl into consideration for vector address
target/riscv: Add pointer mask support for instruction fetch
target/riscv/cpu.h | 1 +
target/riscv/cpu_helper.c | 25 +++++++++++++++++++++++--
target/riscv/csr.c | 2 --
target/riscv/translate.c | 16 ++++++++++++----
target/riscv/vector_helper.c | 5 ++++-
5 files changed, 40 insertions(+), 9 deletions(-)
--
2.25.1
next reply other threads:[~2023-03-27 10:02 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-27 10:00 Weiwei Li [this message]
2023-03-27 10:00 ` [PATCH 1/5] target/riscv: Fix effective address for pointer mask Weiwei Li
2023-03-27 13:19 ` Daniel Henrique Barboza
2023-03-28 2:20 ` LIU Zhiwei
2023-03-28 2:48 ` liweiwei
2023-03-28 3:18 ` Richard Henderson
2023-03-28 3:24 ` LIU Zhiwei
2023-03-28 3:33 ` liweiwei
2023-03-28 7:25 ` LIU Zhiwei
2023-03-28 10:26 ` liweiwei
2023-03-27 10:00 ` [PATCH 2/5] target/riscv: Use sign-extended data address when xl = 32 Weiwei Li
2023-03-27 13:20 ` Daniel Henrique Barboza
2023-03-28 2:14 ` LIU Zhiwei
2023-03-28 3:07 ` liweiwei
2023-03-27 10:00 ` [PATCH 3/5] target/riscv: Fix pointer mask transformation for vector address Weiwei Li
2023-03-27 13:20 ` Daniel Henrique Barboza
2023-03-28 2:21 ` LIU Zhiwei
2023-03-27 10:00 ` [PATCH 4/5] target/riscv: take xl into consideration " Weiwei Li
2023-03-27 13:21 ` Daniel Henrique Barboza
2023-03-28 2:21 ` LIU Zhiwei
2023-03-27 10:00 ` [PATCH 5/5] target/riscv: Add pointer mask support for instruction fetch Weiwei Li
2023-03-27 13:28 ` Daniel Henrique Barboza
2023-03-27 15:13 ` Daniel Henrique Barboza
2023-03-27 18:04 ` Richard Henderson
2023-03-28 1:55 ` liweiwei
2023-03-28 2:31 ` LIU Zhiwei
2023-03-28 3:14 ` liweiwei
2023-03-28 3:31 ` Richard Henderson
2023-03-28 4:09 ` liweiwei
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