* [PATCH] target/riscv: Fix addr type for get_physical_address
@ 2023-03-29 10:19 Weiwei Li
2023-03-29 14:56 ` Richard Henderson
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Weiwei Li @ 2023-03-29 10:19 UTC (permalink / raw)
To: qemu-riscv, qemu-devel
Cc: palmer, alistair.francis, bin.meng, dbarboza, zhiwei_liu,
wangjunqiang, lazyparser, Weiwei Li
Function get_physical_address() translates both virtual address and
guest physical address, and the latter is 34-bits for Sv32x4. So we
should use vaddr type for 'addr' parameter.
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
---
target/riscv/cpu_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index f88c503cf4..cd6fbaeddc 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -739,7 +739,7 @@ static int get_physical_address_pmp(CPURISCVState *env, int *prot,
* @env: CPURISCVState
* @physical: This will be set to the calculated physical address
* @prot: The returned protection attributes
- * @addr: The virtual address to be translated
+ * @addr: The virtual address or guest physical address to be translated
* @fault_pte_addr: If not NULL, this will be set to fault pte address
* when a error occurs on pte address translation.
* This will already be shifted to match htval.
@@ -751,7 +751,7 @@ static int get_physical_address_pmp(CPURISCVState *env, int *prot,
* @is_debug: Is this access from a debugger or the monitor?
*/
static int get_physical_address(CPURISCVState *env, hwaddr *physical,
- int *prot, target_ulong addr,
+ int *prot, vaddr addr,
target_ulong *fault_pte_addr,
int access_type, int mmu_idx,
bool first_stage, bool two_stage,
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] target/riscv: Fix addr type for get_physical_address
2023-03-29 10:19 [PATCH] target/riscv: Fix addr type for get_physical_address Weiwei Li
@ 2023-03-29 14:56 ` Richard Henderson
2023-04-05 6:02 ` Alistair Francis
2023-04-05 6:02 ` Alistair Francis
2 siblings, 0 replies; 4+ messages in thread
From: Richard Henderson @ 2023-03-29 14:56 UTC (permalink / raw)
To: Weiwei Li, qemu-riscv, qemu-devel
Cc: palmer, alistair.francis, bin.meng, dbarboza, zhiwei_liu,
wangjunqiang, lazyparser
On 3/29/23 03:19, Weiwei Li wrote:
> Function get_physical_address() translates both virtual address and
> guest physical address, and the latter is 34-bits for Sv32x4. So we
> should use vaddr type for 'addr' parameter.
>
> Signed-off-by: Weiwei Li<liweiwei@iscas.ac.cn>
> Signed-off-by: Junqiang Wang<wangjunqiang@iscas.ac.cn>
> ---
> target/riscv/cpu_helper.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] target/riscv: Fix addr type for get_physical_address
2023-03-29 10:19 [PATCH] target/riscv: Fix addr type for get_physical_address Weiwei Li
2023-03-29 14:56 ` Richard Henderson
@ 2023-04-05 6:02 ` Alistair Francis
2023-04-05 6:02 ` Alistair Francis
2 siblings, 0 replies; 4+ messages in thread
From: Alistair Francis @ 2023-04-05 6:02 UTC (permalink / raw)
To: Weiwei Li
Cc: qemu-riscv, qemu-devel, palmer, alistair.francis, bin.meng,
dbarboza, zhiwei_liu, wangjunqiang, lazyparser
On Wed, Mar 29, 2023 at 8:20 PM Weiwei Li <liweiwei@iscas.ac.cn> wrote:
>
> Function get_physical_address() translates both virtual address and
> guest physical address, and the latter is 34-bits for Sv32x4. So we
> should use vaddr type for 'addr' parameter.
>
> Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/cpu_helper.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index f88c503cf4..cd6fbaeddc 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -739,7 +739,7 @@ static int get_physical_address_pmp(CPURISCVState *env, int *prot,
> * @env: CPURISCVState
> * @physical: This will be set to the calculated physical address
> * @prot: The returned protection attributes
> - * @addr: The virtual address to be translated
> + * @addr: The virtual address or guest physical address to be translated
> * @fault_pte_addr: If not NULL, this will be set to fault pte address
> * when a error occurs on pte address translation.
> * This will already be shifted to match htval.
> @@ -751,7 +751,7 @@ static int get_physical_address_pmp(CPURISCVState *env, int *prot,
> * @is_debug: Is this access from a debugger or the monitor?
> */
> static int get_physical_address(CPURISCVState *env, hwaddr *physical,
> - int *prot, target_ulong addr,
> + int *prot, vaddr addr,
> target_ulong *fault_pte_addr,
> int access_type, int mmu_idx,
> bool first_stage, bool two_stage,
> --
> 2.25.1
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] target/riscv: Fix addr type for get_physical_address
2023-03-29 10:19 [PATCH] target/riscv: Fix addr type for get_physical_address Weiwei Li
2023-03-29 14:56 ` Richard Henderson
2023-04-05 6:02 ` Alistair Francis
@ 2023-04-05 6:02 ` Alistair Francis
2 siblings, 0 replies; 4+ messages in thread
From: Alistair Francis @ 2023-04-05 6:02 UTC (permalink / raw)
To: Weiwei Li
Cc: qemu-riscv, qemu-devel, palmer, alistair.francis, bin.meng,
dbarboza, zhiwei_liu, wangjunqiang, lazyparser
On Wed, Mar 29, 2023 at 8:20 PM Weiwei Li <liweiwei@iscas.ac.cn> wrote:
>
> Function get_physical_address() translates both virtual address and
> guest physical address, and the latter is 34-bits for Sv32x4. So we
> should use vaddr type for 'addr' parameter.
>
> Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn
> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> target/riscv/cpu_helper.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index f88c503cf4..cd6fbaeddc 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -739,7 +739,7 @@ static int get_physical_address_pmp(CPURISCVState *env, int *prot,
> * @env: CPURISCVState
> * @physical: This will be set to the calculated physical address
> * @prot: The returned protection attributes
> - * @addr: The virtual address to be translated
> + * @addr: The virtual address or guest physical address to be translated
> * @fault_pte_addr: If not NULL, this will be set to fault pte address
> * when a error occurs on pte address translation.
> * This will already be shifted to match htval.
> @@ -751,7 +751,7 @@ static int get_physical_address_pmp(CPURISCVState *env, int *prot,
> * @is_debug: Is this access from a debugger or the monitor?
> */
> static int get_physical_address(CPURISCVState *env, hwaddr *physical,
> - int *prot, target_ulong addr,
> + int *prot, vaddr addr,
> target_ulong *fault_pte_addr,
> int access_type, int mmu_idx,
> bool first_stage, bool two_stage,
> --
> 2.25.1
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
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2023-03-29 10:19 [PATCH] target/riscv: Fix addr type for get_physical_address Weiwei Li
2023-03-29 14:56 ` Richard Henderson
2023-04-05 6:02 ` Alistair Francis
2023-04-05 6:02 ` Alistair Francis
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