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From: Weiwei Li <liweiwei@iscas.ac.cn>
To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Cc: palmer@dabbelt.com, alistair.francis@wdc.com,
	bin.meng@windriver.com, dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com, wangjunqiang@iscas.ac.cn,
	lazyparser@gmail.com, Weiwei Li <liweiwei@iscas.ac.cn>
Subject: [PATCH v3 5/6] target/riscv: Enable PC-relative translation in system mode
Date: Fri, 31 Mar 2023 09:45:29 +0800	[thread overview]
Message-ID: <20230331014530.29805-6-liweiwei@iscas.ac.cn> (raw)
In-Reply-To: <20230331014530.29805-1-liweiwei@iscas.ac.cn>

The existence of CF_PCREL can improve performance with the guest
kernel's address space randomization.  Each guest process maps
libc.so (et al) at a different virtual address, and this allows
those translations to be shared.

Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
---
 target/riscv/cpu.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 646fa31a59..3b562d5d9f 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1193,6 +1193,8 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp)
 
 
 #ifndef CONFIG_USER_ONLY
+    cs->tcg_cflags |= CF_PCREL;
+
     if (cpu->cfg.ext_sstc) {
         riscv_timer_init(cpu);
     }
-- 
2.25.1



  parent reply	other threads:[~2023-03-31  1:47 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-31  1:45 [PATCH v3 0/6] target/riscv: Fix pointer mask related support Weiwei Li
2023-03-31  1:45 ` [PATCH v3 1/6] target/riscv: Fix pointer mask transformation for vector address Weiwei Li
2023-03-31  1:45 ` [PATCH v3 2/6] target/riscv: Update cur_pmmask/base when xl changes Weiwei Li
2023-03-31  1:45 ` [PATCH v3 3/6] target/riscv: Fix target address to update badaddr Weiwei Li
2023-03-31  1:45 ` [PATCH v3 4/6] target/riscv: Add support for PC-relative translation Weiwei Li
2023-03-31  1:45 ` Weiwei Li [this message]
2023-03-31  7:59   ` [PATCH v3 5/6] target/riscv: Enable PC-relative translation in system mode LIU Zhiwei
2023-03-31  1:45 ` [PATCH v3 6/6] target/riscv: Add pointer mask support for instruction fetch Weiwei Li
  -- strict thread matches above, loose matches on Subject: below --
2023-04-01 12:39 [PATCH v3 0/6] target/riscv: Fix pointer mask related support Weiwei Li
2023-04-01 12:39 ` [PATCH v3 5/6] target/riscv: Enable PC-relative translation in system mode Weiwei Li

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