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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: kvm@vger.kernel.org, qemu-arm@nongnu.org,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH 2/2] hw/arm/virt: Restrict Cortex-A7 check to TCG
Date: Wed,  5 Apr 2023 12:08:48 +0200	[thread overview]
Message-ID: <20230405100848.76145-3-philmd@linaro.org> (raw)
In-Reply-To: <20230405100848.76145-1-philmd@linaro.org>

The Cortex-A7 core is only available when TCG is enabled (see
commit 80485d88f9 "target/arm: Restrict v7A TCG cpus to TCG accel").

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/arm/virt.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index ac626b3bef..1fe39c6683 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -204,7 +204,9 @@ static const int a15irqmap[] = {
 };
 
 static const char *valid_cpus[] = {
+#ifdef CONFIG_TCG
     ARM_CPU_TYPE_NAME("cortex-a7"),
+#endif
     ARM_CPU_TYPE_NAME("cortex-a15"),
     ARM_CPU_TYPE_NAME("cortex-a35"),
     ARM_CPU_TYPE_NAME("cortex-a53"),
-- 
2.38.1



  parent reply	other threads:[~2023-04-05 10:09 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-05 10:08 [PATCH 0/2] target/arm: KVM Aarch32 spring cleaning Philippe Mathieu-Daudé
2023-04-05 10:08 ` [PATCH 1/2] target/arm: Remove KVM AArch32 CPU definitions Philippe Mathieu-Daudé
2023-04-05 10:08 ` Philippe Mathieu-Daudé [this message]
2023-04-05 22:06 ` [PATCH 0/2] target/arm: KVM Aarch32 spring cleaning Richard Henderson
2023-04-11 14:35   ` Peter Maydell

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