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* [PATCH v3] target/i386: Change wrong XFRM value
@ 2023-04-06  6:40 Yang Zhong
  2023-04-06 11:32 ` Huang, Kai
                   ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Yang Zhong @ 2023-04-06  6:40 UTC (permalink / raw)
  To: pbonzini
  Cc: qemu-devel, seanjc, christian.ehrhardt, kai.huang, weijiang.yang,
	yang.zhong

The previous patch wrongly replaced FEAT_XSAVE_XCR0_{LO|HI} with
FEAT_XSAVE_XSS_{LO|HI} in CPUID(EAX=12,ECX=1):{ECX,EDX}, which made
SGX enclave only supported SSE and x87 feature(xfrm=0x3).

Fixes: 301e90675c3f ("target/i386: Enable support for XSAVES based features")

Signed-off-by: Yang Zhong <yang.zhong@linux.intel.com>
Reviewed-by: Yang Weijiang <weijiang.yang@intel.com>
---
 target/i386/cpu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 6576287e5b..f083ff4335 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5718,8 +5718,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
         } else {
             *eax &= env->features[FEAT_SGX_12_1_EAX];
             *ebx &= 0; /* ebx reserve */
-            *ecx &= env->features[FEAT_XSAVE_XSS_LO];
-            *edx &= env->features[FEAT_XSAVE_XSS_HI];
+            *ecx &= env->features[FEAT_XSAVE_XCR0_LO];
+            *edx &= env->features[FEAT_XSAVE_XCR0_HI];
 
             /* FP and SSE are always allowed regardless of XSAVE/XCR0. */
             *ecx |= XSTATE_FP_MASK | XSTATE_SSE_MASK;


^ permalink raw reply related	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2023-04-10  5:38 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-04-06  6:40 [PATCH v3] target/i386: Change wrong XFRM value Yang Zhong
2023-04-06 11:32 ` Huang, Kai
2023-04-06 12:05 ` Paolo Bonzini
2023-04-07 11:10   ` Yang Zhong
2023-04-09 13:40 ` Michael Tokarev
2023-04-10  5:37   ` Yang Zhong

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