From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org,
qemu-riscv@nongnu.org, qemu-ppc@nongnu.org
Subject: [PATCH 26/42] tcg/s390x: Pass TCGType to tcg_out_qemu_{ld,st}
Date: Fri, 7 Apr 2023 19:42:58 -0700 [thread overview]
Message-ID: <20230408024314.3357414-28-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230408024314.3357414-1-richard.henderson@linaro.org>
We need to set this in TCGLabelQemuLdst, so plumb this
all the way through from tcg_out_op.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/s390x/tcg-target.c.inc | 22 ++++++++++++++--------
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index b399798664..77dcdd7c0f 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -1770,13 +1770,14 @@ static TCGReg tcg_out_tlb_read(TCGContext *s, TCGReg addr_reg, MemOp opc,
}
static void add_qemu_ldst_label(TCGContext *s, bool is_ld, MemOpIdx oi,
- TCGReg data, TCGReg addr,
+ TCGType type, TCGReg data, TCGReg addr,
tcg_insn_unit *raddr, tcg_insn_unit *label_ptr)
{
TCGLabelQemuLdst *label = new_ldst_label(s);
label->is_ld = is_ld;
label->oi = oi;
+ label->type = type;
label->datalo_reg = data;
label->addrlo_reg = addr;
label->raddr = tcg_splitwx_to_rx(raddr);
@@ -1900,7 +1901,7 @@ static void tcg_prepare_user_ldst(TCGContext *s, TCGReg *addr_reg,
#endif /* CONFIG_SOFTMMU */
static void tcg_out_qemu_ld(TCGContext* s, TCGReg data_reg, TCGReg addr_reg,
- MemOpIdx oi)
+ MemOpIdx oi, TCGType d_type)
{
MemOp opc = get_memop(oi);
#ifdef CONFIG_SOFTMMU
@@ -1916,7 +1917,8 @@ static void tcg_out_qemu_ld(TCGContext* s, TCGReg data_reg, TCGReg addr_reg,
tcg_out_qemu_ld_direct(s, opc, data_reg, base_reg, TCG_REG_R2, 0);
- add_qemu_ldst_label(s, 1, oi, data_reg, addr_reg, s->code_ptr, label_ptr);
+ add_qemu_ldst_label(s, 1, oi, d_type, data_reg, addr_reg,
+ s->code_ptr, label_ptr);
#else
TCGReg index_reg;
tcg_target_long disp;
@@ -1931,7 +1933,7 @@ static void tcg_out_qemu_ld(TCGContext* s, TCGReg data_reg, TCGReg addr_reg,
}
static void tcg_out_qemu_st(TCGContext* s, TCGReg data_reg, TCGReg addr_reg,
- MemOpIdx oi)
+ MemOpIdx oi, TCGType d_type)
{
MemOp opc = get_memop(oi);
#ifdef CONFIG_SOFTMMU
@@ -1947,7 +1949,8 @@ static void tcg_out_qemu_st(TCGContext* s, TCGReg data_reg, TCGReg addr_reg,
tcg_out_qemu_st_direct(s, opc, data_reg, base_reg, TCG_REG_R2, 0);
- add_qemu_ldst_label(s, 0, oi, data_reg, addr_reg, s->code_ptr, label_ptr);
+ add_qemu_ldst_label(s, 0, oi, d_type, data_reg, addr_reg,
+ s->code_ptr, label_ptr);
#else
TCGReg index_reg;
tcg_target_long disp;
@@ -2307,13 +2310,16 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
break;
case INDEX_op_qemu_ld_i32:
- /* ??? Technically we can use a non-extending instruction. */
+ tcg_out_qemu_ld(s, args[0], args[1], args[2], TCG_TYPE_I32);
+ break;
case INDEX_op_qemu_ld_i64:
- tcg_out_qemu_ld(s, args[0], args[1], args[2]);
+ tcg_out_qemu_ld(s, args[0], args[1], args[2], TCG_TYPE_I64);
break;
case INDEX_op_qemu_st_i32:
+ tcg_out_qemu_st(s, args[0], args[1], args[2], TCG_TYPE_I32);
+ break;
case INDEX_op_qemu_st_i64:
- tcg_out_qemu_st(s, args[0], args[1], args[2]);
+ tcg_out_qemu_st(s, args[0], args[1], args[2], TCG_TYPE_I64);
break;
case INDEX_op_ld16s_i64:
--
2.34.1
next prev parent reply other threads:[~2023-04-08 2:46 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-08 2:42 [PATCH for-8.1 00/42] tcg: Simplify calls to load/store helpers Richard Henderson
2023-04-08 2:42 ` [PATCH for-8.0] tcg/i386: Adjust assert in tcg_out_addi_ptr Richard Henderson
2023-04-08 2:42 ` [PATCH 01/42] tcg: Replace if + tcg_abort with tcg_debug_assert Richard Henderson
2023-04-11 10:52 ` Philippe Mathieu-Daudé
2023-04-08 2:42 ` [PATCH 02/42] tcg: Replace tcg_abort with g_assert_not_reached Richard Henderson
2023-04-11 10:53 ` Philippe Mathieu-Daudé
2023-04-08 2:42 ` [PATCH 03/42] tcg: Split out tcg_out_ext8s Richard Henderson
2023-04-21 21:45 ` Philippe Mathieu-Daudé
2023-04-08 2:42 ` [PATCH 04/42] tcg: Split out tcg_out_ext8u Richard Henderson
2023-04-21 21:50 ` Philippe Mathieu-Daudé
2023-04-08 2:42 ` [PATCH 05/42] tcg: Split out tcg_out_ext16s Richard Henderson
2023-04-21 21:53 ` Philippe Mathieu-Daudé
2023-04-08 2:42 ` [PATCH 06/42] tcg: Split out tcg_out_ext16u Richard Henderson
2023-04-21 22:03 ` Philippe Mathieu-Daudé
2023-04-08 2:42 ` [PATCH 07/42] tcg: Split out tcg_out_ext32s Richard Henderson
2023-04-08 2:42 ` [PATCH 08/42] tcg: Split out tcg_out_ext32u Richard Henderson
2023-04-08 2:42 ` [PATCH 09/42] tcg: Split out tcg_out_exts_i32_i64 Richard Henderson
2023-04-08 2:42 ` [PATCH 10/42] tcg/loongarch64: Conditionalize tcg_out_exts_i32_i64 Richard Henderson
2023-04-08 2:42 ` [PATCH 11/42] tcg/mips: " Richard Henderson
2023-04-08 2:42 ` [PATCH 12/42] tcg/riscv: " Richard Henderson
2023-04-08 2:42 ` [PATCH 13/42] tcg: Split out tcg_out_extu_i32_i64 Richard Henderson
2023-04-08 2:42 ` [PATCH 14/42] tcg/i386: Conditionalize tcg_out_extu_i32_i64 Richard Henderson
2023-04-08 2:42 ` [PATCH 15/42] tcg: Split out tcg_out_extrl_i64_i32 Richard Henderson
2023-04-08 2:42 ` [PATCH 16/42] tcg: Introduce tcg_out_movext Richard Henderson
2023-04-08 2:42 ` [PATCH 17/42] tcg: Introduce tcg_out_xchg Richard Henderson
2023-04-08 2:42 ` [PATCH 18/42] tcg: Introduce tcg_out_movext2 Richard Henderson
2023-04-08 2:42 ` [PATCH 19/42] tcg: Clear TCGLabelQemuLdst on allocation Richard Henderson
2023-04-11 12:10 ` Philippe Mathieu-Daudé
2023-04-08 2:42 ` [PATCH 20/42] tcg/i386: Use TCGType not bool is_64 in tcg_out_qemu_{ld, st} Richard Henderson
2023-04-11 12:12 ` Philippe Mathieu-Daudé
2023-04-12 11:51 ` Richard Henderson
2023-04-08 2:42 ` [PATCH 21/42] tcg/aarch64: Rename ext to d_type in tcg_out_qemu_ld Richard Henderson
2023-04-11 12:14 ` Philippe Mathieu-Daudé
2023-04-08 2:42 ` [PATCH 22/42] tcg/aarch64: Pass TGType to tcg_out_qemu_st Richard Henderson
2023-04-08 2:42 ` [PATCH 23/42] tcg/arm: Use TCGType not bool is_64 in tcg_out_qemu_{ld, st} Richard Henderson
2023-04-08 2:42 ` [PATCH 24/42] tcg/i386: " Richard Henderson
2023-04-11 12:17 ` Philippe Mathieu-Daudé
2023-04-08 2:42 ` [PATCH 25/42] tcg/ppc: " Richard Henderson
2023-04-11 12:18 ` Philippe Mathieu-Daudé
2023-04-08 2:42 ` Richard Henderson [this message]
2023-04-11 12:20 ` [PATCH 26/42] tcg/s390x: Pass TCGType to tcg_out_qemu_{ld,st} Philippe Mathieu-Daudé
2023-04-08 2:42 ` [PATCH 27/42] tcg/riscv: Require TCG_TARGET_REG_BITS == 64 Richard Henderson
2023-04-08 2:43 ` [PATCH 28/42] tcg/riscv: Expand arguments to tcg_out_qemu_{ld,st} Richard Henderson
2023-04-08 2:43 ` [PATCH 29/42] tcg: Move TCGLabelQemuLdst to tcg.c Richard Henderson
2023-04-08 2:43 ` [PATCH 30/42] tcg: Introduce tcg_out_ld_helper_args Richard Henderson
2023-04-08 2:43 ` [PATCH 31/42] tcg: Introduce tcg_out_st_helper_args Richard Henderson
2023-04-08 2:43 ` [PATCH 32/42] tcg/loongarch64: Simplify constraints on qemu_ld/st Richard Henderson
2023-04-08 2:43 ` [PATCH 33/42] tcg/mips: Reorg tcg_out_tlb_load Richard Henderson
2023-04-08 2:43 ` [PATCH 34/42] tcg/mips: Simplify constraints on qemu_ld/st Richard Henderson
2023-04-08 2:43 ` [PATCH 35/42] tcg/ppc: Reorg tcg_out_tlb_read Richard Henderson
2023-04-08 2:43 ` [PATCH 36/42] tcg/ppc: Adjust constraints on qemu_ld/st Richard Henderson
2023-04-08 2:43 ` [PATCH 37/42] tcg/ppc: Remove unused constraints A, B, C, D Richard Henderson
2023-04-08 2:43 ` [PATCH 38/42] tcg/riscv: Simplify constraints on qemu_ld/st Richard Henderson
2023-04-08 2:43 ` [PATCH 39/42] tcg/s390x: Use ALGFR in constructing host address for qemu_ld/st Richard Henderson
2023-04-08 2:43 ` [PATCH 40/42] tcg/s390x: Simplify constraints on qemu_ld/st Richard Henderson
2023-04-08 2:43 ` [PATCH 41/42] tcg/sparc64: Drop is_64 test from tcg_out_qemu_ld data return Richard Henderson
2023-04-08 2:43 ` [PATCH 42/42] tcg/sparc64: Pass TCGType to tcg_out_qemu_{ld,st} Richard Henderson
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