* [PATCH v2 1/4] ACPI: bios-tables-test.c step 2 (allowed-diff entries)
2023-04-18 16:52 [PATCH v2 0/4] hw/acpi: bump MADT to revision 5 Eric DeVolder
@ 2023-04-18 16:52 ` Eric DeVolder
2023-04-18 16:52 ` [PATCH v2 2/4] hw/acpi: arm: bump MADT to revision 5 Eric DeVolder
` (2 subsequent siblings)
3 siblings, 0 replies; 13+ messages in thread
From: Eric DeVolder @ 2023-04-18 16:52 UTC (permalink / raw)
To: shannon.zhaosl, mst, imammedo, ani, peter.maydell, qemu-arm,
qemu-devel, marcel.apfelbaum, pbonzini, richard.henderson,
eduardo
Cc: boris.ostrovsky, eric.devolder
Following the guidelines in tests/qtest/bios-tables-test.c, this
change sets-up bios-tables-test-allowed-diff.h to exclude the
imminent changes to the APIC tables, per step 2.
Signed-off-by: Eric DeVolder <eric.devolder@oracle.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..1e5e354ecf 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,5 @@
/* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/pc/APIC",
+"tests/data/acpi/q35/APIC",
+"tests/data/acpi/microvm/APIC",
+"tests/data/acpi/virt/APIC",
--
2.31.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH v2 2/4] hw/acpi: arm: bump MADT to revision 5
2023-04-18 16:52 [PATCH v2 0/4] hw/acpi: bump MADT to revision 5 Eric DeVolder
2023-04-18 16:52 ` [PATCH v2 1/4] ACPI: bios-tables-test.c step 2 (allowed-diff entries) Eric DeVolder
@ 2023-04-18 16:52 ` Eric DeVolder
2023-04-19 5:30 ` Michael S. Tsirkin
2023-04-18 16:52 ` [PATCH v2 3/4] hw/acpi: i386: " Eric DeVolder
2023-04-18 16:52 ` [PATCH v2 4/4] ACPI: bios-tables-test.c step 5 (updated expected table binaries) Eric DeVolder
3 siblings, 1 reply; 13+ messages in thread
From: Eric DeVolder @ 2023-04-18 16:52 UTC (permalink / raw)
To: shannon.zhaosl, mst, imammedo, ani, peter.maydell, qemu-arm,
qemu-devel, marcel.apfelbaum, pbonzini, richard.henderson,
eduardo
Cc: boris.ostrovsky, eric.devolder
Currently ARM QEMU generates, and reports, MADT revision 4. ACPI 6.3
introduces MADT revision 5.
For MADT revision 5, the GICC structure adds an SPE Overflow Interrupt
field. This new 2-byte field is created from the existing 3-byte
Reserved field. The spec indicates if the SPE overflow interrupt is
not supported, to zero the field.
Signed-off-by: Eric DeVolder <eric.devolder@oracle.com>
---
hw/arm/virt-acpi-build.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 4156111d49..23268dd981 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -705,7 +705,7 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
int i;
VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
const MemMapEntry *memmap = vms->memmap;
- AcpiTable table = { .sig = "APIC", .rev = 4, .oem_id = vms->oem_id,
+ AcpiTable table = { .sig = "APIC", .rev = 5, .oem_id = vms->oem_id,
.oem_table_id = vms->oem_table_id };
acpi_table_begin(&table, table_data);
@@ -763,7 +763,9 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
/* Processor Power Efficiency Class */
build_append_int_noprefix(table_data, 0, 1);
/* Reserved */
- build_append_int_noprefix(table_data, 0, 3);
+ build_append_int_noprefix(table_data, 0, 1);
+ /* SPE overflow Interrupt */
+ build_append_int_noprefix(table_data, 0, 2);
}
if (vms->gic_version != VIRT_GIC_VERSION_2) {
--
2.31.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v2 2/4] hw/acpi: arm: bump MADT to revision 5
2023-04-18 16:52 ` [PATCH v2 2/4] hw/acpi: arm: bump MADT to revision 5 Eric DeVolder
@ 2023-04-19 5:30 ` Michael S. Tsirkin
2023-04-19 14:04 ` Eric DeVolder
0 siblings, 1 reply; 13+ messages in thread
From: Michael S. Tsirkin @ 2023-04-19 5:30 UTC (permalink / raw)
To: Eric DeVolder
Cc: shannon.zhaosl, imammedo, ani, peter.maydell, qemu-arm,
qemu-devel, marcel.apfelbaum, pbonzini, richard.henderson,
eduardo, boris.ostrovsky
On Tue, Apr 18, 2023 at 12:52:17PM -0400, Eric DeVolder wrote:
> Currently ARM QEMU generates, and reports, MADT revision 4. ACPI 6.3
> introduces MADT revision 5.
>
> For MADT revision 5, the GICC structure adds an SPE Overflow Interrupt
> field. This new 2-byte field is created from the existing 3-byte
> Reserved field. The spec indicates if the SPE overflow interrupt is
> not supported, to zero the field.
>
> Signed-off-by: Eric DeVolder <eric.devolder@oracle.com>
So why do we bother changing this? I'd rather defer until
we actually intend to fill this field.
> ---
> hw/arm/virt-acpi-build.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 4156111d49..23268dd981 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -705,7 +705,7 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> int i;
> VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
> const MemMapEntry *memmap = vms->memmap;
> - AcpiTable table = { .sig = "APIC", .rev = 4, .oem_id = vms->oem_id,
> + AcpiTable table = { .sig = "APIC", .rev = 5, .oem_id = vms->oem_id,
> .oem_table_id = vms->oem_table_id };
>
> acpi_table_begin(&table, table_data);
> @@ -763,7 +763,9 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> /* Processor Power Efficiency Class */
> build_append_int_noprefix(table_data, 0, 1);
> /* Reserved */
> - build_append_int_noprefix(table_data, 0, 3);
> + build_append_int_noprefix(table_data, 0, 1);
> + /* SPE overflow Interrupt */
> + build_append_int_noprefix(table_data, 0, 2);
> }
>
> if (vms->gic_version != VIRT_GIC_VERSION_2) {
> --
> 2.31.1
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v2 2/4] hw/acpi: arm: bump MADT to revision 5
2023-04-19 5:30 ` Michael S. Tsirkin
@ 2023-04-19 14:04 ` Eric DeVolder
0 siblings, 0 replies; 13+ messages in thread
From: Eric DeVolder @ 2023-04-19 14:04 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: shannon.zhaosl, imammedo, ani, peter.maydell, qemu-arm,
qemu-devel, marcel.apfelbaum, pbonzini, richard.henderson,
eduardo, boris.ostrovsky
On 4/19/23 00:30, Michael S. Tsirkin wrote:
> On Tue, Apr 18, 2023 at 12:52:17PM -0400, Eric DeVolder wrote:
>> Currently ARM QEMU generates, and reports, MADT revision 4. ACPI 6.3
>> introduces MADT revision 5.
>>
>> For MADT revision 5, the GICC structure adds an SPE Overflow Interrupt
>> field. This new 2-byte field is created from the existing 3-byte
>> Reserved field. The spec indicates if the SPE overflow interrupt is
>> not supported, to zero the field.
>>
>> Signed-off-by: Eric DeVolder <eric.devolder@oracle.com>
>
> So why do we bother changing this? I'd rather defer until
> we actually intend to fill this field.
Perfectly reasonable to me. I'll drop the ARM change going forward.
eric
>
>> ---
>> hw/arm/virt-acpi-build.c | 6 ++++--
>> 1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
>> index 4156111d49..23268dd981 100644
>> --- a/hw/arm/virt-acpi-build.c
>> +++ b/hw/arm/virt-acpi-build.c
>> @@ -705,7 +705,7 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>> int i;
>> VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
>> const MemMapEntry *memmap = vms->memmap;
>> - AcpiTable table = { .sig = "APIC", .rev = 4, .oem_id = vms->oem_id,
>> + AcpiTable table = { .sig = "APIC", .rev = 5, .oem_id = vms->oem_id,
>> .oem_table_id = vms->oem_table_id };
>>
>> acpi_table_begin(&table, table_data);
>> @@ -763,7 +763,9 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>> /* Processor Power Efficiency Class */
>> build_append_int_noprefix(table_data, 0, 1);
>> /* Reserved */
>> - build_append_int_noprefix(table_data, 0, 3);
>> + build_append_int_noprefix(table_data, 0, 1);
>> + /* SPE overflow Interrupt */
>> + build_append_int_noprefix(table_data, 0, 2);
>> }
>>
>> if (vms->gic_version != VIRT_GIC_VERSION_2) {
>> --
>> 2.31.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v2 3/4] hw/acpi: i386: bump MADT to revision 5
2023-04-18 16:52 [PATCH v2 0/4] hw/acpi: bump MADT to revision 5 Eric DeVolder
2023-04-18 16:52 ` [PATCH v2 1/4] ACPI: bios-tables-test.c step 2 (allowed-diff entries) Eric DeVolder
2023-04-18 16:52 ` [PATCH v2 2/4] hw/acpi: arm: bump MADT to revision 5 Eric DeVolder
@ 2023-04-18 16:52 ` Eric DeVolder
2023-04-19 14:56 ` Michael S. Tsirkin
2023-04-20 8:05 ` Ani Sinha
2023-04-18 16:52 ` [PATCH v2 4/4] ACPI: bios-tables-test.c step 5 (updated expected table binaries) Eric DeVolder
3 siblings, 2 replies; 13+ messages in thread
From: Eric DeVolder @ 2023-04-18 16:52 UTC (permalink / raw)
To: shannon.zhaosl, mst, imammedo, ani, peter.maydell, qemu-arm,
qemu-devel, marcel.apfelbaum, pbonzini, richard.henderson,
eduardo
Cc: boris.ostrovsky, eric.devolder
Currently i386 QEMU generates MADT revision 3, and reports
MADT revision 1. ACPI 6.3 introduces MADT revision 5.
For MADT revision 4, that introduces ARM GIC structures, which do
not apply to i386.
For MADT revision 5, the Local APIC flags introduces the Online
Capable bitfield.
Making MADT generate and report revision 5 will solve problems with
CPU hotplug (the Online Capable flag indicates hotpluggable CPUs).
Link: https://lore.kernel.org/linux-acpi/20230327191026.3454-1-eric.devolder@oracle.com/T/#t
Signed-off-by: Eric DeVolder <eric.devolder@oracle.com>
---
hw/i386/acpi-common.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/hw/i386/acpi-common.c b/hw/i386/acpi-common.c
index 52e5c1439a..286c1c5c32 100644
--- a/hw/i386/acpi-common.c
+++ b/hw/i386/acpi-common.c
@@ -38,8 +38,15 @@ void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids,
{
uint32_t apic_id = apic_ids->cpus[uid].arch_id;
/* Flags – Local APIC Flags */
- uint32_t flags = apic_ids->cpus[uid].cpu != NULL || force_enabled ?
- 1 /* Enabled */ : 0;
+ bool enabled = apic_ids->cpus[uid].cpu != NULL || force_enabled ?
+ true : false;
+ /*
+ * ACPI 6.3 5.2.12.2 Local APIC Flags: OnlineCapable must be 0
+ * if Enabled is set.
+ */
+ bool onlinecapable = enabled ? false : true;
+ uint32_t flags = onlinecapable ? 0x2 : 0x0 | /* Online Capable */
+ enabled ? 0x1 : 0x0; /* Enabled */
/* ACPI spec says that LAPIC entry for non present
* CPU may be omitted from MADT or it must be marked
@@ -102,7 +109,7 @@ void acpi_build_madt(GArray *table_data, BIOSLinker *linker,
MachineClass *mc = MACHINE_GET_CLASS(x86ms);
const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(MACHINE(x86ms));
AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(adev);
- AcpiTable table = { .sig = "APIC", .rev = 1, .oem_id = oem_id,
+ AcpiTable table = { .sig = "APIC", .rev = 5, .oem_id = oem_id,
.oem_table_id = oem_table_id };
acpi_table_begin(&table, table_data);
--
2.31.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v2 3/4] hw/acpi: i386: bump MADT to revision 5
2023-04-18 16:52 ` [PATCH v2 3/4] hw/acpi: i386: " Eric DeVolder
@ 2023-04-19 14:56 ` Michael S. Tsirkin
2023-04-19 14:59 ` Eric DeVolder
2023-04-20 8:05 ` Ani Sinha
1 sibling, 1 reply; 13+ messages in thread
From: Michael S. Tsirkin @ 2023-04-19 14:56 UTC (permalink / raw)
To: Eric DeVolder
Cc: shannon.zhaosl, imammedo, ani, peter.maydell, qemu-arm,
qemu-devel, marcel.apfelbaum, pbonzini, richard.henderson,
eduardo, boris.ostrovsky
On Tue, Apr 18, 2023 at 12:52:18PM -0400, Eric DeVolder wrote:
> Currently i386 QEMU generates MADT revision 3, and reports
> MADT revision 1. ACPI 6.3 introduces MADT revision 5.
>
> For MADT revision 4, that introduces ARM GIC structures, which do
> not apply to i386.
>
> For MADT revision 5, the Local APIC flags introduces the Online
> Capable bitfield.
>
> Making MADT generate and report revision 5 will solve problems with
> CPU hotplug (the Online Capable flag indicates hotpluggable CPUs).
>
> Link: https://lore.kernel.org/linux-acpi/20230327191026.3454-1-eric.devolder@oracle.com/T/#t
> Signed-off-by: Eric DeVolder <eric.devolder@oracle.com>
> ---
> hw/i386/acpi-common.c | 13 ++++++++++---
> 1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/hw/i386/acpi-common.c b/hw/i386/acpi-common.c
> index 52e5c1439a..286c1c5c32 100644
> --- a/hw/i386/acpi-common.c
> +++ b/hw/i386/acpi-common.c
> @@ -38,8 +38,15 @@ void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids,
> {
> uint32_t apic_id = apic_ids->cpus[uid].arch_id;
> /* Flags – Local APIC Flags */
> - uint32_t flags = apic_ids->cpus[uid].cpu != NULL || force_enabled ?
> - 1 /* Enabled */ : 0;
> + bool enabled = apic_ids->cpus[uid].cpu != NULL || force_enabled ?
> + true : false;
> + /*
> + * ACPI 6.3 5.2.12.2 Local APIC Flags: OnlineCapable must be 0
> + * if Enabled is set.
> + */
> + bool onlinecapable = enabled ? false : true;
Pls write this as onlinecapable = !enabled or just open-code on the next
line - does not look like this variable adds a lot of value.
> + uint32_t flags = onlinecapable ? 0x2 : 0x0 | /* Online Capable */
> + enabled ? 0x1 : 0x0; /* Enabled */
>
> /* ACPI spec says that LAPIC entry for non present
> * CPU may be omitted from MADT or it must be marked
> @@ -102,7 +109,7 @@ void acpi_build_madt(GArray *table_data, BIOSLinker *linker,
> MachineClass *mc = MACHINE_GET_CLASS(x86ms);
> const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(MACHINE(x86ms));
> AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(adev);
> - AcpiTable table = { .sig = "APIC", .rev = 1, .oem_id = oem_id,
> + AcpiTable table = { .sig = "APIC", .rev = 5, .oem_id = oem_id,
> .oem_table_id = oem_table_id };
>
> acpi_table_begin(&table, table_data);
> --
> 2.31.1
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v2 3/4] hw/acpi: i386: bump MADT to revision 5
2023-04-19 14:56 ` Michael S. Tsirkin
@ 2023-04-19 14:59 ` Eric DeVolder
0 siblings, 0 replies; 13+ messages in thread
From: Eric DeVolder @ 2023-04-19 14:59 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: shannon.zhaosl, imammedo, ani, peter.maydell, qemu-arm,
qemu-devel, marcel.apfelbaum, pbonzini, richard.henderson,
eduardo, boris.ostrovsky
On 4/19/23 09:56, Michael S. Tsirkin wrote:
> On Tue, Apr 18, 2023 at 12:52:18PM -0400, Eric DeVolder wrote:
>> Currently i386 QEMU generates MADT revision 3, and reports
>> MADT revision 1. ACPI 6.3 introduces MADT revision 5.
>>
>> For MADT revision 4, that introduces ARM GIC structures, which do
>> not apply to i386.
>>
>> For MADT revision 5, the Local APIC flags introduces the Online
>> Capable bitfield.
>>
>> Making MADT generate and report revision 5 will solve problems with
>> CPU hotplug (the Online Capable flag indicates hotpluggable CPUs).
>>
>> Link: https://lore.kernel.org/linux-acpi/20230327191026.3454-1-eric.devolder@oracle.com/T/#t
>> Signed-off-by: Eric DeVolder <eric.devolder@oracle.com>
>> ---
>> hw/i386/acpi-common.c | 13 ++++++++++---
>> 1 file changed, 10 insertions(+), 3 deletions(-)
>>
>> diff --git a/hw/i386/acpi-common.c b/hw/i386/acpi-common.c
>> index 52e5c1439a..286c1c5c32 100644
>> --- a/hw/i386/acpi-common.c
>> +++ b/hw/i386/acpi-common.c
>> @@ -38,8 +38,15 @@ void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids,
>> {
>> uint32_t apic_id = apic_ids->cpus[uid].arch_id;
>> /* Flags – Local APIC Flags */
>> - uint32_t flags = apic_ids->cpus[uid].cpu != NULL || force_enabled ?
>> - 1 /* Enabled */ : 0;
>> + bool enabled = apic_ids->cpus[uid].cpu != NULL || force_enabled ?
>> + true : false;
>> + /*
>> + * ACPI 6.3 5.2.12.2 Local APIC Flags: OnlineCapable must be 0
>> + * if Enabled is set.
>> + */
>> + bool onlinecapable = enabled ? false : true;
>
> Pls write this as onlinecapable = !enabled or just open-code on the next
> line - does not look like this variable adds a lot of value.
>
Will do!
>> + uint32_t flags = onlinecapable ? 0x2 : 0x0 | /* Online Capable */
>> + enabled ? 0x1 : 0x0; /* Enabled */
>>
>> /* ACPI spec says that LAPIC entry for non present
>> * CPU may be omitted from MADT or it must be marked
>> @@ -102,7 +109,7 @@ void acpi_build_madt(GArray *table_data, BIOSLinker *linker,
>> MachineClass *mc = MACHINE_GET_CLASS(x86ms);
>> const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(MACHINE(x86ms));
>> AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(adev);
>> - AcpiTable table = { .sig = "APIC", .rev = 1, .oem_id = oem_id,
>> + AcpiTable table = { .sig = "APIC", .rev = 5, .oem_id = oem_id,
>> .oem_table_id = oem_table_id };
>>
>> acpi_table_begin(&table, table_data);
>> --
>> 2.31.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 3/4] hw/acpi: i386: bump MADT to revision 5
2023-04-18 16:52 ` [PATCH v2 3/4] hw/acpi: i386: " Eric DeVolder
2023-04-19 14:56 ` Michael S. Tsirkin
@ 2023-04-20 8:05 ` Ani Sinha
2023-04-20 14:10 ` Igor Mammedov
2023-04-20 14:22 ` Eric DeVolder
1 sibling, 2 replies; 13+ messages in thread
From: Ani Sinha @ 2023-04-20 8:05 UTC (permalink / raw)
To: Eric DeVolder
Cc: shannon.zhaosl, mst, imammedo, peter.maydell, qemu-arm,
qemu-devel, marcel.apfelbaum, pbonzini, richard.henderson,
eduardo, boris.ostrovsky
On Tue, Apr 18, 2023 at 10:22 PM Eric DeVolder <eric.devolder@oracle.com> wrote:
>
> Currently i386 QEMU generates MADT revision 3, and reports
> MADT revision 1. ACPI 6.3 introduces MADT revision 5.
>
> For MADT revision 4, that introduces ARM GIC structures, which do
> not apply to i386.
>
> For MADT revision 5, the Local APIC flags introduces the Online
> Capable bitfield.
>
> Making MADT generate and report revision 5 will solve problems with
> CPU hotplug (the Online Capable flag indicates hotpluggable CPUs).
>
> Link: https://lore.kernel.org/linux-acpi/20230327191026.3454-1-eric.devolder@oracle.com/T/#t
> Signed-off-by: Eric DeVolder <eric.devolder@oracle.com>
> ---
> hw/i386/acpi-common.c | 13 ++++++++++---
> 1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/hw/i386/acpi-common.c b/hw/i386/acpi-common.c
> index 52e5c1439a..286c1c5c32 100644
> --- a/hw/i386/acpi-common.c
> +++ b/hw/i386/acpi-common.c
> @@ -38,8 +38,15 @@ void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids,
> {
> uint32_t apic_id = apic_ids->cpus[uid].arch_id;
> /* Flags – Local APIC Flags */
> - uint32_t flags = apic_ids->cpus[uid].cpu != NULL || force_enabled ?
> - 1 /* Enabled */ : 0;
> + bool enabled = apic_ids->cpus[uid].cpu != NULL || force_enabled ?
> + true : false;
how about "processor_enabled" instead of just "enabled" as the variable name.
> + /*
> + * ACPI 6.3 5.2.12.2 Local APIC Flags: OnlineCapable must be 0
> + * if Enabled is set.
> + */
> + bool onlinecapable = enabled ? false : true;
ugh, how about uint32 onlinecapable = enabled? 0x0 : 0x2 ?
> + uint32_t flags = onlinecapable ? 0x2 : 0x0 | /* Online Capable */
> + enabled ? 0x1 : 0x0; /* Enabled */
then here, flags = onlinecapable | processor_enabled? 0x1 : 0x0;
>
> /* ACPI spec says that LAPIC entry for non present
> * CPU may be omitted from MADT or it must be marked
> @@ -102,7 +109,7 @@ void acpi_build_madt(GArray *table_data, BIOSLinker *linker,
> MachineClass *mc = MACHINE_GET_CLASS(x86ms);
> const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(MACHINE(x86ms));
> AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(adev);
> - AcpiTable table = { .sig = "APIC", .rev = 1, .oem_id = oem_id,
> + AcpiTable table = { .sig = "APIC", .rev = 5, .oem_id = oem_id,
> .oem_table_id = oem_table_id };
>
> acpi_table_begin(&table, table_data);
> --
> 2.31.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v2 3/4] hw/acpi: i386: bump MADT to revision 5
2023-04-20 8:05 ` Ani Sinha
@ 2023-04-20 14:10 ` Igor Mammedov
2023-04-20 14:22 ` Eric DeVolder
1 sibling, 0 replies; 13+ messages in thread
From: Igor Mammedov @ 2023-04-20 14:10 UTC (permalink / raw)
To: Ani Sinha
Cc: Eric DeVolder, shannon.zhaosl, mst, peter.maydell, qemu-arm,
qemu-devel, marcel.apfelbaum, pbonzini, richard.henderson,
eduardo, boris.ostrovsky
On Thu, 20 Apr 2023 13:35:58 +0530
Ani Sinha <ani@anisinha.ca> wrote:
> On Tue, Apr 18, 2023 at 10:22 PM Eric DeVolder <eric.devolder@oracle.com> wrote:
> >
> > Currently i386 QEMU generates MADT revision 3, and reports
> > MADT revision 1. ACPI 6.3 introduces MADT revision 5.
> >
> > For MADT revision 4, that introduces ARM GIC structures, which do
> > not apply to i386.
> >
> > For MADT revision 5, the Local APIC flags introduces the Online
> > Capable bitfield.
> >
> > Making MADT generate and report revision 5 will solve problems with
> > CPU hotplug (the Online Capable flag indicates hotpluggable CPUs).
> >
> > Link: https://lore.kernel.org/linux-acpi/20230327191026.3454-1-eric.devolder@oracle.com/T/#t
> > Signed-off-by: Eric DeVolder <eric.devolder@oracle.com>
> > ---
> > hw/i386/acpi-common.c | 13 ++++++++++---
> > 1 file changed, 10 insertions(+), 3 deletions(-)
> >
> > diff --git a/hw/i386/acpi-common.c b/hw/i386/acpi-common.c
> > index 52e5c1439a..286c1c5c32 100644
> > --- a/hw/i386/acpi-common.c
> > +++ b/hw/i386/acpi-common.c
> > @@ -38,8 +38,15 @@ void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids,
> > {
> > uint32_t apic_id = apic_ids->cpus[uid].arch_id;
> > /* Flags – Local APIC Flags */
> > - uint32_t flags = apic_ids->cpus[uid].cpu != NULL || force_enabled ?
> > - 1 /* Enabled */ : 0;
> > + bool enabled = apic_ids->cpus[uid].cpu != NULL || force_enabled ?
> > + true : false;
>
> how about "processor_enabled" instead of just "enabled" as the variable name.
>
> > + /*
> > + * ACPI 6.3 5.2.12.2 Local APIC Flags: OnlineCapable must be 0
> > + * if Enabled is set.
> > + */
> > + bool onlinecapable = enabled ? false : true;
>
> ugh, how about uint32 onlinecapable = enabled? 0x0 : 0x2 ?
>
> > + uint32_t flags = onlinecapable ? 0x2 : 0x0 | /* Online Capable */
> > + enabled ? 0x1 : 0x0; /* Enabled */
>
> then here, flags = onlinecapable | processor_enabled? 0x1 : 0x0;
onlinecapable is unnecessary complication.
See my reply on v1, we don't really have a reason to bump MADT revision to 5,
It brings no value whatsoever. (and kernel fix went another route instead of
dealing with messed up MADT revision numbering in spec)
All we need is to just bump revision to 3 or 4 to match actually
used features.
>
> >
> > /* ACPI spec says that LAPIC entry for non present
> > * CPU may be omitted from MADT or it must be marked
> > @@ -102,7 +109,7 @@ void acpi_build_madt(GArray *table_data, BIOSLinker *linker,
> > MachineClass *mc = MACHINE_GET_CLASS(x86ms);
> > const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(MACHINE(x86ms));
> > AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(adev);
> > - AcpiTable table = { .sig = "APIC", .rev = 1, .oem_id = oem_id,
> > + AcpiTable table = { .sig = "APIC", .rev = 5, .oem_id = oem_id,
> > .oem_table_id = oem_table_id };
> >
> > acpi_table_begin(&table, table_data);
> > --
> > 2.31.1
> >
>
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v2 3/4] hw/acpi: i386: bump MADT to revision 5
2023-04-20 8:05 ` Ani Sinha
2023-04-20 14:10 ` Igor Mammedov
@ 2023-04-20 14:22 ` Eric DeVolder
2023-04-21 8:15 ` Michael S. Tsirkin
1 sibling, 1 reply; 13+ messages in thread
From: Eric DeVolder @ 2023-04-20 14:22 UTC (permalink / raw)
To: Ani Sinha
Cc: shannon.zhaosl, mst, imammedo, peter.maydell, qemu-arm,
qemu-devel, marcel.apfelbaum, pbonzini, richard.henderson,
eduardo, boris.ostrovsky, MIGUEL_LUIS
On 4/20/23 03:05, Ani Sinha wrote:
> On Tue, Apr 18, 2023 at 10:22 PM Eric DeVolder <eric.devolder@oracle.com> wrote:
>>
>> Currently i386 QEMU generates MADT revision 3, and reports
>> MADT revision 1. ACPI 6.3 introduces MADT revision 5.
>>
>> For MADT revision 4, that introduces ARM GIC structures, which do
>> not apply to i386.
>>
>> For MADT revision 5, the Local APIC flags introduces the Online
>> Capable bitfield.
>>
>> Making MADT generate and report revision 5 will solve problems with
>> CPU hotplug (the Online Capable flag indicates hotpluggable CPUs).
>>
>> Link: https://lore.kernel.org/linux-acpi/20230327191026.3454-1-eric.devolder@oracle.com/T/#t
>> Signed-off-by: Eric DeVolder <eric.devolder@oracle.com>
>> ---
>> hw/i386/acpi-common.c | 13 ++++++++++---
>> 1 file changed, 10 insertions(+), 3 deletions(-)
>>
>> diff --git a/hw/i386/acpi-common.c b/hw/i386/acpi-common.c
>> index 52e5c1439a..286c1c5c32 100644
>> --- a/hw/i386/acpi-common.c
>> +++ b/hw/i386/acpi-common.c
>> @@ -38,8 +38,15 @@ void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids,
>> {
>> uint32_t apic_id = apic_ids->cpus[uid].arch_id;
>> /* Flags – Local APIC Flags */
>> - uint32_t flags = apic_ids->cpus[uid].cpu != NULL || force_enabled ?
>> - 1 /* Enabled */ : 0;
>> + bool enabled = apic_ids->cpus[uid].cpu != NULL || force_enabled ?
>> + true : false;
>
> how about "processor_enabled" instead of just "enabled" as the variable name.
>
>> + /*
>> + * ACPI 6.3 5.2.12.2 Local APIC Flags: OnlineCapable must be 0
>> + * if Enabled is set.
>> + */
>> + bool onlinecapable = enabled ? false : true;
>
> ugh, how about uint32 onlinecapable = enabled? 0x0 : 0x2 ?
>
>> + uint32_t flags = onlinecapable ? 0x2 : 0x0 | /* Online Capable */
>> + enabled ? 0x1 : 0x0; /* Enabled */
>
> then here, flags = onlinecapable | processor_enabled? 0x1 : 0x0;
>
Colleague Miguel Luis pointed out that this is simpler and equivalent:
uint32_t flags = apic_ids->cpus[uid].cpu != NULL || force_enabled ? 1 /* Enabled */ : 2 /* Online
Capable */;
Is that acceptable?
eric
>>
>> /* ACPI spec says that LAPIC entry for non present
>> * CPU may be omitted from MADT or it must be marked
>> @@ -102,7 +109,7 @@ void acpi_build_madt(GArray *table_data, BIOSLinker *linker,
>> MachineClass *mc = MACHINE_GET_CLASS(x86ms);
>> const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(MACHINE(x86ms));
>> AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(adev);
>> - AcpiTable table = { .sig = "APIC", .rev = 1, .oem_id = oem_id,
>> + AcpiTable table = { .sig = "APIC", .rev = 5, .oem_id = oem_id,
>> .oem_table_id = oem_table_id };
>>
>> acpi_table_begin(&table, table_data);
>> --
>> 2.31.1
>>
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v2 3/4] hw/acpi: i386: bump MADT to revision 5
2023-04-20 14:22 ` Eric DeVolder
@ 2023-04-21 8:15 ` Michael S. Tsirkin
0 siblings, 0 replies; 13+ messages in thread
From: Michael S. Tsirkin @ 2023-04-21 8:15 UTC (permalink / raw)
To: Eric DeVolder
Cc: Ani Sinha, shannon.zhaosl, imammedo, peter.maydell, qemu-arm,
qemu-devel, marcel.apfelbaum, pbonzini, richard.henderson,
eduardo, boris.ostrovsky, MIGUEL_LUIS
On Thu, Apr 20, 2023 at 09:22:57AM -0500, Eric DeVolder wrote:
>
>
> On 4/20/23 03:05, Ani Sinha wrote:
> > On Tue, Apr 18, 2023 at 10:22 PM Eric DeVolder <eric.devolder@oracle.com> wrote:
> > >
> > > Currently i386 QEMU generates MADT revision 3, and reports
> > > MADT revision 1. ACPI 6.3 introduces MADT revision 5.
> > >
> > > For MADT revision 4, that introduces ARM GIC structures, which do
> > > not apply to i386.
> > >
> > > For MADT revision 5, the Local APIC flags introduces the Online
> > > Capable bitfield.
> > >
> > > Making MADT generate and report revision 5 will solve problems with
> > > CPU hotplug (the Online Capable flag indicates hotpluggable CPUs).
> > >
> > > Link: https://lore.kernel.org/linux-acpi/20230327191026.3454-1-eric.devolder@oracle.com/T/#t
> > > Signed-off-by: Eric DeVolder <eric.devolder@oracle.com>
> > > ---
> > > hw/i386/acpi-common.c | 13 ++++++++++---
> > > 1 file changed, 10 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/hw/i386/acpi-common.c b/hw/i386/acpi-common.c
> > > index 52e5c1439a..286c1c5c32 100644
> > > --- a/hw/i386/acpi-common.c
> > > +++ b/hw/i386/acpi-common.c
> > > @@ -38,8 +38,15 @@ void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids,
> > > {
> > > uint32_t apic_id = apic_ids->cpus[uid].arch_id;
> > > /* Flags – Local APIC Flags */
> > > - uint32_t flags = apic_ids->cpus[uid].cpu != NULL || force_enabled ?
> > > - 1 /* Enabled */ : 0;
> > > + bool enabled = apic_ids->cpus[uid].cpu != NULL || force_enabled ?
> > > + true : false;
> >
> > how about "processor_enabled" instead of just "enabled" as the variable name.
> >
> > > + /*
> > > + * ACPI 6.3 5.2.12.2 Local APIC Flags: OnlineCapable must be 0
> > > + * if Enabled is set.
> > > + */
> > > + bool onlinecapable = enabled ? false : true;
> >
> > ugh, how about uint32 onlinecapable = enabled? 0x0 : 0x2 ?
> >
> > > + uint32_t flags = onlinecapable ? 0x2 : 0x0 | /* Online Capable */
> > > + enabled ? 0x1 : 0x0; /* Enabled */
> >
> > then here, flags = onlinecapable | processor_enabled? 0x1 : 0x0;
> >
>
> Colleague Miguel Luis pointed out that this is simpler and equivalent:
>
> uint32_t flags = apic_ids->cpus[uid].cpu != NULL || force_enabled ? 1 /*
> Enabled */ : 2 /* Online Capable */;
>
> Is that acceptable?
> eric
Looks ok to me.
> > >
> > > /* ACPI spec says that LAPIC entry for non present
> > > * CPU may be omitted from MADT or it must be marked
> > > @@ -102,7 +109,7 @@ void acpi_build_madt(GArray *table_data, BIOSLinker *linker,
> > > MachineClass *mc = MACHINE_GET_CLASS(x86ms);
> > > const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(MACHINE(x86ms));
> > > AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(adev);
> > > - AcpiTable table = { .sig = "APIC", .rev = 1, .oem_id = oem_id,
> > > + AcpiTable table = { .sig = "APIC", .rev = 5, .oem_id = oem_id,
> > > .oem_table_id = oem_table_id };
> > >
> > > acpi_table_begin(&table, table_data);
> > > --
> > > 2.31.1
> > >
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v2 4/4] ACPI: bios-tables-test.c step 5 (updated expected table binaries)
2023-04-18 16:52 [PATCH v2 0/4] hw/acpi: bump MADT to revision 5 Eric DeVolder
` (2 preceding siblings ...)
2023-04-18 16:52 ` [PATCH v2 3/4] hw/acpi: i386: " Eric DeVolder
@ 2023-04-18 16:52 ` Eric DeVolder
3 siblings, 0 replies; 13+ messages in thread
From: Eric DeVolder @ 2023-04-18 16:52 UTC (permalink / raw)
To: shannon.zhaosl, mst, imammedo, ani, peter.maydell, qemu-arm,
qemu-devel, marcel.apfelbaum, pbonzini, richard.henderson,
eduardo
Cc: boris.ostrovsky, eric.devolder
Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 6.
For the cpuhp test case, it is started with:
-smp 2,cores=3,sockets=2,maxcpus=6
So two of six CPUs are present, leaving 4 hot-pluggable CPUs. This
is what the disassembly diff below shows (two entries with Enabled=1
and the new Online Capable bit 0, and four entries with Enabled=0 and
Online Capable bit 1).
--- /tmp/asl-NP2E31.dsl 2023-04-18 10:46:26.483612104 -0400
+++ /tmp/asl-C03E31.dsl 2023-04-18 10:46:26.481612093 -0400
@@ -1,89 +1,89 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20230331 (64-bit version)
* Copyright (c) 2000 - 2023 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC.cphp, Tue Apr 18 10:46:26 2023
+ * Disassembly of /tmp/aml-6A5E31, Tue Apr 18 10:46:26 2023
*
* ACPI Data Table [APIC]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue (in hex)
*/
[000h 0000 004h] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 004h] Table Length : 000000A0
-[008h 0008 001h] Revision : 01
-[009h 0009 001h] Checksum : 18
+[008h 0008 001h] Revision : 05
+[009h 0009 001h] Checksum : 0C
[00Ah 0010 006h] Oem ID : "BOCHS "
[010h 0016 008h] Oem Table ID : "BXPC "
[018h 0024 004h] Oem Revision : 00000001
[01Ch 0028 004h] Asl Compiler ID : "BXPC"
[020h 0032 004h] Asl Compiler Revision : 00000001
[024h 0036 004h] Local Apic Address : FEE00000
[028h 0040 004h] Flags (decoded below) : 00000001
PC-AT Compatibility : 1
[02Ch 0044 001h] Subtable Type : 00 [Processor Local APIC]
[02Dh 0045 001h] Length : 08
[02Eh 0046 001h] Processor ID : 00
[02Fh 0047 001h] Local Apic ID : 00
[030h 0048 004h] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
[034h 0052 001h] Subtable Type : 00 [Processor Local APIC]
[035h 0053 001h] Length : 08
[036h 0054 001h] Processor ID : 01
[037h 0055 001h] Local Apic ID : 01
[038h 0056 004h] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
[03Ch 0060 001h] Subtable Type : 00 [Processor Local APIC]
[03Dh 0061 001h] Length : 08
[03Eh 0062 001h] Processor ID : 02
[03Fh 0063 001h] Local Apic ID : 02
-[040h 0064 004h] Flags (decoded below) : 00000000
+[040h 0064 004h] Flags (decoded below) : 00000002
Processor Enabled : 0
- Runtime Online Capable : 0
+ Runtime Online Capable : 1
[044h 0068 001h] Subtable Type : 00 [Processor Local APIC]
[045h 0069 001h] Length : 08
[046h 0070 001h] Processor ID : 03
[047h 0071 001h] Local Apic ID : 04
-[048h 0072 004h] Flags (decoded below) : 00000000
+[048h 0072 004h] Flags (decoded below) : 00000002
Processor Enabled : 0
- Runtime Online Capable : 0
+ Runtime Online Capable : 1
[04Ch 0076 001h] Subtable Type : 00 [Processor Local APIC]
[04Dh 0077 001h] Length : 08
[04Eh 0078 001h] Processor ID : 04
[04Fh 0079 001h] Local Apic ID : 05
-[050h 0080 004h] Flags (decoded below) : 00000000
+[050h 0080 004h] Flags (decoded below) : 00000002
Processor Enabled : 0
- Runtime Online Capable : 0
+ Runtime Online Capable : 1
[054h 0084 001h] Subtable Type : 00 [Processor Local APIC]
[055h 0085 001h] Length : 08
[056h 0086 001h] Processor ID : 05
[057h 0087 001h] Local Apic ID : 06
-[058h 0088 004h] Flags (decoded below) : 00000000
+[058h 0088 004h] Flags (decoded below) : 00000002
Processor Enabled : 0
- Runtime Online Capable : 0
+ Runtime Online Capable : 1
[05Ch 0092 001h] Subtable Type : 01 [I/O APIC]
[05Dh 0093 001h] Length : 0C
[05Eh 0094 001h] I/O Apic ID : 00
[05Fh 0095 001h] Reserved : 00
[060h 0096 004h] Address : FEC00000
[064h 0100 004h] Interrupt : 00000000
[068h 0104 001h] Subtable Type : 02 [Interrupt Source Override]
[069h 0105 001h] Length : 0A
[06Ah 0106 001h] Bus : 00
[06Bh 0107 001h] Source : 00
[06Ch 0108 004h] Interrupt : 00000002
[070h 0112 002h] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
@@ -121,26 +121,26 @@
[093h 0147 001h] Source : 0B
[094h 0148 004h] Interrupt : 0000000B
[098h 0152 002h] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[09Ah 0154 001h] Subtable Type : 04 [Local APIC NMI]
[09Bh 0155 001h] Length : 06
[09Ch 0156 001h] Processor ID : FF
[09Dh 0157 002h] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[09Fh 0159 001h] Interrupt Input LINT : 01
Raw Table Data: Length 160 (0xA0)
- 0000: 41 50 49 43 A0 00 00 00 01 18 42 4F 43 48 53 20 // APIC......BOCHS
+ 0000: 41 50 49 43 A0 00 00 00 05 0C 42 4F 43 48 53 20 // APIC......BOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................
0030: 01 00 00 00 00 08 01 01 01 00 00 00 00 08 02 02 // ................
- 0040: 00 00 00 00 00 08 03 04 00 00 00 00 00 08 04 05 // ................
- 0050: 00 00 00 00 00 08 05 06 00 00 00 00 01 0C 00 00 // ................
+ 0040: 02 00 00 00 00 08 03 04 02 00 00 00 00 08 04 05 // ................
+ 0050: 02 00 00 00 00 08 05 06 02 00 00 00 01 0C 00 00 // ................
0060: 00 00 C0 FE 00 00 00 00 02 0A 00 00 02 00 00 00 // ................
0070: 00 00 02 0A 00 05 05 00 00 00 0D 00 02 0A 00 09 // ................
0080: 09 00 00 00 0D 00 02 0A 00 0A 0A 00 00 00 0D 00 // ................
0090: 02 0A 00 0B 0B 00 00 00 0D 00 04 06 FF 00 00 01 // ................
**
The i386 diff below shows the change of MADT revision to 5.
--- /tmp/asl-STSA31.dsl 2023-04-18 10:44:37.544026591 -0400
+++ /tmp/asl-HEUA31.dsl 2023-04-18 10:44:37.542026578 -0400
@@ -1,32 +1,32 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20230331 (64-bit version)
* Copyright (c) 2000 - 2023 Intel Corporation
*
- * Disassembly of tests/data/acpi/pc/APIC, Tue Apr 18 10:44:37 2023
+ * Disassembly of /tmp/aml-64TA31, Tue Apr 18 10:44:37 2023
*
* ACPI Data Table [APIC]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue (in hex)
*/
[000h 0000 004h] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 004h] Table Length : 00000078
-[008h 0008 001h] Revision : 01
-[009h 0009 001h] Checksum : 8A
+[008h 0008 001h] Revision : 05
+[009h 0009 001h] Checksum : 86
[00Ah 0010 006h] Oem ID : "BOCHS "
[010h 0016 008h] Oem Table ID : "BXPC "
[018h 0024 004h] Oem Revision : 00000001
[01Ch 0028 004h] Asl Compiler ID : "BXPC"
[020h 0032 004h] Asl Compiler Revision : 00000001
[024h 0036 004h] Local Apic Address : FEE00000
[028h 0040 004h] Flags (decoded below) : 00000001
PC-AT Compatibility : 1
[02Ch 0044 001h] Subtable Type : 00 [Processor Local APIC]
[02Dh 0045 001h] Length : 08
[02Eh 0046 001h] Processor ID : 00
[02Fh 0047 001h] Local Apic ID : 00
[030h 0048 004h] Flags (decoded below) : 00000001
Processor Enabled : 1
@@ -81,24 +81,24 @@
[06Bh 0107 001h] Source : 0B
[06Ch 0108 004h] Interrupt : 0000000B
[070h 0112 002h] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[072h 0114 001h] Subtable Type : 04 [Local APIC NMI]
[073h 0115 001h] Length : 06
[074h 0116 001h] Processor ID : FF
[075h 0117 002h] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[077h 0119 001h] Interrupt Input LINT : 01
Raw Table Data: Length 120 (0x78)
- 0000: 41 50 49 43 78 00 00 00 01 8A 42 4F 43 48 53 20 // APICx.....BOCHS
+ 0000: 41 50 49 43 78 00 00 00 05 86 42 4F 43 48 53 20 // APICx.....BOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................
0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................
0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................
0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................
0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................
0070: 0D 00 04 06 FF 00 00 01 // ........
The diff below show ARM MADT revision change to 5.
--- /tmp/asl-O2P921.dsl 2023-04-18 10:41:56.560930849 -0400
+++ /tmp/asl-XJR921.dsl 2023-04-18 10:41:56.558930836 -0400
@@ -1,32 +1,32 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20230331 (64-bit version)
* Copyright (c) 2000 - 2023 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/APIC, Tue Apr 18 10:41:56 2023
+ * Disassembly of /tmp/aml-ACR921, Tue Apr 18 10:41:56 2023
*
* ACPI Data Table [APIC]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue (in hex)
*/
[000h 0000 004h] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 004h] Table Length : 000000AC
-[008h 0008 001h] Revision : 04
-[009h 0009 001h] Checksum : 47
+[008h 0008 001h] Revision : 05
+[009h 0009 001h] Checksum : 46
[00Ah 0010 006h] Oem ID : "BOCHS "
[010h 0016 008h] Oem Table ID : "BXPC "
[018h 0024 004h] Oem Revision : 00000001
[01Ch 0028 004h] Asl Compiler ID : "BXPC"
[020h 0032 004h] Asl Compiler Revision : 00000001
[024h 0036 004h] Local Apic Address : 00000000
[028h 0040 004h] Flags (decoded below) : 00000000
PC-AT Compatibility : 0
[02Ch 0044 001h] Subtable Type : 0C [Generic Interrupt Distributor]
[02Dh 0045 001h] Length : 18
[02Eh 0046 002h] Reserved : 0000
[030h 0048 004h] Local GIC Hardware ID : 00000000
[034h 0052 008h] Base Address : 0000000008000000
[03Ch 0060 004h] Interrupt Base : 00000000
@@ -55,27 +55,27 @@
[091h 0145 001h] Reserved : 00
[092h 0146 002h] SPE Overflow Interrupt : 0000
[094h 0148 002h] TRBE Interrupt : 180D
[094h 0148 001h] Subtable Type : 0D [Generic MSI Frame]
[095h 0149 001h] Length : 18
[096h 0150 002h] Reserved : 0000
[098h 0152 004h] MSI Frame ID : 00000000
[09Ch 0156 008h] Base Address : 0000000008020000
[0A4h 0164 004h] Flags (decoded below) : 00000001
Select SPI : 1
[0A8h 0168 002h] SPI Count : 0040
[0AAh 0170 002h] SPI Base : 0050
Raw Table Data: Length 172 (0xAC)
- 0000: 41 50 49 43 AC 00 00 00 04 47 42 4F 43 48 53 20 // APIC.....GBOCHS
+ 0000: 41 50 49 43 AC 00 00 00 05 46 42 4F 43 48 53 20 // APIC.....FBOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
0020: 01 00 00 00 00 00 00 00 00 00 00 00 0C 18 00 00 // ................
0030: 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 // ................
0040: 02 00 00 00 0B 50 00 00 00 00 00 00 00 00 00 00 // .....P..........
0050: 01 00 00 00 00 00 00 00 17 00 00 00 00 00 00 00 // ................
0060: 00 00 00 00 00 00 01 08 00 00 00 00 00 00 04 08 // ................
0070: 00 00 00 00 00 00 03 08 00 00 00 00 00 00 00 00 // ................
0080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
0090: 00 00 00 00 0D 18 00 00 00 00 00 00 00 00 02 08 // ................
00A0: 00 00 00 00 01 00 00 00 40 00 50 00 // ........@.P.
Signed-off-by: Eric DeVolder <eric.devolder@oracle.com>
---
tests/data/acpi/microvm/APIC | Bin 70 -> 70 bytes
tests/data/acpi/microvm/APIC.ioapic2 | Bin 82 -> 82 bytes
tests/data/acpi/microvm/APIC.pcie | Bin 110 -> 110 bytes
tests/data/acpi/pc/APIC | Bin 120 -> 120 bytes
tests/data/acpi/pc/APIC.acpihmat | Bin 128 -> 128 bytes
tests/data/acpi/pc/APIC.cphp | Bin 160 -> 160 bytes
tests/data/acpi/pc/APIC.dimmpxm | Bin 144 -> 144 bytes
tests/data/acpi/q35/APIC | Bin 120 -> 120 bytes
tests/data/acpi/q35/APIC.acpihmat | Bin 128 -> 128 bytes
tests/data/acpi/q35/APIC.acpihmat-noinitiator | Bin 144 -> 144 bytes
tests/data/acpi/q35/APIC.core-count2 | Bin 2478 -> 2478 bytes
tests/data/acpi/q35/APIC.cphp | Bin 160 -> 160 bytes
tests/data/acpi/q35/APIC.dimmpxm | Bin 144 -> 144 bytes
tests/data/acpi/q35/APIC.xapic | Bin 2686 -> 2686 bytes
tests/data/acpi/virt/APIC | Bin 172 -> 172 bytes
tests/data/acpi/virt/APIC.acpihmatvirt | Bin 412 -> 412 bytes
tests/data/acpi/virt/APIC.topology | Bin 732 -> 732 bytes
tests/qtest/bios-tables-test-allowed-diff.h | 4 ----
18 files changed, 4 deletions(-)
diff --git a/tests/data/acpi/microvm/APIC b/tests/data/acpi/microvm/APIC
index 68dbd44a7e35a356083f086df60f70e424c4249f..e1c72bd3e60e46acc2c8b3de14f5992946cd55a3 100644
GIT binary patch
delta 16
XcmZ>B<8ln}barE4U|=nn$Ylcn95w?+
delta 16
XcmZ>B<8ln}barE4U|=kn$Ylcn95Mq&
diff --git a/tests/data/acpi/microvm/APIC.ioapic2 b/tests/data/acpi/microvm/APIC.ioapic2
index 3063c52cd3e9bbed29c06031b375900f4a49b9e0..7c4f1b61d6c37f893d0d46be44a00e3f54a27a75 100644
GIT binary patch
delta 16
XcmWFv;&Ke|bPi%*U|_AE$mIb59$o{5
delta 16
XcmWFv;&Ke|bPi%*U|?*X$mIb59$Ev1
diff --git a/tests/data/acpi/microvm/APIC.pcie b/tests/data/acpi/microvm/APIC.pcie
index 4e8f6ed8d6a866429fc17aecdeafc3fb5ef65fa3..23956151765cae221853d92448a619d5576119b5 100644
GIT binary patch
delta 16
Xcmd1H<8ln}bk1X7U|_A7$dv*BBEAFe
delta 16
Xcmd1H<8ln}bk1X7U|_77$dv*BBDw?a
diff --git a/tests/data/acpi/pc/APIC b/tests/data/acpi/pc/APIC
index 208331db53b7dd5c6205cce0e95427636b86dd64..48bdab41959d7895b01491c6136d7403df284f98 100644
GIT binary patch
delta 16
Xcmb=Z;BpM`bgp1vU|?;V$dv~GB#;Co
delta 16
Xcmb=Z;BpM`bgp1vU|{T;$dv~GB#Z<k
diff --git a/tests/data/acpi/pc/APIC.acpihmat b/tests/data/acpi/pc/APIC.acpihmat
index 812c4603f2701494f6bb761570323158a20d4043..57d15150f781504090c8be19fe063836a66ccdc1 100644
GIT binary patch
delta 18
ZcmZo*Y+&Sa4DfVrU|?WiEuP3#1^_261Tz2t
delta 18
ZcmZo*Y+&Sa4DfVrU|?WiET70#1^_221Tz2t
diff --git a/tests/data/acpi/pc/APIC.cphp b/tests/data/acpi/pc/APIC.cphp
index 65cc4f4a9aa2676140a6525cdac1e838274b1e07..8451b99c3065f76214023a88ef955de0efc75c60 100644
GIT binary patch
delta 47
scmZ3$xPXz%F~HM#0RsaAE6+qOGf5^Oi-Cig1wym1LTFYtriqd60Hq=YaR2}S
delta 47
scmZ3$xPXz%F~HM#0RsaAqr^lmGf5zWfq{dW1wym1LTFYthKZ5x0Hvk{aR2}S
diff --git a/tests/data/acpi/pc/APIC.dimmpxm b/tests/data/acpi/pc/APIC.dimmpxm
index d904d4a70ddecbb79a83a267af8e26f925e9f4c6..824a279eb7d4134554cb447808bab5a174657272 100644
GIT binary patch
delta 18
ZcmbQhIDwJNF~HM#0s{jBtNTQ*HUKF;1V;b>
delta 18
ZcmbQhIDwJNF~HM#0s{jBqxVFvHUKF)1V;b>
diff --git a/tests/data/acpi/q35/APIC b/tests/data/acpi/q35/APIC
index 208331db53b7dd5c6205cce0e95427636b86dd64..48bdab41959d7895b01491c6136d7403df284f98 100644
GIT binary patch
delta 16
Xcmb=Z;BpM`bgp1vU|?;V$dv~GB#;Co
delta 16
Xcmb=Z;BpM`bgp1vU|{T;$dv~GB#Z<k
diff --git a/tests/data/acpi/q35/APIC.acpihmat b/tests/data/acpi/q35/APIC.acpihmat
index 812c4603f2701494f6bb761570323158a20d4043..57d15150f781504090c8be19fe063836a66ccdc1 100644
GIT binary patch
delta 18
ZcmZo*Y+&Sa4DfVrU|?WiEuP3#1^_261Tz2t
delta 18
ZcmZo*Y+&Sa4DfVrU|?WiET70#1^_221Tz2t
diff --git a/tests/data/acpi/q35/APIC.acpihmat-noinitiator b/tests/data/acpi/q35/APIC.acpihmat-noinitiator
index d904d4a70ddecbb79a83a267af8e26f925e9f4c6..824a279eb7d4134554cb447808bab5a174657272 100644
GIT binary patch
delta 18
ZcmbQhIDwJNF~HM#0s{jBtNTQ*HUKF;1V;b>
delta 18
ZcmbQhIDwJNF~HM#0s{jBqxVFvHUKF)1V;b>
diff --git a/tests/data/acpi/q35/APIC.core-count2 b/tests/data/acpi/q35/APIC.core-count2
index a255082ef5bc39f0d92d3e372b91f09dd6d0d9a1..5b9093a60ee95608cca9560daa7fc07cf7703466 100644
GIT binary patch
delta 19
acmZ1{yiS<QF~HM#9VY_=>zR#QOE>{I`~{i-
delta 19
acmZ1{yiS<QF~HM#9VY_=<Ase}OE>{I_yw8(
diff --git a/tests/data/acpi/q35/APIC.cphp b/tests/data/acpi/q35/APIC.cphp
index 65cc4f4a9aa2676140a6525cdac1e838274b1e07..8451b99c3065f76214023a88ef955de0efc75c60 100644
GIT binary patch
delta 47
scmZ3$xPXz%F~HM#0RsaAE6+qOGf5^Oi-Cig1wym1LTFYtriqd60Hq=YaR2}S
delta 47
scmZ3$xPXz%F~HM#0RsaAqr^lmGf5zWfq{dW1wym1LTFYthKZ5x0Hvk{aR2}S
diff --git a/tests/data/acpi/q35/APIC.dimmpxm b/tests/data/acpi/q35/APIC.dimmpxm
index d904d4a70ddecbb79a83a267af8e26f925e9f4c6..824a279eb7d4134554cb447808bab5a174657272 100644
GIT binary patch
delta 18
ZcmbQhIDwJNF~HM#0s{jBtNTQ*HUKF;1V;b>
delta 18
ZcmbQhIDwJNF~HM#0s{jBqxVFvHUKF)1V;b>
diff --git a/tests/data/acpi/q35/APIC.xapic b/tests/data/acpi/q35/APIC.xapic
index c1969c35aa12b61d25e0134bbb8d2187ba42d663..9cc1db8e078fa3d23d1ab836fea70881a745bb07 100644
GIT binary patch
literal 2686
zcmXxmQ+ym<7=ZEFO*UD?c2e7RlP!`eX;Y-OZKt+v+qP2McB<62(r?~8=Q|hkf1mT4
znVXr56B!p{Pqb>9DJ3e_9vvSMl@Mo-(3e5eG?_(BOHNJGtZ8U47-idRG@^q8Iy$1s
zgicQA?2KkJS}bU_qRoabF6iotZf@xAjvgN9>4{!m=<SU@KIrR<etzihj{yM~7>GeZ
z7#xftAs8BpVPO~^ju8=<E*+*%j~Oyx#*COL6K2kgS+Zc(te7nuX3vf}a$wG!m@60N
z&W(BUVBWl#FCXU5j|B=~!Gc(*5Ed?sMT%h2qFAgL7B7w^N?^&7SgI73E{$c%VA--5
z8HrI*Xt!gza#+4RR;Yj#D`Ips#>8NyN?5rvR;hwjt75fk7#oXmaag@N)~JE;@mRAa
z)~bcIYh#@{n2>;V>telnSie3tXn+kHVxvabxG^?qf=!!Zvu4=5IksqlEn8x%R@k~V
zwrPWH+hV(R*uFh>=ztwNVy8~nxifa@f?c~}w{F<IJND>-J$quWUf8=g_UVIt`(nR-
z*uOsx7=Qx@Vqzi=8ia!f<B%aZbSMrRhQo*Bh!Hq)B#s(|qetVIF*tTCjvI&L$K!+v
zIB_CQnuL=l<CG~lbt+DqhSR6xj2Sp{CeE6LvuER+IXHJN&YOqx=i`C}xNspZT7-)i
z<B}z~bSW-dhRc`ZiWRtWC9Yb9t5@TiHMn*yu3Lxe*W-o_xN#$H+Ju`o<CZPBbt`V$
zhTFH}jvcsjC+^yXyLaQBJ-Bx-?%Rj^_v3*Bc<>+|I)q6{c=#|LIf6%z;<00R{5YOC
zfhSMmsZ)6RG@dzwXV2ofb9nwdUbui4FXE+3c=<A3xq?@(;<amd{W{*bfj4jBty_5e
zHr}~|ckkl8dwBmoK6ro+A7XMcK6-?YALElJ`1C10dxj|~`20D(c!4ip;;UEq`Zd0J
zgKyvByLb5hJ%0FrA3x%!Px$#We))o5zv8!V`29Qn_<=uv;;&!$`#1jigMa^GYN}}Q
z(6oQLGK<o35J<a6SK6Rjls2jsr5#j@(vGS{X_IPE+DWx2?W|gqHmeq;EviLnt7=i&
zrdpJCQ7uZlsurc)REyH?szqrJ)uObgYEjxtwJ7baT9o!tElT^U7Nz}Ei_-q8Md<+5
zqI95YQ94MqC>^X?lnzlXN{6ZzrNdN<(&4H_gNy$CwWL(J8uhbd+J7LE$)xYN%4D(p
WKUwt~*t6NvCaeDRKYi&h(*6VF!XOX;
literal 2686
zcmXZeQ+OOv7=Yo~aI?wAcAeU0vPDuQZHm;k?bNny+g57ZPHkIh=b!JKoA-S43@*-G
z{Lu+<wq%Q@nWAFiZLx`wF-ZxwNPU?!O_RN-X{l+3X8k@%vx&=QJ3C3uY;TVa4(RBJ
zPEP3TjAs1}`ZBw?phf?(w5uz+xuMmH?(XQ}fu5e|<%Qnf=;MRFzUb$N{{9#cfPsM+
z6okRS7!rb^p%@m1;o%q&fsv7zE*+*%j~Oyx#*COL6K2kgS+ZbM6lTqe*|K5w?3g15
z=FEw?a$)Y=m?sbB&5QZ+VgCGBpa2#uh=mGa;lfy?2o^1h#fo9^;#i^tmMn>-N@3~J
zSf&g{M`KJ3+H6?1ES4*W<;!D*3K$!UadB9&B37z|l`CVFDp<8D#>Znq0#>Vr)vIG-
zBG#yZHEUw6T3EX_CM98=I#{<Z)~kp0>tllk*svisYJ`m&W0NM>v?(@ghRvH}ix$|j
zCAMmXty^Q8HrTc;wrhv&+hd0g*s&va>V%y;W0x-2wJUb(hTXekj~>{wC-&-vy?bMy
zKG?S}_UniJ`{RHCn4F9Q2jZYXICwA)8G=KH;;>;jd^nC6fg?xas8Kk2G>#dAW5?pS
zaX5ZFPMClbC*q_@IC(NonSxWN;<RZveLBvVfiq{~tXVjFHqM!YbLZl`c{qPQE?9sI
z7viEtxOg!xS%OQK;<9D9d^xUIfh$+ys#UmpHLh8MYuDnsb+~>#ZrFeuH{zyExOp>f
z*@9cQ;<jzLeLL>hfjf8Nu3fl$H}2Vkd-vkLeYk%=9yovp4`NCR9y)}F595&|c=RY9
zJBG)P<B1b^@+6)*g{M#BnKO9yES@`u=g;GX3wZG&Ub=*rFXNRfc=ak?yN1`V<Bc15
z^CsT9g|~0xojZ8<F5bI`_wVC_2bh|Q4<F*ANBH<LK6!#qpW?G;`20D(c!4ip;;UEq
z`Zd0JgKyvByLb5hJ%0FrA3x%!Px$#We))o5zv8!V`29Qn_<=uv;;&!$`#1jigMa^G
zTAJwMscHX=3n<MXfYNFrFqF14@qj38uUeFLP%TP3surc4REyHiszqtDYEjxnwJ2>-
zElRtp7Ny-(i_%urqO`keQQAYbDDA0Ql=f0BN_(porF~S3(!Q!iX+PDXw7+UmIzY83
z9jIEA4pJ>j2dfsPLsW~>p{hmcFx8@TxN1>4LbYgele0}R{tY{ee%8iO>pNrYvugUz
Y81RgpG2$6JW5}~=7X9ge`jQv^2Net*5C8xG
diff --git a/tests/data/acpi/virt/APIC b/tests/data/acpi/virt/APIC
index 179d274770a23209b949c90a929525e22368568b..318cdea179b244639417efe4fe1acb2a79879e7a 100644
GIT binary patch
delta 18
ZcmZ3(xQ3C-F~HM#4FdxMtJ_4bMF1`e1hxPG
delta 18
ZcmZ3(xQ3C-F~HM#4FdxMi~B^bMF1`d1hxPG
diff --git a/tests/data/acpi/virt/APIC.acpihmatvirt b/tests/data/acpi/virt/APIC.acpihmatvirt
index 68200204c6f8f2706c9896dbbccc5ecbec130d26..a066df3651f9e832546d47b2a0bc8475f830bdc1 100644
GIT binary patch
delta 19
acmbQkJcpUfF~HM#4kH5tYu84uNsIt7;soFT
delta 19
acmbQkJcpUfF~HM#4kH5tOZP^uNsIt7;RN6S
diff --git a/tests/data/acpi/virt/APIC.topology b/tests/data/acpi/virt/APIC.topology
index 3a6ac525e7faeaec025fa6b3fc01dc67110e1296..7f10e34f6ba5af0a5c05acf0ac95f3d0b83e8339 100644
GIT binary patch
delta 19
acmcb^dWV(EF~HOL4if_d>+X$QmzV%QB?cD&
delta 19
acmcb^dWV(EF~HOL4if_d%btx~mzV%QBnB4%
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index 1e5e354ecf..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,5 +1 @@
/* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/pc/APIC",
-"tests/data/acpi/q35/APIC",
-"tests/data/acpi/microvm/APIC",
-"tests/data/acpi/virt/APIC",
--
2.31.1
^ permalink raw reply related [flat|nested] 13+ messages in thread