From: Taylor Simpson <tsimpson@quicinc.com>
To: qemu-devel@nongnu.org
Cc: tsimpson@quicinc.com, richard.henderson@linaro.org,
philmd@linaro.org, peter.maydell@linaro.org, bcain@quicinc.com,
quic_mathbern@quicinc.com, stefanha@redhat.com, ale@rev.ng,
anjo@rev.ng, quic_mliebel@quicinc.com
Subject: [PULL 11/11] Hexagon (target/hexagon) Additional instructions handled by idef-parser
Date: Wed, 19 Apr 2023 20:26:34 -0700 [thread overview]
Message-ID: <20230420032634.105311-12-tsimpson@quicinc.com> (raw)
In-Reply-To: <20230420032634.105311-1-tsimpson@quicinc.com>
Currently, idef-parser skips all floating point instructions. However,
there are some floating point instructions that can be handled.
The following instructions are now parsed
F2_sfimm_p
F2_sfimm_n
F2_dfimm_p
F2_dfimm_n
F2_dfmpyll
F2_dfmpylh
To make these instructions work, we fix some bugs in parser-helpers.c
gen_rvalue_extend
gen_cast_op
Test cases added to tests/tcg/hexagon/fpstuff.c
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Tested-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230407205246.395196-1-tsimpson@quicinc.com>
---
target/hexagon/idef-parser/parser-helpers.c | 16 +++---
tests/tcg/hexagon/fpstuff.c | 54 +++++++++++++++++++++
target/hexagon/gen_idef_parser_funcs.py | 10 +++-
3 files changed, 72 insertions(+), 8 deletions(-)
diff --git a/target/hexagon/idef-parser/parser-helpers.c b/target/hexagon/idef-parser/parser-helpers.c
index 86511efb62..fd4d196a79 100644
--- a/target/hexagon/idef-parser/parser-helpers.c
+++ b/target/hexagon/idef-parser/parser-helpers.c
@@ -386,13 +386,10 @@ HexValue gen_rvalue_extend(Context *c, YYLTYPE *locp, HexValue *rvalue)
if (rvalue->type == IMMEDIATE) {
HexValue res = gen_imm_qemu_tmp(c, locp, 64, rvalue->signedness);
- bool is_unsigned = (rvalue->signedness == UNSIGNED);
- const char *sign_suffix = is_unsigned ? "u" : "";
gen_c_int_type(c, locp, 64, rvalue->signedness);
- OUT(c, locp, " ", &res, " = ");
- OUT(c, locp, "(", sign_suffix, "int64_t) ");
- OUT(c, locp, "(", sign_suffix, "int32_t) ");
- OUT(c, locp, rvalue, ";\n");
+ OUT(c, locp, " ", &res, " = (");
+ gen_c_int_type(c, locp, 64, rvalue->signedness);
+ OUT(c, locp, ")", rvalue, ";\n");
return res;
} else {
HexValue res = gen_tmp(c, locp, 64, rvalue->signedness);
@@ -963,7 +960,12 @@ HexValue gen_cast_op(Context *c,
if (src->bit_width == target_width) {
return *src;
} else if (src->type == IMMEDIATE) {
- HexValue res = *src;
+ HexValue res;
+ if (src->bit_width < target_width) {
+ res = gen_rvalue_extend(c, locp, src);
+ } else {
+ res = *src;
+ }
res.bit_width = target_width;
res.signedness = signedness;
return res;
diff --git a/tests/tcg/hexagon/fpstuff.c b/tests/tcg/hexagon/fpstuff.c
index 90ce9a6ef3..28f9397155 100644
--- a/tests/tcg/hexagon/fpstuff.c
+++ b/tests/tcg/hexagon/fpstuff.c
@@ -20,6 +20,7 @@
*/
#include <stdio.h>
+#include <float.h>
const int FPINVF_BIT = 1; /* Invalid */
const int FPINVF = 1 << FPINVF_BIT;
@@ -706,6 +707,57 @@ static void check_float2int_convs()
check_fpstatus(usr, FPINVF);
}
+static void check_float_consts(void)
+{
+ int res32;
+ unsigned long long res64;
+
+ asm("%0 = sfmake(#%1):neg\n\t" : "=r"(res32) : "i"(0xf));
+ check32(res32, 0xbc9e0000);
+
+ asm("%0 = sfmake(#%1):pos\n\t" : "=r"(res32) : "i"(0xf));
+ check32(res32, 0x3c9e0000);
+
+ asm("%0 = dfmake(#%1):neg\n\t" : "=r"(res64) : "i"(0xf));
+ check64(res64, 0xbf93c00000000000ULL);
+
+ asm("%0 = dfmake(#%1):pos\n\t" : "=r"(res64) : "i"(0xf));
+ check64(res64, 0x3f93c00000000000ULL);
+}
+
+static inline unsigned long long dfmpyll(double x, double y)
+{
+ unsigned long long res64;
+ asm("%0 = dfmpyll(%1, %2)" : "=r"(res64) : "r"(x), "r"(y));
+ return res64;
+}
+
+static inline unsigned long long dfmpylh(double acc, double x, double y)
+{
+ unsigned long long res64 = *(unsigned long long *)&acc;
+ asm("%0 += dfmpylh(%1, %2)" : "+r"(res64) : "r"(x), "r"(y));
+ return res64;
+}
+
+static void check_dfmpyxx(void)
+{
+ unsigned long long res64;
+
+ res64 = dfmpyll(DBL_MIN, DBL_MIN);
+ check64(res64, 0ULL);
+ res64 = dfmpyll(-1.0, DBL_MIN);
+ check64(res64, 0ULL);
+ res64 = dfmpyll(DBL_MAX, DBL_MAX);
+ check64(res64, 0x1fffffffdULL);
+
+ res64 = dfmpylh(DBL_MIN, DBL_MIN, DBL_MIN);
+ check64(res64, 0x10000000000000ULL);
+ res64 = dfmpylh(-1.0, DBL_MAX, DBL_MIN);
+ check64(res64, 0xc00fffffffe00000ULL);
+ res64 = dfmpylh(DBL_MAX, 0.0, -1.0);
+ check64(res64, 0x7fefffffffffffffULL);
+}
+
int main()
{
check_compare_exception();
@@ -718,6 +770,8 @@ int main()
check_sffixupd();
check_sffms();
check_float2int_convs();
+ check_float_consts();
+ check_dfmpyxx();
puts(err ? "FAIL" : "PASS");
return err ? 1 : 0;
diff --git a/target/hexagon/gen_idef_parser_funcs.py b/target/hexagon/gen_idef_parser_funcs.py
index afe68bdb6f..b766798ad5 100644
--- a/target/hexagon/gen_idef_parser_funcs.py
+++ b/target/hexagon/gen_idef_parser_funcs.py
@@ -103,7 +103,15 @@ def main():
continue
if tag.startswith("V6_"):
continue
- if tag.startswith("F"):
+ if ( tag.startswith("F") and
+ tag not in {
+ "F2_sfimm_p",
+ "F2_sfimm_n",
+ "F2_dfimm_p",
+ "F2_dfimm_n",
+ "F2_dfmpyll",
+ "F2_dfmpylh"
+ }):
continue
if tag.endswith("_locked"):
continue
--
2.25.1
next prev parent reply other threads:[~2023-04-20 3:28 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-20 3:26 [PULL 00/11] Hexagon queue Taylor Simpson
2023-04-20 3:26 ` [PULL 01/11] Hexagon (translate.c): avoid redundant PC updates on COF Taylor Simpson
2023-04-20 3:26 ` [PULL 02/11] Use f-strings in python scripts Taylor Simpson
2023-04-20 3:26 ` [PULL 03/11] Use black code style for " Taylor Simpson
2023-04-20 3:26 ` [PULL 04/11] Hexagon (target/hexagon) Remove redundant/unused macros Taylor Simpson
2023-04-20 3:26 ` [PULL 05/11] Hexagon (target/hexagon) Merge arguments to probe_pkt_scalar_hvx_stores Taylor Simpson
2023-04-20 3:26 ` [PULL 06/11] Hexagon (target/hexagon) Add overrides for count trailing zeros/ones Taylor Simpson
2023-04-20 3:26 ` [PULL 07/11] Hexagon (target/hexagon) Updates to USR should use get_result_gpr Taylor Simpson
2023-04-20 3:26 ` [PULL 08/11] Hexagon (tests/tcg/hexagon) Move HVX test infra to header file Taylor Simpson
2023-04-20 3:26 ` [PULL 09/11] Hexagon (target/hexagon) Remove unused slot variable in helpers Taylor Simpson
2023-04-20 3:26 ` [PULL 10/11] Hexagon (target/hexagon) Add overrides for cache/sync/barrier instructions Taylor Simpson
2023-04-20 3:26 ` Taylor Simpson [this message]
2023-04-21 8:20 ` [PULL 00/11] Hexagon queue Richard Henderson
2023-04-21 15:06 ` Taylor Simpson
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