From: Bernhard Beschow <shentey@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-block@nongnu.org, "Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"BALATON Zoltan" <balaton@eik.bme.hu>,
"John Snow" <jsnow@redhat.com>,
"Huacai Chen" <chenhuacai@kernel.org>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
qemu-ppc@nongnu.org, "Bernhard Beschow" <shentey@gmail.com>
Subject: [PATCH 06/13] hw/ide: Extract bmdma_init_ops()
Date: Sat, 22 Apr 2023 17:07:21 +0200 [thread overview]
Message-ID: <20230422150728.176512-7-shentey@gmail.com> (raw)
In-Reply-To: <20230422150728.176512-1-shentey@gmail.com>
There are three private copies of bmdma_setup_bar() with small adaptions.
Consolidate them into one public implementation.
While at it rename the function to bmdma_init_ops() to reflect that the memory
regions being initialized represent BMDMA operations. The actual mapping as a
PCI BAR is still performed separately in each device.
Note that the bmdma_bar attribute will be renamed in a separate commit.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
include/hw/ide/pci.h | 1 +
hw/ide/cmd646.c | 20 +-------------------
hw/ide/pci.c | 16 ++++++++++++++++
hw/ide/piix.c | 19 +------------------
hw/ide/via.c | 19 +------------------
5 files changed, 20 insertions(+), 55 deletions(-)
diff --git a/include/hw/ide/pci.h b/include/hw/ide/pci.h
index 7bc4e53d02..597c77c7ad 100644
--- a/include/hw/ide/pci.h
+++ b/include/hw/ide/pci.h
@@ -57,6 +57,7 @@ struct PCIIDEState {
};
void bmdma_init(IDEBus *bus, BMDMAState *bm, PCIIDEState *d);
+void bmdma_init_ops(PCIIDEState *d, const MemoryRegionOps *bmdma_ops);
void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val);
extern MemoryRegionOps bmdma_addr_ioport_ops;
void pci_ide_create_devs(PCIDevice *dev);
diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c
index 9aabf80e52..6fd09fe74e 100644
--- a/hw/ide/cmd646.c
+++ b/hw/ide/cmd646.c
@@ -161,24 +161,6 @@ static const MemoryRegionOps cmd646_bmdma_ops = {
.write = bmdma_write,
};
-static void bmdma_setup_bar(PCIIDEState *d)
-{
- BMDMAState *bm;
- int i;
-
- memory_region_init(&d->bmdma_bar, OBJECT(d), "cmd646-bmdma", 16);
- for(i = 0;i < 2; i++) {
- bm = &d->bmdma[i];
- memory_region_init_io(&bm->extra_io, OBJECT(d), &cmd646_bmdma_ops, bm,
- "cmd646-bmdma-bus", 4);
- memory_region_add_subregion(&d->bmdma_bar, i * 8, &bm->extra_io);
- memory_region_init_io(&bm->addr_ioport, OBJECT(d),
- &bmdma_addr_ioport_ops, bm,
- "cmd646-bmdma-ioport", 4);
- memory_region_add_subregion(&d->bmdma_bar, i * 8 + 4, &bm->addr_ioport);
- }
-}
-
static void cmd646_update_irq(PCIDevice *pd)
{
int pci_level;
@@ -285,7 +267,7 @@ static void pci_cmd646_ide_realize(PCIDevice *dev, Error **errp)
&d->bus[1], "cmd646-cmd1", 4);
pci_register_bar(dev, 3, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd_bar[1]);
- bmdma_setup_bar(d);
+ bmdma_init_ops(d, &cmd646_bmdma_ops);
pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar);
/* TODO: RST# value should be 0 */
diff --git a/hw/ide/pci.c b/hw/ide/pci.c
index 8bea92e394..65ed6f7f72 100644
--- a/hw/ide/pci.c
+++ b/hw/ide/pci.c
@@ -523,6 +523,22 @@ void bmdma_init(IDEBus *bus, BMDMAState *bm, PCIIDEState *d)
bm->pci_dev = d;
}
+void bmdma_init_ops(PCIIDEState *d, const MemoryRegionOps *bmdma_ops)
+{
+ size_t i;
+
+ memory_region_init(&d->bmdma_bar, OBJECT(d), "bmdma-container", 16);
+ for (i = 0; i < ARRAY_SIZE(d->bmdma); i++) {
+ BMDMAState *bm = &d->bmdma[i];
+
+ memory_region_init_io(&bm->extra_io, OBJECT(d), bmdma_ops, bm, "bmdma-ops", 4);
+ memory_region_add_subregion(&d->bmdma_bar, i * 8, &bm->extra_io);
+ memory_region_init_io(&bm->addr_ioport, OBJECT(d), &bmdma_addr_ioport_ops, bm,
+ "bmdma-ioport-ops", 4);
+ memory_region_add_subregion(&d->bmdma_bar, i * 8 + 4, &bm->addr_ioport);
+ }
+}
+
static void pci_ide_init(Object *obj)
{
PCIIDEState *d = PCI_IDE(obj);
diff --git a/hw/ide/piix.c b/hw/ide/piix.c
index 4e6ca99123..5611473d37 100644
--- a/hw/ide/piix.c
+++ b/hw/ide/piix.c
@@ -86,23 +86,6 @@ static const MemoryRegionOps piix_bmdma_ops = {
.write = bmdma_write,
};
-static void bmdma_setup_bar(PCIIDEState *d)
-{
- int i;
-
- memory_region_init(&d->bmdma_bar, OBJECT(d), "piix-bmdma-container", 16);
- for(i = 0;i < 2; i++) {
- BMDMAState *bm = &d->bmdma[i];
-
- memory_region_init_io(&bm->extra_io, OBJECT(d), &piix_bmdma_ops, bm,
- "piix-bmdma", 4);
- memory_region_add_subregion(&d->bmdma_bar, i * 8, &bm->extra_io);
- memory_region_init_io(&bm->addr_ioport, OBJECT(d),
- &bmdma_addr_ioport_ops, bm, "bmdma", 4);
- memory_region_add_subregion(&d->bmdma_bar, i * 8 + 4, &bm->addr_ioport);
- }
-}
-
static void piix_ide_reset(DeviceState *dev)
{
PCIIDEState *d = PCI_IDE(dev);
@@ -156,7 +139,7 @@ static void pci_piix_ide_realize(PCIDevice *dev, Error **errp)
pci_conf[PCI_CLASS_PROG] = 0x80; // legacy ATA mode
- bmdma_setup_bar(d);
+ bmdma_init_ops(d, &piix_bmdma_ops);
pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar);
for (unsigned i = 0; i < 2; i++) {
diff --git a/hw/ide/via.c b/hw/ide/via.c
index 287143a005..40704e2857 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -86,23 +86,6 @@ static const MemoryRegionOps via_bmdma_ops = {
.write = bmdma_write,
};
-static void bmdma_setup_bar(PCIIDEState *d)
-{
- int i;
-
- memory_region_init(&d->bmdma_bar, OBJECT(d), "via-bmdma-container", 16);
- for (i = 0; i < ARRAY_SIZE(d->bmdma); i++) {
- BMDMAState *bm = &d->bmdma[i];
-
- memory_region_init_io(&bm->extra_io, OBJECT(d), &via_bmdma_ops, bm,
- "via-bmdma", 4);
- memory_region_add_subregion(&d->bmdma_bar, i * 8, &bm->extra_io);
- memory_region_init_io(&bm->addr_ioport, OBJECT(d),
- &bmdma_addr_ioport_ops, bm, "bmdma", 4);
- memory_region_add_subregion(&d->bmdma_bar, i * 8 + 4, &bm->addr_ioport);
- }
-}
-
static void via_ide_set_irq(void *opaque, int n, int level)
{
PCIIDEState *s = opaque;
@@ -187,7 +170,7 @@ static void via_ide_realize(PCIDevice *dev, Error **errp)
&d->bus[1], "via-ide1-cmd", 4);
pci_register_bar(dev, 3, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd_bar[1]);
- bmdma_setup_bar(d);
+ bmdma_init_ops(d, &via_bmdma_ops);
pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar);
qdev_init_gpio_in(ds, via_ide_set_irq, ARRAY_SIZE(d->bus));
--
2.40.0
next prev parent reply other threads:[~2023-04-22 15:09 UTC|newest]
Thread overview: 77+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-22 15:07 [PATCH 00/13] Clean up PCI IDE device models Bernhard Beschow
2023-04-22 15:07 ` [PATCH 01/13] hw/ide/pci: Expose legacy interrupts as GPIOs Bernhard Beschow
2023-04-26 10:41 ` Mark Cave-Ayland
2023-04-26 19:26 ` Bernhard Beschow
2023-04-22 15:07 ` [PATCH 02/13] hw/ide/via: Implement ISA IRQ routing Bernhard Beschow
2023-04-22 17:23 ` BALATON Zoltan
2023-04-22 18:47 ` Bernhard Beschow
2023-04-22 19:21 ` BALATON Zoltan
2023-04-24 7:50 ` Bernhard Beschow
2023-04-24 10:10 ` BALATON Zoltan
2023-04-26 10:55 ` Mark Cave-Ayland
2023-04-22 15:07 ` [PATCH 03/13] hw/isa/vt82c686: Remove via_isa_set_irq() Bernhard Beschow
2023-04-26 10:55 ` Mark Cave-Ayland
2023-04-22 15:07 ` [PATCH 04/13] hw/ide: Extract IDEBus assignment into bmdma_init() Bernhard Beschow
2023-04-22 17:31 ` BALATON Zoltan
2023-04-23 17:36 ` Philippe Mathieu-Daudé
2023-04-26 10:56 ` Mark Cave-Ayland
2023-04-22 15:07 ` [PATCH 05/13] hw/ide: Extract pci_ide_class_init() Bernhard Beschow
2023-04-22 17:34 ` BALATON Zoltan
2023-04-22 18:59 ` Bernhard Beschow
2023-04-23 17:41 ` Philippe Mathieu-Daudé
2023-04-23 22:11 ` Bernhard Beschow
2023-04-23 22:23 ` BALATON Zoltan
2023-04-26 11:04 ` Mark Cave-Ayland
2023-04-26 18:32 ` Bernhard Beschow
2023-04-22 15:07 ` Bernhard Beschow [this message]
2023-04-23 17:43 ` [PATCH 06/13] hw/ide: Extract bmdma_init_ops() Philippe Mathieu-Daudé
2023-04-23 22:06 ` Bernhard Beschow
2023-04-26 11:14 ` Mark Cave-Ayland
2023-04-22 15:07 ` [PATCH 07/13] hw/ide: Extract pci_ide_{cmd, data}_le_ops initialization into base class constructor Bernhard Beschow
2023-04-23 17:46 ` [PATCH 07/13] hw/ide: Extract pci_ide_{cmd,data}_le_ops " Philippe Mathieu-Daudé
2023-04-24 7:45 ` Bernhard Beschow
2023-04-26 11:16 ` [PATCH 07/13] hw/ide: Extract pci_ide_{cmd, data}_le_ops " Mark Cave-Ayland
2023-04-22 15:07 ` [PATCH 08/13] hw/ide: Rename PCIIDEState::*_bar attributes Bernhard Beschow
2023-04-22 17:53 ` BALATON Zoltan
2023-04-26 11:21 ` Mark Cave-Ayland
2023-04-26 18:29 ` Bernhard Beschow
2023-04-27 11:07 ` Mark Cave-Ayland
2023-04-22 15:07 ` [PATCH 09/13] hw/ide/piix: Disuse isa_get_irq() Bernhard Beschow
2023-04-26 11:33 ` Mark Cave-Ayland
2023-04-26 18:25 ` Bernhard Beschow
2023-04-27 12:31 ` Mark Cave-Ayland
2023-05-13 11:53 ` Bernhard Beschow
2023-05-14 12:43 ` Mark Cave-Ayland
2023-04-22 15:07 ` [PATCH 10/13] hw/ide/piix: Reuse PCIIDEState::{cmd,data}_ops Bernhard Beschow
2023-04-26 11:37 ` Mark Cave-Ayland
2023-04-26 18:18 ` Bernhard Beschow
2023-04-26 20:14 ` Bernhard Beschow
2023-04-27 10:52 ` Mark Cave-Ayland
2023-04-27 18:15 ` Bernhard Beschow
2023-04-28 15:58 ` Bernhard Beschow
2023-04-28 17:00 ` BALATON Zoltan
2023-05-03 19:52 ` Mark Cave-Ayland
2023-05-13 12:21 ` Bernhard Beschow
2023-05-18 14:53 ` Mark Cave-Ayland
2023-05-19 17:09 ` Bernhard Beschow
2023-04-22 15:07 ` [PATCH 11/13] hw/ide/sii3112: " Bernhard Beschow
2023-04-22 21:10 ` BALATON Zoltan
2023-04-23 22:19 ` Bernhard Beschow
2023-04-23 22:38 ` BALATON Zoltan
2023-04-26 11:41 ` Mark Cave-Ayland
2023-04-26 20:24 ` Bernhard Beschow
2023-04-26 23:24 ` BALATON Zoltan
2023-04-27 11:15 ` Mark Cave-Ayland
2023-04-27 12:55 ` BALATON Zoltan
2023-05-03 20:25 ` Mark Cave-Ayland
2023-04-22 15:07 ` [PATCH 12/13] hw/ide/sii3112: Reuse PCIIDEState::bmdma_ops Bernhard Beschow
2023-04-26 11:44 ` Mark Cave-Ayland
2023-04-26 20:26 ` Bernhard Beschow
2023-04-22 15:07 ` [PATCH 13/13] hw/ide: Extract bmdma_clear_status() Bernhard Beschow
2023-04-22 21:26 ` BALATON Zoltan
2023-04-23 7:48 ` Bernhard Beschow
2023-04-23 10:40 ` BALATON Zoltan
2023-04-23 21:53 ` Bernhard Beschow
2023-04-22 22:46 ` BALATON Zoltan
2023-04-23 7:35 ` Bernhard Beschow
2023-04-26 11:48 ` Mark Cave-Ayland
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