* Re: [PATCH] hw/nvram: Avoid unnecessary Xilinx eFuse backstore write
2023-04-26 21:16 [PATCH] hw/nvram: Avoid unnecessary Xilinx eFuse backstore write Tong Ho
@ 2023-04-27 5:14 ` Alistair Francis
2023-04-27 6:38 ` Francisco Iglesias
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Alistair Francis @ 2023-04-27 5:14 UTC (permalink / raw)
To: Tong Ho
Cc: qemu-arm, qemu-devel, alistair, edgar.iglesias, frasse.iglesias,
peter.maydell
On Thu, Apr 27, 2023 at 10:31 AM Tong Ho <tong.ho@amd.com> wrote:
>
> Add a check in the bit-set operation to write the backstore
> only if the affected bit is 0 before.
>
> With this in place, there will be no need for callers to
> do the checking in order to avoid unnecessary writes.
>
> Signed-off-by: Tong Ho <tong.ho@amd.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/nvram/xlnx-efuse.c | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/hw/nvram/xlnx-efuse.c b/hw/nvram/xlnx-efuse.c
> index fdfffaab99..655c40b8d1 100644
> --- a/hw/nvram/xlnx-efuse.c
> +++ b/hw/nvram/xlnx-efuse.c
> @@ -143,6 +143,8 @@ static bool efuse_ro_bits_find(XlnxEFuse *s, uint32_t k)
>
> bool xlnx_efuse_set_bit(XlnxEFuse *s, unsigned int bit)
> {
> + uint32_t set, *row;
> +
> if (efuse_ro_bits_find(s, bit)) {
> g_autofree char *path = object_get_canonical_path(OBJECT(s));
>
> @@ -152,8 +154,13 @@ bool xlnx_efuse_set_bit(XlnxEFuse *s, unsigned int bit)
> return false;
> }
>
> - s->fuse32[bit / 32] |= 1 << (bit % 32);
> - efuse_bdrv_sync(s, bit);
> + /* Avoid back-end write unless there is a real update */
> + row = &s->fuse32[bit / 32];
> + set = 1 << (bit % 32);
> + if (!(set & *row)) {
> + *row |= set;
> + efuse_bdrv_sync(s, bit);
> + }
> return true;
> }
>
> --
> 2.25.1
>
>
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] hw/nvram: Avoid unnecessary Xilinx eFuse backstore write
2023-04-26 21:16 [PATCH] hw/nvram: Avoid unnecessary Xilinx eFuse backstore write Tong Ho
2023-04-27 5:14 ` Alistair Francis
@ 2023-04-27 6:38 ` Francisco Iglesias
2023-04-28 23:08 ` Philippe Mathieu-Daudé
2023-07-17 10:06 ` Peter Maydell
3 siblings, 0 replies; 5+ messages in thread
From: Francisco Iglesias @ 2023-04-27 6:38 UTC (permalink / raw)
To: Tong Ho; +Cc: qemu-arm, qemu-devel, alistair, edgar.iglesias, peter.maydell
On [2023 Apr 26] Wed 14:16:07, Tong Ho wrote:
> Add a check in the bit-set operation to write the backstore
> only if the affected bit is 0 before.
>
> With this in place, there will be no need for callers to
> do the checking in order to avoid unnecessary writes.
>
> Signed-off-by: Tong Ho <tong.ho@amd.com>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
> ---
> hw/nvram/xlnx-efuse.c | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/hw/nvram/xlnx-efuse.c b/hw/nvram/xlnx-efuse.c
> index fdfffaab99..655c40b8d1 100644
> --- a/hw/nvram/xlnx-efuse.c
> +++ b/hw/nvram/xlnx-efuse.c
> @@ -143,6 +143,8 @@ static bool efuse_ro_bits_find(XlnxEFuse *s, uint32_t k)
>
> bool xlnx_efuse_set_bit(XlnxEFuse *s, unsigned int bit)
> {
> + uint32_t set, *row;
> +
> if (efuse_ro_bits_find(s, bit)) {
> g_autofree char *path = object_get_canonical_path(OBJECT(s));
>
> @@ -152,8 +154,13 @@ bool xlnx_efuse_set_bit(XlnxEFuse *s, unsigned int bit)
> return false;
> }
>
> - s->fuse32[bit / 32] |= 1 << (bit % 32);
> - efuse_bdrv_sync(s, bit);
> + /* Avoid back-end write unless there is a real update */
> + row = &s->fuse32[bit / 32];
> + set = 1 << (bit % 32);
> + if (!(set & *row)) {
> + *row |= set;
> + efuse_bdrv_sync(s, bit);
> + }
> return true;
> }
>
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] hw/nvram: Avoid unnecessary Xilinx eFuse backstore write
2023-04-26 21:16 [PATCH] hw/nvram: Avoid unnecessary Xilinx eFuse backstore write Tong Ho
2023-04-27 5:14 ` Alistair Francis
2023-04-27 6:38 ` Francisco Iglesias
@ 2023-04-28 23:08 ` Philippe Mathieu-Daudé
2023-07-17 10:06 ` Peter Maydell
3 siblings, 0 replies; 5+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-04-28 23:08 UTC (permalink / raw)
To: Tong Ho, qemu-arm
Cc: qemu-devel, alistair, edgar.iglesias, frasse.iglesias,
peter.maydell
On 26/4/23 23:16, Tong Ho wrote:
> Add a check in the bit-set operation to write the backstore
> only if the affected bit is 0 before.
>
> With this in place, there will be no need for callers to
> do the checking in order to avoid unnecessary writes.
>
> Signed-off-by: Tong Ho <tong.ho@amd.com>
> ---
> hw/nvram/xlnx-efuse.c | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] hw/nvram: Avoid unnecessary Xilinx eFuse backstore write
2023-04-26 21:16 [PATCH] hw/nvram: Avoid unnecessary Xilinx eFuse backstore write Tong Ho
` (2 preceding siblings ...)
2023-04-28 23:08 ` Philippe Mathieu-Daudé
@ 2023-07-17 10:06 ` Peter Maydell
3 siblings, 0 replies; 5+ messages in thread
From: Peter Maydell @ 2023-07-17 10:06 UTC (permalink / raw)
To: Tong Ho; +Cc: qemu-arm, qemu-devel, alistair, edgar.iglesias, frasse.iglesias
On Wed, 26 Apr 2023 at 22:16, Tong Ho <tong.ho@amd.com> wrote:
>
> Add a check in the bit-set operation to write the backstore
> only if the affected bit is 0 before.
>
> With this in place, there will be no need for callers to
> do the checking in order to avoid unnecessary writes.
>
> Signed-off-by: Tong Ho <tong.ho@amd.com>
> ---
Applied to target-arm.next, thanks.
-- PMM
^ permalink raw reply [flat|nested] 5+ messages in thread