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Sat, 29 Apr 2023 05:16:50 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ5Ik6CI4Blhg0HRMSL11zSFkUtlsyiG9w7WURkra0EKAg0oeDHcUG5O7rJr4M1sE0+TybYtrQ== X-Received: by 2002:a05:6402:2029:b0:506:a7a4:88a9 with SMTP id ay9-20020a056402202900b00506a7a488a9mr1603844edb.4.1682770609865; Sat, 29 Apr 2023 05:16:49 -0700 (PDT) Received: from [192.168.10.118] ([2001:b07:6468:f312:1c09:f536:3de6:228c]) by smtp.gmail.com with ESMTPSA id bc28-20020a056402205c00b00506c3c0d393sm10283619edb.78.2023.04.29.05.16.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 29 Apr 2023 05:16:49 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Jiaxi Chen , Tao Su , Xiaoyao Li Subject: [PULL 06/17] target/i386: Add support for AMX-FP16 in CPUID enumeration Date: Sat, 29 Apr 2023 14:16:25 +0200 Message-Id: <20230429121636.230934-7-pbonzini@redhat.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230429121636.230934-1-pbonzini@redhat.com> References: <20230429121636.230934-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -22 X-Spam_score: -2.3 X-Spam_bar: -- X-Spam_report: (-2.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.171, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Jiaxi Chen Latest Intel platform Granite Rapids has introduced a new instruction - AMX-FP16, which performs dot-products of two FP16 tiles and accumulates the results into a packed single precision tile. AMX-FP16 adds FP16 capability and allows a FP16 GPU trained model to run faster without loss of accuracy or added SW overhead. The bit definition: CPUID.(EAX=7,ECX=1):EAX[bit 21] Add CPUID definition for AMX-FP16. Signed-off-by: Jiaxi Chen Signed-off-by: Tao Su Reviewed-by: Xiaoyao Li Message-Id: <20230303065913.1246327-3-tao1.su@linux.intel.com> Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 2 +- target/i386/cpu.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 67210ffd79b9..841c407d6d76 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -879,7 +879,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { NULL, NULL, "fzrm", "fsrs", "fsrc", NULL, NULL, NULL, NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, + NULL, "amx-fp16", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, }, diff --git a/target/i386/cpu.h b/target/i386/cpu.h index d5843c15558f..7deb37eca5a8 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -915,6 +915,8 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w, #define CPUID_7_1_EAX_FSRS (1U << 11) /* Fast Short REP CMPS/SCAS */ #define CPUID_7_1_EAX_FSRC (1U << 12) +/* Support Tile Computational Operations on FP16 Numbers */ +#define CPUID_7_1_EAX_AMX_FP16 (1U << 21) /* XFD Extend Feature Disabled */ #define CPUID_D_1_EAX_XFD (1U << 4) -- 2.40.0