From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: ale@rev.ng, philmd@linaro.org, marcel.apfelbaum@gmail.com,
wangyanan55@huawei.com, anjo@rev.ng
Subject: [PULL v2 10/12] tcg/loongarch64: Conditionalize tcg_out_exts_i32_i64
Date: Wed, 3 May 2023 08:21:05 +0100 [thread overview]
Message-ID: <20230503072221.1746802-21-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230503072221.1746802-1-richard.henderson@linaro.org>
Since TCG_TYPE_I32 values are kept sign-extended in registers,
via ".w" instructions, we need not extend if the register matches.
This is already relied upon by comparisons.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/loongarch64/tcg-target.c.inc | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 21c2fc9e98..0940788c6f 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -463,7 +463,9 @@ static void tcg_out_ext32s(TCGContext *s, TCGReg ret, TCGReg arg)
static void tcg_out_exts_i32_i64(TCGContext *s, TCGReg ret, TCGReg arg)
{
- tcg_out_ext32s(s, ret, arg);
+ if (ret != arg) {
+ tcg_out_ext32s(s, ret, arg);
+ }
}
static void tcg_out_extu_i32_i64(TCGContext *s, TCGReg ret, TCGReg arg)
--
2.34.1
prev parent reply other threads:[~2023-05-03 7:38 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-03 7:20 [PATCH 00/84] tcg: Build once for system, once for user Richard Henderson
2023-05-03 7:20 ` [PULL v2 01/12] softmmu: Tidy dirtylimit_dirty_ring_full_time Richard Henderson
2023-05-03 7:20 ` [PATCH 01/84] tcg: Split out memory ops to tcg-op-ldst.c Richard Henderson
2023-05-03 7:20 ` [PULL v2 02/12] accel/tcg: Uncache the host address for instruction fetch when tlb size < 1 Richard Henderson
2023-05-03 7:20 ` [PATCH 02/84] tcg: Widen gen_insn_data to uint64_t Richard Henderson
2023-05-03 7:20 ` [PATCH 03/84] accel/tcg: Widen tcg-ldst.h addresses " Richard Henderson
2023-05-03 7:20 ` [PULL v2 03/12] qemu/bitops.h: Limit rotate amounts Richard Henderson
2023-05-03 7:20 ` [PULL v2 04/12] qemu/host-utils.h: Add clz and ctz functions for lower-bit integers Richard Henderson
2023-05-03 7:20 ` [PATCH 04/84] tcg: Widen helper_{ld,st}_i128 addresses to uint64_t Richard Henderson
2023-05-03 7:20 ` [PULL v2 05/12] tcg: Add tcg_gen_gvec_andcs Richard Henderson
2023-05-03 7:20 ` [PATCH 05/84] tcg: Widen helper_atomic_* addresses to uint64_t Richard Henderson
2023-05-03 7:20 ` [PULL v2 06/12] tcg: Add tcg_gen_gvec_rotrs Richard Henderson
2023-05-03 7:20 ` [PATCH 06/84] tcg: Widen tcg_gen_code pc_start argument to uint64_t Richard Henderson
2023-05-03 7:20 ` [PATCH 07/84] accel/tcg: Merge gen_mem_wrapped with plugin_gen_empty_mem_callback Richard Henderson
2023-05-03 7:20 ` [PULL v2 07/12] qemu/int128: Re-shuffle Int128Alias members Richard Henderson
2023-05-03 7:21 ` [PATCH 08/84] accel/tcg: Merge do_gen_mem_cb into caller Richard Henderson
2023-05-03 7:21 ` [PULL v2 08/12] migration/xbzrle: Use __attribute__((target)) for avx512 Richard Henderson
2023-05-03 7:21 ` [PULL v2 09/12] accel/tcg: Add cpu_ld*_code_mmu Richard Henderson
2023-05-03 7:21 ` [PATCH 09/84] tcg: Reduce copies for plugin_gen_mem_callbacks Richard Henderson
2023-05-03 7:21 ` [PATCH 10/84] accel/tcg: Widen plugin_gen_empty_mem_callback to i64 Richard Henderson
2023-05-03 7:21 ` Richard Henderson [this message]
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