From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: git@xen0n.name, gaosong@loongson.cn, philmd@linaro.org,
qemu-arm@nongnu.org, qemu-riscv@nongnu.org,
qemu-s390x@nongnu.org
Subject: [PATCH v5 11/30] tcg/i386: Convert tcg_out_qemu_ld_slow_path
Date: Sat, 6 May 2023 08:22:16 +0100 [thread overview]
Message-ID: <20230506072235.597467-12-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230506072235.597467-1-richard.henderson@linaro.org>
Use tcg_out_ld_helper_args and tcg_out_ld_helper_ret.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/i386/tcg-target.c.inc | 71 +++++++++++++++------------------------
1 file changed, 28 insertions(+), 43 deletions(-)
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index 8752968af2..17ad3c5963 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -1802,13 +1802,37 @@ static void * const qemu_st_helpers[(MO_SIZE | MO_BSWAP) + 1] = {
[MO_BEUQ] = helper_be_stq_mmu,
};
+/*
+ * Because i686 has no register parameters and because x86_64 has xchg
+ * to handle addr/data register overlap, we have placed all input arguments
+ * before we need might need a scratch reg.
+ *
+ * Even then, a scratch is only needed for l->raddr. Rather than expose
+ * a general-purpose scratch when we don't actually know it's available,
+ * use the ra_gen hook to load into RAX if needed.
+ */
+#if TCG_TARGET_REG_BITS == 64
+static TCGReg ldst_ra_gen(TCGContext *s, const TCGLabelQemuLdst *l, int arg)
+{
+ if (arg < 0) {
+ arg = TCG_REG_RAX;
+ }
+ tcg_out_movi(s, TCG_TYPE_PTR, arg, (uintptr_t)l->raddr);
+ return arg;
+}
+static const TCGLdstHelperParam ldst_helper_param = {
+ .ra_gen = ldst_ra_gen
+};
+#else
+static const TCGLdstHelperParam ldst_helper_param = { };
+#endif
+
/*
* Generate code for the slow path for a load at the end of block
*/
static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
{
- MemOpIdx oi = l->oi;
- MemOp opc = get_memop(oi);
+ MemOp opc = get_memop(l->oi);
tcg_insn_unit **label_ptr = &l->label_ptr[0];
/* resolve label address */
@@ -1817,49 +1841,10 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
tcg_patch32(label_ptr[1], s->code_ptr - label_ptr[1] - 4);
}
- if (TCG_TARGET_REG_BITS == 32) {
- int ofs = 0;
-
- tcg_out_st(s, TCG_TYPE_PTR, TCG_AREG0, TCG_REG_ESP, ofs);
- ofs += 4;
-
- tcg_out_st(s, TCG_TYPE_I32, l->addrlo_reg, TCG_REG_ESP, ofs);
- ofs += 4;
-
- if (TARGET_LONG_BITS == 64) {
- tcg_out_st(s, TCG_TYPE_I32, l->addrhi_reg, TCG_REG_ESP, ofs);
- ofs += 4;
- }
-
- tcg_out_sti(s, TCG_TYPE_I32, oi, TCG_REG_ESP, ofs);
- ofs += 4;
-
- tcg_out_sti(s, TCG_TYPE_PTR, (uintptr_t)l->raddr, TCG_REG_ESP, ofs);
- } else {
- tcg_out_mov(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[0], TCG_AREG0);
- tcg_out_mov(s, TCG_TYPE_TL, tcg_target_call_iarg_regs[1],
- l->addrlo_reg);
- tcg_out_movi(s, TCG_TYPE_I32, tcg_target_call_iarg_regs[2], oi);
- tcg_out_movi(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[3],
- (uintptr_t)l->raddr);
- }
-
+ tcg_out_ld_helper_args(s, l, &ldst_helper_param);
tcg_out_branch(s, 1, qemu_ld_helpers[opc & (MO_BSWAP | MO_SIZE)]);
+ tcg_out_ld_helper_ret(s, l, false, &ldst_helper_param);
- if (TCG_TARGET_REG_BITS == 32 && (opc & MO_SIZE) == MO_64) {
- TCGMovExtend ext[2] = {
- { .dst = l->datalo_reg, .dst_type = TCG_TYPE_I32,
- .src = TCG_REG_EAX, .src_type = TCG_TYPE_I32, .src_ext = MO_UL },
- { .dst = l->datahi_reg, .dst_type = TCG_TYPE_I32,
- .src = TCG_REG_EDX, .src_type = TCG_TYPE_I32, .src_ext = MO_UL },
- };
- tcg_out_movext2(s, &ext[0], &ext[1], -1);
- } else {
- tcg_out_movext(s, l->type, l->datalo_reg,
- TCG_TYPE_REG, opc & MO_SSIZE, TCG_REG_EAX);
- }
-
- /* Jump to the code corresponding to next IR of qemu_st */
tcg_out_jmp(s, l->raddr);
return true;
}
--
2.34.1
next prev parent reply other threads:[~2023-05-06 7:27 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-06 7:22 [PATCH v5 00/30] tcg: Simplify calls to load/store helpers Richard Henderson
2023-05-06 7:22 ` [PATCH v5 01/30] tcg/i386: Introduce prepare_host_addr Richard Henderson
2023-05-10 8:38 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 02/30] tcg/i386: Use indexed addressing for softmmu fast path Richard Henderson
2023-05-10 8:44 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 03/30] tcg/aarch64: Introduce prepare_host_addr Richard Henderson
2023-05-10 8:52 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 04/30] tcg/arm: " Richard Henderson
2023-05-10 8:59 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 05/30] tcg/loongarch64: " Richard Henderson
2023-05-10 9:05 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 06/30] tcg/mips: " Richard Henderson
2023-05-10 9:09 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 07/30] tcg/ppc: " Richard Henderson
2023-05-10 9:10 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 08/30] tcg/riscv: " Richard Henderson
2023-05-10 9:11 ` Alex Bennée
2023-05-10 9:26 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 09/30] tcg/s390x: " Richard Henderson
2023-05-10 9:27 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 10/30] tcg: Add routines for calling slow-path helpers Richard Henderson
2023-05-10 12:27 ` Alex Bennée
2023-05-06 7:22 ` Richard Henderson [this message]
2023-05-10 13:12 ` [PATCH v5 11/30] tcg/i386: Convert tcg_out_qemu_ld_slow_path Alex Bennée
2023-05-06 7:22 ` [PATCH v5 12/30] tcg/i386: Convert tcg_out_qemu_st_slow_path Richard Henderson
2023-05-10 13:13 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 13/30] tcg/aarch64: Convert tcg_out_qemu_{ld,st}_slow_path Richard Henderson
2023-05-10 13:14 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 14/30] tcg/arm: " Richard Henderson
2023-05-10 13:17 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 15/30] tcg/loongarch64: Convert tcg_out_qemu_{ld, st}_slow_path Richard Henderson
2023-05-10 13:17 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 16/30] tcg/mips: Convert tcg_out_qemu_{ld,st}_slow_path Richard Henderson
2023-05-10 13:39 ` [PATCH v5 16/30] tcg/mips: Convert tcg_out_qemu_{ld, st}_slow_path Alex Bennée
2023-05-06 7:22 ` [PATCH v5 17/30] tcg/ppc: Convert tcg_out_qemu_{ld,st}_slow_path Richard Henderson
2023-05-10 13:40 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 18/30] tcg/riscv: " Richard Henderson
2023-05-10 13:40 ` [PATCH v5 18/30] tcg/riscv: Convert tcg_out_qemu_{ld, st}_slow_path Alex Bennée
2023-05-06 7:22 ` [PATCH v5 19/30] tcg/s390x: Convert tcg_out_qemu_{ld,st}_slow_path Richard Henderson
2023-05-10 13:41 ` [PATCH v5 19/30] tcg/s390x: Convert tcg_out_qemu_{ld, st}_slow_path Alex Bennée
2023-05-06 7:22 ` [PATCH v5 20/30] tcg/loongarch64: Simplify constraints on qemu_ld/st Richard Henderson
2023-05-10 13:43 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 21/30] tcg/mips: Remove MO_BSWAP handling Richard Henderson
2023-05-10 13:49 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 22/30] tcg/mips: Reorg tlb load within prepare_host_addr Richard Henderson
2023-05-10 13:49 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 23/30] tcg/mips: Simplify constraints on qemu_ld/st Richard Henderson
2023-05-10 13:50 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 24/30] tcg/ppc: Reorg tcg_out_tlb_read Richard Henderson
2023-05-10 13:51 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 25/30] tcg/ppc: Adjust constraints on qemu_ld/st Richard Henderson
2023-05-10 13:51 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 26/30] tcg/ppc: Remove unused constraints A, B, C, D Richard Henderson
2023-05-10 13:52 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 27/30] tcg/ppc: Remove unused constraint J Richard Henderson
2023-05-10 13:53 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 28/30] tcg/riscv: Simplify constraints on qemu_ld/st Richard Henderson
2023-05-10 13:57 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 29/30] tcg/s390x: Use ALGFR in constructing softmmu host address Richard Henderson
2023-05-10 13:59 ` Alex Bennée
2023-05-06 7:22 ` [PATCH v5 30/30] tcg/s390x: Simplify constraints on qemu_ld/st Richard Henderson
2023-05-10 14:02 ` Alex Bennée
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