From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Alex Bennée" <alex.bennee@linaro.org>,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>
Subject: [PULL 28/53] tcg/riscv: Convert tcg_out_qemu_{ld,st}_slow_path
Date: Thu, 11 May 2023 09:04:25 +0100 [thread overview]
Message-ID: <20230511080450.860923-29-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230511080450.860923-1-richard.henderson@linaro.org>
Use tcg_out_ld_helper_args, tcg_out_ld_helper_ret,
and tcg_out_st_helper_args.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/riscv/tcg-target.c.inc | 37 ++++++++++---------------------------
1 file changed, 10 insertions(+), 27 deletions(-)
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
index 2b2d313fe2..c22d1e35ac 100644
--- a/tcg/riscv/tcg-target.c.inc
+++ b/tcg/riscv/tcg-target.c.inc
@@ -906,14 +906,14 @@ static void tcg_out_goto(TCGContext *s, const tcg_insn_unit *target)
tcg_debug_assert(ok);
}
+/* We have three temps, we might as well expose them. */
+static const TCGLdstHelperParam ldst_helper_param = {
+ .ntmp = 3, .tmp = { TCG_REG_TMP0, TCG_REG_TMP1, TCG_REG_TMP2 }
+};
+
static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
{
- MemOpIdx oi = l->oi;
- MemOp opc = get_memop(oi);
- TCGReg a0 = tcg_target_call_iarg_regs[0];
- TCGReg a1 = tcg_target_call_iarg_regs[1];
- TCGReg a2 = tcg_target_call_iarg_regs[2];
- TCGReg a3 = tcg_target_call_iarg_regs[3];
+ MemOp opc = get_memop(l->oi);
/* resolve label address */
if (!reloc_sbimm12(l->label_ptr[0], tcg_splitwx_to_rx(s->code_ptr))) {
@@ -921,13 +921,9 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
}
/* call load helper */
- tcg_out_mov(s, TCG_TYPE_PTR, a0, TCG_AREG0);
- tcg_out_mov(s, TCG_TYPE_PTR, a1, l->addrlo_reg);
- tcg_out_movi(s, TCG_TYPE_PTR, a2, oi);
- tcg_out_movi(s, TCG_TYPE_PTR, a3, (tcg_target_long)l->raddr);
-
+ tcg_out_ld_helper_args(s, l, &ldst_helper_param);
tcg_out_call_int(s, qemu_ld_helpers[opc & MO_SSIZE], false);
- tcg_out_mov(s, (opc & MO_SIZE) == MO_64, l->datalo_reg, a0);
+ tcg_out_ld_helper_ret(s, l, true, &ldst_helper_param);
tcg_out_goto(s, l->raddr);
return true;
@@ -935,14 +931,7 @@ static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
{
- MemOpIdx oi = l->oi;
- MemOp opc = get_memop(oi);
- MemOp s_bits = opc & MO_SIZE;
- TCGReg a0 = tcg_target_call_iarg_regs[0];
- TCGReg a1 = tcg_target_call_iarg_regs[1];
- TCGReg a2 = tcg_target_call_iarg_regs[2];
- TCGReg a3 = tcg_target_call_iarg_regs[3];
- TCGReg a4 = tcg_target_call_iarg_regs[4];
+ MemOp opc = get_memop(l->oi);
/* resolve label address */
if (!reloc_sbimm12(l->label_ptr[0], tcg_splitwx_to_rx(s->code_ptr))) {
@@ -950,13 +939,7 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
}
/* call store helper */
- tcg_out_mov(s, TCG_TYPE_PTR, a0, TCG_AREG0);
- tcg_out_mov(s, TCG_TYPE_PTR, a1, l->addrlo_reg);
- tcg_out_movext(s, s_bits == MO_64 ? TCG_TYPE_I64 : TCG_TYPE_I32, a2,
- l->type, s_bits, l->datalo_reg);
- tcg_out_movi(s, TCG_TYPE_PTR, a3, oi);
- tcg_out_movi(s, TCG_TYPE_PTR, a4, (tcg_target_long)l->raddr);
-
+ tcg_out_st_helper_args(s, l, &ldst_helper_param);
tcg_out_call_int(s, qemu_st_helpers[opc & MO_SIZE], false);
tcg_out_goto(s, l->raddr);
--
2.34.1
next prev parent reply other threads:[~2023-05-11 8:06 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-11 8:03 [PULL 00/53] tcg patch queue Richard Henderson
2023-05-11 8:03 ` [PULL 01/53] target/m68k: Fix gen_load_fp for OS_LONG Richard Henderson
2023-05-11 8:03 ` [PULL 02/53] accel/tcg: Fix atomic_mmu_lookup for reads Richard Henderson
2023-05-11 8:04 ` [PULL 03/53] disas: Fix tabs and braces in disas.c Richard Henderson
2023-05-11 8:04 ` [PULL 04/53] disas: Move disas.c to disas/ Richard Henderson
2023-05-11 8:04 ` [PULL 05/53] disas: Remove target_ulong from the interface Richard Henderson
2023-05-11 8:04 ` [PULL 06/53] disas: Remove target-specific headers Richard Henderson
2023-05-11 8:04 ` [PULL 07/53] disas: Move softmmu specific code to separate file Richard Henderson
2023-05-11 8:04 ` [PULL 08/53] disas: Move disas.c into the target-independent source set Richard Henderson
2023-05-11 8:04 ` [PULL 09/53] cpu: expose qemu_cpu_list_lock for lock-guard use Richard Henderson
2023-05-11 8:04 ` [PULL 10/53] accel/tcg/tcg-accel-ops-rr: ensure fairness with icount Richard Henderson
2023-05-11 8:04 ` [PULL 11/53] tcg/i386: Introduce prepare_host_addr Richard Henderson
2023-05-11 8:04 ` [PULL 12/53] tcg/i386: Use indexed addressing for softmmu fast path Richard Henderson
2023-05-11 8:04 ` [PULL 13/53] tcg/aarch64: Introduce prepare_host_addr Richard Henderson
2023-05-11 8:04 ` [PULL 14/53] tcg/arm: " Richard Henderson
2023-05-11 8:04 ` [PULL 15/53] tcg/loongarch64: " Richard Henderson
2023-05-11 8:04 ` [PULL 16/53] tcg/mips: " Richard Henderson
2023-05-11 8:04 ` [PULL 17/53] tcg/ppc: " Richard Henderson
2023-05-11 8:04 ` [PULL 18/53] tcg/riscv: " Richard Henderson
2023-05-11 8:04 ` [PULL 19/53] tcg/s390x: " Richard Henderson
2023-05-11 8:04 ` [PULL 20/53] tcg: Add routines for calling slow-path helpers Richard Henderson
2023-05-11 8:04 ` [PULL 21/53] tcg/i386: Convert tcg_out_qemu_ld_slow_path Richard Henderson
2023-05-11 8:04 ` [PULL 22/53] tcg/i386: Convert tcg_out_qemu_st_slow_path Richard Henderson
2023-05-11 8:04 ` [PULL 23/53] tcg/aarch64: Convert tcg_out_qemu_{ld,st}_slow_path Richard Henderson
2023-05-11 8:04 ` [PULL 24/53] tcg/arm: " Richard Henderson
2023-05-11 8:04 ` [PULL 25/53] tcg/loongarch64: " Richard Henderson
2023-05-11 8:04 ` [PULL 26/53] tcg/mips: " Richard Henderson
2023-05-11 8:04 ` [PULL 27/53] tcg/ppc: " Richard Henderson
2023-05-11 8:04 ` Richard Henderson [this message]
2023-05-11 8:04 ` [PULL 29/53] tcg/s390x: " Richard Henderson
2023-05-11 8:04 ` [PULL 30/53] tcg/loongarch64: Simplify constraints on qemu_ld/st Richard Henderson
2023-05-11 8:04 ` [PULL 31/53] tcg/mips: Remove MO_BSWAP handling Richard Henderson
2023-05-11 8:04 ` [PULL 32/53] tcg/mips: Reorg tlb load within prepare_host_addr Richard Henderson
2023-05-11 8:04 ` [PULL 33/53] tcg/mips: Simplify constraints on qemu_ld/st Richard Henderson
2023-05-11 8:04 ` [PULL 34/53] tcg/ppc: Reorg tcg_out_tlb_read Richard Henderson
2023-05-11 8:04 ` [PULL 35/53] tcg/ppc: Adjust constraints on qemu_ld/st Richard Henderson
2023-05-11 8:04 ` [PULL 36/53] tcg/ppc: Remove unused constraints A, B, C, D Richard Henderson
2023-05-11 8:04 ` [PULL 37/53] tcg/ppc: Remove unused constraint J Richard Henderson
2023-05-11 8:04 ` [PULL 38/53] tcg/riscv: Simplify constraints on qemu_ld/st Richard Henderson
2023-05-11 8:04 ` [PULL 39/53] tcg/s390x: Use ALGFR in constructing softmmu host address Richard Henderson
2023-05-11 8:04 ` [PULL 40/53] tcg/s390x: Simplify constraints on qemu_ld/st Richard Henderson
2023-05-11 8:04 ` [PULL 41/53] target/mips: Add MO_ALIGN to gen_llwp, gen_scwp Richard Henderson
2023-05-11 8:04 ` [PULL 42/53] target/mips: Add missing default_tcg_memop_mask Richard Henderson
2023-05-11 8:04 ` [PULL 43/53] target/mips: Use MO_ALIGN instead of 0 Richard Henderson
2023-05-11 8:04 ` [PULL 44/53] target/mips: Remove TARGET_ALIGNED_ONLY Richard Henderson
2023-05-11 8:04 ` [PULL 45/53] target/nios2: " Richard Henderson
2023-05-11 8:04 ` [PULL 46/53] target/sh4: Use MO_ALIGN where required Richard Henderson
2023-05-11 8:04 ` [PULL 47/53] target/sh4: Remove TARGET_ALIGNED_ONLY Richard Henderson
2023-05-11 8:04 ` [PULL 48/53] tcg: " Richard Henderson
2023-05-11 8:04 ` [PULL 49/53] accel/tcg: Add cpu_in_serial_context Richard Henderson
2023-05-11 8:04 ` [PULL 50/53] accel/tcg: Introduce tlb_read_idx Richard Henderson
2023-05-11 8:04 ` [PULL 51/53] accel/tcg: Reorg system mode load helpers Richard Henderson
2023-05-11 8:04 ` [PULL 52/53] accel/tcg: Reorg system mode store helpers Richard Henderson
2023-05-11 8:04 ` [PULL 53/53] target/loongarch: Do not include tcg-ldst.h Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230511080450.860923-29-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=alex.bennee@linaro.org \
--cc=dbarboza@ventanamicro.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).