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From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, Leif Lindholm <quic_llindhol@quicinc.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Subject: [PATCH] hw/arm/sbsa-ref: add GIC node into DT
Date: Mon, 15 May 2023 12:04:38 +0200	[thread overview]
Message-ID: <20230515100438.359690-1-marcin.juszkiewicz@linaro.org> (raw)

Let add GIC information into DeviceTree as part of SBSA-REF versioning.

Trusted Firmware will read it and provide to next firmware level.

Bumps platform version to 0.1 one so we can check is node is present.
---
 hw/arm/sbsa-ref.c | 38 +++++++++++++++++++++++++++++++++++++-
 1 file changed, 37 insertions(+), 1 deletion(-)

diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 06bd1c5ec4..55dde901f0 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -29,6 +29,7 @@
 #include "exec/hwaddr.h"
 #include "kvm_arm.h"
 #include "hw/arm/boot.h"
+#include "hw/arm/fdt.h"
 #include "hw/arm/smmuv3.h"
 #include "hw/block/flash.h"
 #include "hw/boards.h"
@@ -170,6 +171,39 @@ static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState *sms, int idx)
     return arm_cpu_mp_affinity(idx, clustersz);
 }
 
+static void sbsa_fdt_add_gic_node(SBSAMachineState *sms)
+{
+    char *nodename;
+    int gic_phandle;
+
+    gic_phandle = qemu_fdt_alloc_phandle(sms->fdt);
+    qemu_fdt_setprop_cell(sms->fdt, "/", "interrupt-parent", gic_phandle);
+
+    nodename = g_strdup_printf("/intc@%" PRIx64,
+                               sbsa_ref_memmap[SBSA_GIC_DIST].base);
+    qemu_fdt_add_subnode(sms->fdt, nodename);
+    qemu_fdt_setprop_cell(sms->fdt, nodename, "#interrupt-cells", 3);
+    qemu_fdt_setprop(sms->fdt, nodename, "interrupt-controller", NULL, 0);
+    qemu_fdt_setprop_cell(sms->fdt, nodename, "#address-cells", 0x2);
+    qemu_fdt_setprop_cell(sms->fdt, nodename, "#size-cells", 0x2);
+    qemu_fdt_setprop(sms->fdt, nodename, "ranges", NULL, 0);
+
+    qemu_fdt_setprop_string(sms->fdt, nodename, "compatible",
+                            "arm,gic-v3");
+
+    qemu_fdt_setprop_sized_cells(sms->fdt, nodename, "reg",
+                                 2, sbsa_ref_memmap[SBSA_GIC_DIST].base,
+                                 2, sbsa_ref_memmap[SBSA_GIC_DIST].size,
+                                 2, sbsa_ref_memmap[SBSA_GIC_REDIST].base,
+                                 2, sbsa_ref_memmap[SBSA_GIC_REDIST].size);
+
+    qemu_fdt_setprop_cells(sms->fdt, nodename, "interrupts",
+			   GIC_FDT_IRQ_TYPE_PPI, ARCH_GIC_MAINT_IRQ,
+                           GIC_FDT_IRQ_FLAGS_LEVEL_HI);
+
+    qemu_fdt_setprop_cell(sms->fdt, nodename, "phandle", gic_phandle);
+    g_free(nodename);
+}
 /*
  * Firmware on this machine only uses ACPI table to load OS, these limited
  * device tree nodes are just to let firmware know the info which varies from
@@ -206,7 +240,7 @@ static void create_fdt(SBSAMachineState *sms)
      *                        fw compatibility.
      */
     qemu_fdt_setprop_cell(fdt, "/", "machine-version-major", 0);
-    qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 0);
+    qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 1);
 
     if (ms->numa_state->have_numa_distance) {
         int size = nb_numa_nodes * nb_numa_nodes * 3 * sizeof(uint32_t);
@@ -262,6 +296,8 @@ static void create_fdt(SBSAMachineState *sms)
 
         g_free(nodename);
     }
+
+    sbsa_fdt_add_gic_node(sms);
 }
 
 #define SBSA_FLASH_SECTOR_SIZE (256 * KiB)
-- 
2.40.1



             reply	other threads:[~2023-05-15 10:05 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-15 10:04 Marcin Juszkiewicz [this message]
2023-05-15 10:15 ` [PATCH] hw/arm/sbsa-ref: add GIC node into DT Peter Maydell
2023-05-15 10:21   ` Marcin Juszkiewicz
2023-05-15 10:27   ` Leif Lindholm
2023-05-15 10:32     ` Marcin Juszkiewicz

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