From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 09E95C77B7D for ; Mon, 15 May 2023 14:49:23 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pyZIv-0001z6-P4; Mon, 15 May 2023 10:36:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pyZHc-00074p-Fd for qemu-devel@nongnu.org; Mon, 15 May 2023 10:34:47 -0400 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pyZHV-000503-6U for qemu-devel@nongnu.org; Mon, 15 May 2023 10:34:37 -0400 Received: by mail-pl1-x635.google.com with SMTP id d9443c01a7336-1aaea43def7so88183165ad.2 for ; Mon, 15 May 2023 07:33:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1684161215; x=1686753215; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=YyONh+q6+JPHpqSgz1eedz8qFY8evuyzGRq8DlknugQ=; b=O4YoGg8gOumIMlcnZX1ADy7TAwBiDuVYUnn1MrsPTWuNxoIL1rbCQN+RMBlgv57fZm kg0ALBvBxg4v6UQjbJ10IwRYzJPwQU6i40FuU+xs7sNiuvBhaNhWBUNUvNea0kM92zZt vgyrCji5j7oP/WleZFrNZNV8mWyqJ2VH3hRYWpn9qAO+abRwvPHPYqvi0kX5vSv3Fb/J LJ5MkIwVCfCSy5k2m1Hb+PVStblkBeLn5E3bPcp6NVoPH+8Pi5iCz49T2TDr4PihSBl6 pIQr07eC917PIYVraRuukBJoQHm5KibCkHBqTfK6w1nQUZepEvnZ+E+X3Uq607SeVgSz ou6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684161215; x=1686753215; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YyONh+q6+JPHpqSgz1eedz8qFY8evuyzGRq8DlknugQ=; b=kUniqKEpo3qZv6t4q5k85KrzIPMeh08sSSFBKKW/CvgfMPoM5RyKxy3iQKNwDk018/ Kfmq+D5P0sGNGh3pbcbk3HE6HhbaeGRU0fH9p5mZjHqjikTY73gjqYvyeD0bLHoUU72D kYpDQQf6xXkfhpngSxslb8KmEYp7zgO9fkjZ+zyW2nJTtNDOAk5GBxkyzhsleueYYJ0X qwljCAelOJSWblOgNgm0K5pTen/CpCVPOvg7v1QJd9mwptGEl1StJgG8D/dne5mkFTwF VU5FoyinfBweC76efIPVDe5XeMhrTQ0yGrzTs/QX9Djz5UhXhkH2d/GfZTZgnzkVVywj vCEQ== X-Gm-Message-State: AC+VfDzGEwYYuo86klnTAUtMOvCdldLERWlmGHLfXX8iKOxg0UpuzkF4 ikIf00rcVBNeU85VJ4K9ExkowhS1t8JP6ytd84o= X-Google-Smtp-Source: ACHHUZ573T51BZO6jJNEXup6K0shcbHQqWQMaK/Yl5N5XobhBZYBY6yMI9vmrdY9QVvaVPeoWIit0g== X-Received: by 2002:a17:903:552:b0:1ae:2013:4bc8 with SMTP id jo18-20020a170903055200b001ae20134bc8mr2546582plb.18.1684161215696; Mon, 15 May 2023 07:33:35 -0700 (PDT) Received: from stoup.. ([2602:ae:1598:4c01:9902:96ac:8d8c:4366]) by smtp.gmail.com with ESMTPSA id ik9-20020a170902ab0900b001ab0aec388bsm13694335plb.135.2023.05.15.07.33.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 May 2023 07:33:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org Subject: [PATCH v5 24/54] tcg/sparc64: Allocate %g2 as a third temporary Date: Mon, 15 May 2023 07:32:43 -0700 Message-Id: <20230515143313.734053-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230515143313.734053-1-richard.henderson@linaro.org> References: <20230515143313.734053-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Richard Henderson --- tcg/sparc64/tcg-target.c.inc | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc index e997db2645..64464ab363 100644 --- a/tcg/sparc64/tcg-target.c.inc +++ b/tcg/sparc64/tcg-target.c.inc @@ -83,9 +83,10 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { #define ALL_GENERAL_REGS MAKE_64BIT_MASK(0, 32) #define ALL_QLDST_REGS (ALL_GENERAL_REGS & ~SOFTMMU_RESERVE_REGS) -/* Define some temporary registers. T2 is used for constant generation. */ +/* Define some temporary registers. T3 is used for constant generation. */ #define TCG_REG_T1 TCG_REG_G1 -#define TCG_REG_T2 TCG_REG_O7 +#define TCG_REG_T2 TCG_REG_G2 +#define TCG_REG_T3 TCG_REG_O7 #ifndef CONFIG_SOFTMMU # define TCG_GUEST_BASE_REG TCG_REG_I5 @@ -110,7 +111,6 @@ static const int tcg_target_reg_alloc_order[] = { TCG_REG_I4, TCG_REG_I5, - TCG_REG_G2, TCG_REG_G3, TCG_REG_G4, TCG_REG_G5, @@ -492,8 +492,8 @@ static void tcg_out_movi_int(TCGContext *s, TCGType type, TCGReg ret, static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg ret, tcg_target_long arg) { - tcg_debug_assert(ret != TCG_REG_T2); - tcg_out_movi_int(s, type, ret, arg, false, TCG_REG_T2); + tcg_debug_assert(ret != TCG_REG_T3); + tcg_out_movi_int(s, type, ret, arg, false, TCG_REG_T3); } static void tcg_out_ext8s(TCGContext *s, TCGType type, TCGReg rd, TCGReg rs) @@ -885,10 +885,8 @@ static void tcg_out_jmpl_const(TCGContext *s, const tcg_insn_unit *dest, { uintptr_t desti = (uintptr_t)dest; - /* Be careful not to clobber %o7 for a tail call. */ tcg_out_movi_int(s, TCG_TYPE_PTR, TCG_REG_T1, - desti & ~0xfff, in_prologue, - tail_call ? TCG_REG_G2 : TCG_REG_O7); + desti & ~0xfff, in_prologue, TCG_REG_T2); tcg_out_arithi(s, tail_call ? TCG_REG_G0 : TCG_REG_O7, TCG_REG_T1, desti & 0xfff, JMPL); } @@ -1856,6 +1854,7 @@ static void tcg_target_init(TCGContext *s) tcg_regset_set_reg(s->reserved_regs, TCG_REG_O6); /* stack pointer */ tcg_regset_set_reg(s->reserved_regs, TCG_REG_T1); /* for internal use */ tcg_regset_set_reg(s->reserved_regs, TCG_REG_T2); /* for internal use */ + tcg_regset_set_reg(s->reserved_regs, TCG_REG_T3); /* for internal use */ } #define ELF_HOST_MACHINE EM_SPARCV9 -- 2.34.1