From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org,
Peter Maydell <peter.maydell@linaro.org>
Subject: [PATCH v5 06/54] tcg/tci: Use helper_{ld,st}*_mmu for user-only
Date: Mon, 15 May 2023 07:32:25 -0700 [thread overview]
Message-ID: <20230515143313.734053-7-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230515143313.734053-1-richard.henderson@linaro.org>
We can now fold these two pieces of code.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tci.c | 89 -------------------------------------------------------
1 file changed, 89 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 5bde2e1f2e..15f2f8c463 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -292,7 +292,6 @@ static uint64_t tci_qemu_ld(CPUArchState *env, target_ulong taddr,
MemOp mop = get_memop(oi);
uintptr_t ra = (uintptr_t)tb_ptr;
-#ifdef CONFIG_SOFTMMU
switch (mop & MO_SSIZE) {
case MO_UB:
return helper_ldub_mmu(env, taddr, oi, ra);
@@ -311,58 +310,6 @@ static uint64_t tci_qemu_ld(CPUArchState *env, target_ulong taddr,
default:
g_assert_not_reached();
}
-#else
- void *haddr = g2h(env_cpu(env), taddr);
- unsigned a_mask = (1u << get_alignment_bits(mop)) - 1;
- uint64_t ret;
-
- set_helper_retaddr(ra);
- if (taddr & a_mask) {
- helper_unaligned_ld(env, taddr);
- }
- switch (mop & (MO_BSWAP | MO_SSIZE)) {
- case MO_UB:
- ret = ldub_p(haddr);
- break;
- case MO_SB:
- ret = ldsb_p(haddr);
- break;
- case MO_LEUW:
- ret = lduw_le_p(haddr);
- break;
- case MO_LESW:
- ret = ldsw_le_p(haddr);
- break;
- case MO_LEUL:
- ret = (uint32_t)ldl_le_p(haddr);
- break;
- case MO_LESL:
- ret = (int32_t)ldl_le_p(haddr);
- break;
- case MO_LEUQ:
- ret = ldq_le_p(haddr);
- break;
- case MO_BEUW:
- ret = lduw_be_p(haddr);
- break;
- case MO_BESW:
- ret = ldsw_be_p(haddr);
- break;
- case MO_BEUL:
- ret = (uint32_t)ldl_be_p(haddr);
- break;
- case MO_BESL:
- ret = (int32_t)ldl_be_p(haddr);
- break;
- case MO_BEUQ:
- ret = ldq_be_p(haddr);
- break;
- default:
- g_assert_not_reached();
- }
- clear_helper_retaddr();
- return ret;
-#endif
}
static void tci_qemu_st(CPUArchState *env, target_ulong taddr, uint64_t val,
@@ -371,7 +318,6 @@ static void tci_qemu_st(CPUArchState *env, target_ulong taddr, uint64_t val,
MemOp mop = get_memop(oi);
uintptr_t ra = (uintptr_t)tb_ptr;
-#ifdef CONFIG_SOFTMMU
switch (mop & MO_SIZE) {
case MO_UB:
helper_stb_mmu(env, taddr, val, oi, ra);
@@ -388,41 +334,6 @@ static void tci_qemu_st(CPUArchState *env, target_ulong taddr, uint64_t val,
default:
g_assert_not_reached();
}
-#else
- void *haddr = g2h(env_cpu(env), taddr);
- unsigned a_mask = (1u << get_alignment_bits(mop)) - 1;
-
- set_helper_retaddr(ra);
- if (taddr & a_mask) {
- helper_unaligned_st(env, taddr);
- }
- switch (mop & (MO_BSWAP | MO_SIZE)) {
- case MO_UB:
- stb_p(haddr, val);
- break;
- case MO_LEUW:
- stw_le_p(haddr, val);
- break;
- case MO_LEUL:
- stl_le_p(haddr, val);
- break;
- case MO_LEUQ:
- stq_le_p(haddr, val);
- break;
- case MO_BEUW:
- stw_be_p(haddr, val);
- break;
- case MO_BEUL:
- stl_be_p(haddr, val);
- break;
- case MO_BEUQ:
- stq_be_p(haddr, val);
- break;
- default:
- g_assert_not_reached();
- }
- clear_helper_retaddr();
-#endif
}
#if TCG_TARGET_REG_BITS == 64
--
2.34.1
next prev parent reply other threads:[~2023-05-15 14:36 UTC|newest]
Thread overview: 86+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-15 14:32 [PATCH v5 00/54] tcg: Improve atomicity support Richard Henderson
2023-05-15 14:32 ` [PATCH v5 01/54] include/exec/memop: Add MO_ATOM_* Richard Henderson
2023-05-15 16:32 ` Peter Maydell
2023-05-15 14:32 ` [PATCH v5 02/54] accel/tcg: Honor atomicity of loads Richard Henderson
2023-05-15 16:43 ` Peter Maydell
2023-05-15 23:24 ` Richard Henderson
2023-05-16 13:13 ` Peter Maydell
2023-05-16 13:48 ` Richard Henderson
2023-05-15 14:32 ` [PATCH v5 03/54] accel/tcg: Honor atomicity of stores Richard Henderson
2023-05-15 16:48 ` Peter Maydell
2023-05-15 14:32 ` [PATCH v5 04/54] tcg: Unify helper_{be,le}_{ld,st}* Richard Henderson
2023-05-15 14:32 ` [PATCH v5 05/54] accel/tcg: Implement helper_{ld, st}*_mmu for user-only Richard Henderson
2023-05-15 14:32 ` Richard Henderson [this message]
2023-05-15 14:32 ` [PATCH v5 07/54] tcg: Add 128-bit guest memory primitives Richard Henderson
2023-05-15 16:54 ` Peter Maydell
2023-05-15 14:32 ` [PATCH v5 08/54] meson: Detect atomic128 support with optimization Richard Henderson
2023-05-15 14:32 ` [PATCH v5 09/54] tcg/i386: Add have_atomic16 Richard Henderson
2023-05-15 16:56 ` Peter Maydell
2023-05-15 14:32 ` [PATCH v5 10/54] accel/tcg: Use have_atomic16 in ldst_atomicity.c.inc Richard Henderson
2023-05-16 10:38 ` Peter Maydell
2023-05-16 13:50 ` Richard Henderson
2023-05-15 14:32 ` [PATCH v5 11/54] accel/tcg: Add aarch64 specific support in ldst_atomicity Richard Henderson
2023-05-16 13:29 ` Peter Maydell
2023-05-16 13:51 ` Richard Henderson
2023-05-16 13:56 ` Peter Maydell
2023-05-16 14:04 ` Richard Henderson
2023-05-15 14:32 ` [PATCH v5 12/54] tcg/aarch64: Detect have_lse, have_lse2 for linux Richard Henderson
2023-05-15 14:32 ` [PATCH v5 13/54] tcg/aarch64: Detect have_lse, have_lse2 for darwin Richard Henderson
2023-05-15 14:32 ` [PATCH v5 14/54] accel/tcg: Add have_lse2 support in ldst_atomicity Richard Henderson
2023-05-16 13:16 ` Peter Maydell
2023-05-15 14:32 ` [PATCH v5 15/54] tcg/i386: Use full load/store helpers in user-only mode Richard Henderson
2023-05-15 14:32 ` [PATCH v5 16/54] tcg/aarch64: " Richard Henderson
2023-05-15 14:32 ` [PATCH v5 17/54] tcg/ppc: " Richard Henderson
2023-05-15 14:32 ` [PATCH v5 18/54] tcg/loongarch64: " Richard Henderson
2023-05-15 14:32 ` [PATCH v5 19/54] tcg/riscv: " Richard Henderson
2023-05-15 14:32 ` [PATCH v5 20/54] tcg/arm: Adjust constraints on qemu_ld/st Richard Henderson
2023-05-15 16:58 ` Peter Maydell
2023-05-15 14:32 ` [PATCH v5 21/54] tcg/arm: Use full load/store helpers in user-only mode Richard Henderson
2023-05-15 14:32 ` [PATCH v5 22/54] tcg/mips: " Richard Henderson
2023-05-15 14:32 ` [PATCH v5 23/54] tcg/s390x: " Richard Henderson
2023-05-15 14:32 ` [PATCH v5 24/54] tcg/sparc64: Allocate %g2 as a third temporary Richard Henderson
2023-05-15 17:06 ` Peter Maydell
2023-05-15 14:32 ` [PATCH v5 25/54] tcg/sparc64: Rename tcg_out_movi_imm13 to tcg_out_movi_s13 Richard Henderson
2023-05-15 17:07 ` Peter Maydell
2023-05-15 14:32 ` [PATCH v5 26/54] target/sparc64: Remove tcg_out_movi_s13 case from tcg_out_movi_imm32 Richard Henderson
2023-05-15 17:12 ` Peter Maydell
2023-05-15 14:32 ` [PATCH v5 27/54] tcg/sparc64: Rename tcg_out_movi_imm32 to tcg_out_movi_u32 Richard Henderson
2023-05-15 17:14 ` Peter Maydell
2023-05-15 14:32 ` [PATCH v5 28/54] tcg/sparc64: Split out tcg_out_movi_s32 Richard Henderson
2023-05-15 14:32 ` [PATCH v5 29/54] tcg/sparc64: Use standard slow path for softmmu Richard Henderson
2023-05-16 10:53 ` Peter Maydell
2023-05-15 14:32 ` [PATCH v5 30/54] accel/tcg: Remove helper_unaligned_{ld,st} Richard Henderson
2023-05-15 14:32 ` [PATCH v5 31/54] tcg/loongarch64: Check the host supports unaligned accesses Richard Henderson
2023-05-16 9:44 ` Peter Maydell
2023-05-15 14:32 ` [PATCH v5 32/54] tcg/loongarch64: Support softmmu " Richard Henderson
2023-05-15 14:32 ` [PATCH v5 33/54] tcg/riscv: " Richard Henderson
2023-05-15 14:32 ` [PATCH v5 34/54] tcg: Introduce tcg_target_has_memory_bswap Richard Henderson
2023-05-15 14:32 ` [PATCH v5 35/54] tcg: Add INDEX_op_qemu_{ld,st}_i128 Richard Henderson
2023-05-15 14:32 ` [PATCH v5 36/54] tcg: Introduce tcg_out_movext3 Richard Henderson
2023-05-16 10:03 ` Peter Maydell
2023-05-16 13:56 ` Richard Henderson
2023-05-15 14:32 ` [PATCH v5 37/54] tcg: Merge tcg_out_helper_load_regs into caller Richard Henderson
2023-05-16 10:05 ` Peter Maydell
2023-05-15 14:32 ` [PATCH v5 38/54] tcg: Support TCG_TYPE_I128 in tcg_out_{ld, st}_helper_{args, ret} Richard Henderson
2023-05-15 14:32 ` [PATCH v5 39/54] tcg: Introduce atom_and_align_for_opc Richard Henderson
2023-05-16 10:08 ` Peter Maydell
2023-05-15 14:32 ` [PATCH v5 40/54] tcg/i386: Use atom_and_align_for_opc Richard Henderson
2023-05-16 10:11 ` Peter Maydell
2023-05-15 14:33 ` [PATCH v5 41/54] tcg/aarch64: " Richard Henderson
2023-05-15 14:33 ` [PATCH v5 42/54] tcg/arm: " Richard Henderson
2023-05-15 14:33 ` [PATCH v5 43/54] tcg/loongarch64: " Richard Henderson
2023-05-15 14:33 ` [PATCH v5 44/54] tcg/mips: " Richard Henderson
2023-05-15 14:33 ` [PATCH v5 45/54] tcg/ppc: " Richard Henderson
2023-05-16 10:12 ` Peter Maydell
2023-05-15 14:33 ` [PATCH v5 46/54] tcg/riscv: " Richard Henderson
2023-05-16 10:14 ` Peter Maydell
2023-05-15 14:33 ` [PATCH v5 47/54] tcg/s390x: " Richard Henderson
2023-05-15 14:33 ` [PATCH v5 48/54] tcg/sparc64: " Richard Henderson
2023-05-16 10:19 ` Peter Maydell
2023-05-15 14:33 ` [PATCH v5 49/54] tcg/i386: Honor 64-bit atomicity in 32-bit mode Richard Henderson
2023-05-15 14:33 ` [PATCH v5 50/54] tcg/i386: Support 128-bit load/store with have_atomic16 Richard Henderson
2023-05-15 14:33 ` [PATCH v5 51/54] tcg/aarch64: Rename temporaries Richard Henderson
2023-05-15 14:33 ` [PATCH v5 52/54] tcg/aarch64: Support 128-bit load/store Richard Henderson
2023-05-15 14:33 ` [PATCH v5 53/54] tcg/ppc: " Richard Henderson
2023-05-15 14:33 ` [PATCH v5 54/54] tcg/s390x: " Richard Henderson
2023-05-16 13:40 ` Peter Maydell
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