From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4C5D1C7EE22 for ; Thu, 18 May 2023 09:54:47 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pzaLE-0007UW-W2; Thu, 18 May 2023 05:54:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pzaLD-0007U8-JR for qemu-devel@nongnu.org; Thu, 18 May 2023 05:54:35 -0400 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pzaLB-0000UV-BD for qemu-devel@nongnu.org; Thu, 18 May 2023 05:54:35 -0400 Received: from lhrpeml500005.china.huawei.com (unknown [172.18.147.201]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4QMQF52Gz4z6J7Ch; Thu, 18 May 2023 17:50:01 +0800 (CST) Received: from localhost (10.126.175.163) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.23; Thu, 18 May 2023 10:54:17 +0100 Date: Thu, 18 May 2023 10:54:16 +0100 To: Ira Weiny CC: , , Dave Jiang , Dan Williams Subject: Re: [PATCH RFC 1/5] hw/cxl: Use define for build bug detection Message-ID: <20230518105416.000054c9@Huawei.com> In-Reply-To: <20230517-rfc-type2-dev-v1-1-6eb2e470981b@intel.com> References: <20230517-rfc-type2-dev-v1-0-6eb2e470981b@intel.com> <20230517-rfc-type2-dev-v1-1-6eb2e470981b@intel.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.33; x86_64-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.126.175.163] X-ClientProxiedBy: lhrpeml100005.china.huawei.com (7.191.160.25) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CFilter-Loop: Reflected Received-SPF: pass client-ip=185.176.79.56; envelope-from=jonathan.cameron@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jonathan Cameron From: Jonathan Cameron via Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Wed, 17 May 2023 19:45:54 -0700 Ira Weiny wrote: > Magic numbers can be confusing. > > Use the range size define for CXL.cachemem rather than a magic number. > Update/add spec references. > > Signed-off-by: Ira Weiny I guess we should do a scrub to move all refs to 3.0 soon given it's horrible having a mixture of spec versions for the references. For future specs, we should only do this when sufficient X.Y references have started to appear - I think that's true for r3.0 now. Jonathan > --- > include/hw/cxl/cxl_component.h | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/include/hw/cxl/cxl_component.h b/include/hw/cxl/cxl_component.h > index 52b6a2d67f40..bca2b756c202 100644 > --- a/include/hw/cxl/cxl_component.h > +++ b/include/hw/cxl/cxl_component.h > @@ -10,7 +10,7 @@ > #ifndef CXL_COMPONENT_H > #define CXL_COMPONENT_H > > -/* CXL 2.0 - 8.2.4 */ > +/* CXL 3.0 - 8.2.3 */ > #define CXL2_COMPONENT_IO_REGION_SIZE 0x1000 > #define CXL2_COMPONENT_CM_REGION_SIZE 0x1000 > #define CXL2_COMPONENT_BLOCK_SIZE 0x10000 > @@ -173,7 +173,9 @@ HDM_DECODER_INIT(3); > (CXL_IDE_REGISTERS_OFFSET + CXL_IDE_REGISTERS_SIZE) > #define CXL_SNOOP_REGISTERS_SIZE 0x8 > > -QEMU_BUILD_BUG_MSG((CXL_SNOOP_REGISTERS_OFFSET + CXL_SNOOP_REGISTERS_SIZE) >= 0x1000, > +/* CXL 3.0 8.2.3 Table 8-21 */ > +QEMU_BUILD_BUG_MSG((CXL_SNOOP_REGISTERS_OFFSET + > + CXL_SNOOP_REGISTERS_SIZE) >= CXL2_COMPONENT_CM_REGION_SIZE, > "No space for registers"); > > typedef struct component_registers { >