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From: Taylor Simpson <tsimpson@quicinc.com>
To: qemu-devel@nongnu.org
Cc: tsimpson@quicinc.com, richard.henderson@linaro.org,
	philmd@linaro.org, peter.maydell@linaro.org, bcain@quicinc.com,
	quic_mathbern@quicinc.com, stefanha@redhat.com, ale@rev.ng,
	anjo@rev.ng, quic_mliebel@quicinc.com
Subject: [PULL v2 03/44] Hexagon (tests/tcg/hexagon) Add v68 scalar tests
Date: Thu, 18 May 2023 13:03:30 -0700	[thread overview]
Message-ID: <20230518200411.271148-4-tsimpson@quicinc.com> (raw)
In-Reply-To: <20230518200411.271148-1-tsimpson@quicinc.com>

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230427224057.3766963-4-tsimpson@quicinc.com>
---
 tests/tcg/hexagon/v68_scalar.c    | 186 ++++++++++++++++++++++++++++++
 tests/tcg/hexagon/Makefile.target |   2 +
 2 files changed, 188 insertions(+)
 create mode 100644 tests/tcg/hexagon/v68_scalar.c

diff --git a/tests/tcg/hexagon/v68_scalar.c b/tests/tcg/hexagon/v68_scalar.c
new file mode 100644
index 0000000000..7a8adb1130
--- /dev/null
+++ b/tests/tcg/hexagon/v68_scalar.c
@@ -0,0 +1,186 @@
+/*
+ *  Copyright(c) 2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <stdio.h>
+#include <stdbool.h>
+#include <stdint.h>
+
+/*
+ *  Test the scalar core instructions that are new in v68
+ */
+
+int err;
+
+static int buffer32[] = { 1, 2, 3, 4 };
+static long long buffer64[] = { 5, 6, 7, 8 };
+
+static void __check32(int line, uint32_t result, uint32_t expect)
+{
+    if (result != expect) {
+        printf("ERROR at line %d: 0x%08x != 0x%08x\n",
+               line, result, expect);
+        err++;
+    }
+}
+
+#define check32(RES, EXP) __check32(__LINE__, RES, EXP)
+
+static void __check64(int line, uint64_t result, uint64_t expect)
+{
+    if (result != expect) {
+        printf("ERROR at line %d: 0x%016llx != 0x%016llx\n",
+               line, result, expect);
+        err++;
+    }
+}
+
+#define check64(RES, EXP) __check64(__LINE__, RES, EXP)
+
+static inline int loadw_aq(int *p)
+{
+    int res;
+    asm volatile("%0 = memw_aq(%1)\n\t"
+                 : "=r"(res) : "r"(p));
+    return res;
+}
+
+static void test_loadw_aq(void)
+{
+    int res;
+
+    res = loadw_aq(&buffer32[0]);
+    check32(res, 1);
+    res = loadw_aq(&buffer32[1]);
+    check32(res, 2);
+}
+
+static inline long long loadd_aq(long long *p)
+{
+    long long res;
+    asm volatile("%0 = memd_aq(%1)\n\t"
+                 : "=r"(res) : "r"(p));
+    return res;
+}
+
+static void test_loadd_aq(void)
+{
+    long long res;
+
+    res = loadd_aq(&buffer64[2]);
+    check64(res, 7);
+    res = loadd_aq(&buffer64[3]);
+    check64(res, 8);
+}
+
+static inline void release_at(int *p)
+{
+    asm volatile("release(%0):at\n\t"
+                 : : "r"(p));
+}
+
+static void test_release_at(void)
+{
+    release_at(&buffer32[2]);
+    check64(buffer32[2], 3);
+    release_at(&buffer32[3]);
+    check64(buffer32[3], 4);
+}
+
+static inline void release_st(int *p)
+{
+    asm volatile("release(%0):st\n\t"
+                 : : "r"(p));
+}
+
+static void test_release_st(void)
+{
+    release_st(&buffer32[2]);
+    check64(buffer32[2], 3);
+    release_st(&buffer32[3]);
+    check64(buffer32[3], 4);
+}
+
+static inline void storew_rl_at(int *p, int val)
+{
+    asm volatile("memw_rl(%0):at = %1\n\t"
+                 : : "r"(p), "r"(val) : "memory");
+}
+
+static void test_storew_rl_at(void)
+{
+    storew_rl_at(&buffer32[2], 9);
+    check64(buffer32[2], 9);
+    storew_rl_at(&buffer32[3], 10);
+    check64(buffer32[3], 10);
+}
+
+static inline void stored_rl_at(long long *p, long long val)
+{
+    asm volatile("memd_rl(%0):at = %1\n\t"
+                 : : "r"(p), "r"(val) : "memory");
+}
+
+static void test_stored_rl_at(void)
+{
+    stored_rl_at(&buffer64[2], 11);
+    check64(buffer64[2], 11);
+    stored_rl_at(&buffer64[3], 12);
+    check64(buffer64[3], 12);
+}
+
+static inline void storew_rl_st(int *p, int val)
+{
+    asm volatile("memw_rl(%0):st = %1\n\t"
+                 : : "r"(p), "r"(val) : "memory");
+}
+
+static void test_storew_rl_st(void)
+{
+    storew_rl_st(&buffer32[0], 13);
+    check64(buffer32[0], 13);
+    storew_rl_st(&buffer32[1], 14);
+    check64(buffer32[1], 14);
+}
+
+static inline void stored_rl_st(long long *p, long long val)
+{
+    asm volatile("memd_rl(%0):st = %1\n\t"
+                 : : "r"(p), "r"(val) : "memory");
+}
+
+static void test_stored_rl_st(void)
+{
+    stored_rl_st(&buffer64[0], 15);
+    check64(buffer64[0], 15);
+    stored_rl_st(&buffer64[1], 15);
+    check64(buffer64[1], 15);
+}
+
+int main()
+{
+    test_loadw_aq();
+    test_loadd_aq();
+    test_release_at();
+    test_release_st();
+    test_storew_rl_at();
+    test_stored_rl_at();
+    test_storew_rl_st();
+    test_stored_rl_st();
+
+    puts(err ? "FAIL" : "PASS");
+    return err ? 1 : 0;
+}
diff --git a/tests/tcg/hexagon/Makefile.target b/tests/tcg/hexagon/Makefile.target
index 59b1b074e9..b7529e23bc 100644
--- a/tests/tcg/hexagon/Makefile.target
+++ b/tests/tcg/hexagon/Makefile.target
@@ -76,6 +76,8 @@ HEX_TESTS += test_vminh
 HEX_TESTS += test_vpmpyh
 HEX_TESTS += test_vspliceb
 
+HEX_TESTS += v68_scalar
+
 TESTS += $(HEX_TESTS)
 
 # This test has to be compiled for the -mv67t target
-- 
2.25.1


  parent reply	other threads:[~2023-05-18 20:11 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-18 20:03 [PULL v2 00/44] Hexagon update Taylor Simpson
2023-05-18 20:03 ` [PULL v2 01/44] Hexagon (target/hexagon) Add support for v68/v69/v71/v73 Taylor Simpson
2023-05-18 20:03 ` [PULL v2 02/44] Hexagon (target/hexagon) Add v68 scalar instructions Taylor Simpson
2023-05-18 20:03 ` Taylor Simpson [this message]
2023-05-18 20:03 ` [PULL v2 04/44] Hexagon (target/hexagon) Add v68 HVX instructions Taylor Simpson
2023-05-18 20:03 ` [PULL v2 05/44] Hexagon (tests/tcg/hexagon) Add v68 HVX tests Taylor Simpson
2023-05-18 20:03 ` [PULL v2 06/44] Hexagon (target/hexagon) Add v69 HVX instructions Taylor Simpson
2023-05-18 20:03 ` [PULL v2 07/44] Hexagon (tests/tcg/hexagon) Add v69 HVX tests Taylor Simpson
2023-05-18 20:03 ` [PULL v2 08/44] Hexagon (target/hexagon) Add v73 scalar instructions Taylor Simpson
2023-05-18 20:03 ` [PULL v2 09/44] Hexagon (tests/tcg/hexagon) Add v73 scalar tests Taylor Simpson
2023-05-18 20:03 ` [PULL v2 10/44] meson.build Add CONFIG_HEXAGON_IDEF_PARSER Taylor Simpson
2023-05-18 20:03 ` [PULL v2 11/44] Hexagon (target/hexagon) Add DisasContext arg to gen_log_reg_write Taylor Simpson
2023-05-18 20:03 ` [PULL v2 12/44] Hexagon (target/hexagon) Add overrides for loop setup instructions Taylor Simpson
2023-05-18 20:03 ` [PULL v2 13/44] Hexagon (target/hexagon) Add overrides for allocframe/deallocframe Taylor Simpson
2023-05-18 20:03 ` [PULL v2 14/44] Hexagon (target/hexagon) Add overrides for clr[tf]new Taylor Simpson
2023-05-18 20:03 ` [PULL v2 15/44] Hexagon (target/hexagon) Remove log_reg_write from op_helper.[ch] Taylor Simpson
2023-05-18 20:03 ` [PULL v2 16/44] Hexagon (target/hexagon) Eliminate uses of log_pred_write function Taylor Simpson
2023-05-18 20:03 ` [PULL v2 17/44] Hexagon (target/hexagon) Clean up pred_written usage Taylor Simpson
2023-05-18 20:03 ` [PULL v2 18/44] Hexagon (target/hexagon) Don't overlap dest writes with source reads Taylor Simpson
2023-05-18 20:03 ` [PULL v2 19/44] Hexagon (target/hexagon) Mark registers as read during packet analysis Taylor Simpson
2023-05-18 20:03 ` [PULL v2 20/44] Hexagon (target/hexagon) Short-circuit packet register writes Taylor Simpson
2023-05-18 20:03 ` [PULL v2 21/44] Hexagon (target/hexagon) Short-circuit packet predicate writes Taylor Simpson
2023-05-18 20:03 ` [PULL v2 22/44] Hexagon (target/hexagon) Short-circuit packet HVX writes Taylor Simpson
2023-05-18 20:03 ` [PULL v2 23/44] Hexagon (target/hexagon) Short-circuit more HVX single instruction packets Taylor Simpson
2023-05-18 20:03 ` [PULL v2 24/44] Hexagon (target/hexagon) Add overrides for disabled idef-parser insns Taylor Simpson
2023-05-18 20:03 ` [PULL v2 25/44] Hexagon (target/hexagon) Make special new_value for USR Taylor Simpson
2023-05-18 20:03 ` [PULL v2 26/44] Hexagon (target/hexagon) Move new_value to DisasContext Taylor Simpson
2023-05-18 20:03 ` [PULL v2 27/44] Hexagon (target/hexagon) Move new_pred_value " Taylor Simpson
2023-05-18 20:03 ` [PULL v2 28/44] Hexagon (target/hexagon) Move pred_written " Taylor Simpson
2023-05-18 20:03 ` [PULL v2 29/44] Hexagon (target/hexagon) Move pkt_has_store_s1 " Taylor Simpson
2023-05-18 20:03 ` [PULL v2 30/44] Hexagon (target/hexagon) Move items " Taylor Simpson
2023-05-18 20:03 ` [PULL v2 31/44] Hexagon (target/hexagon) Additional instructions handled by idef-parser Taylor Simpson
2023-05-18 20:03 ` [PULL v2 32/44] target/hexagon: fix = vs. == mishap Taylor Simpson
2023-05-18 20:04 ` [PULL v2 33/44] Hexagon (target/hexagon/*.py): raise exception on reg parsing error Taylor Simpson
2023-05-18 20:04 ` [PULL v2 34/44] Hexagon: list available CPUs with `-cpu help` Taylor Simpson
2023-05-18 20:04 ` [PULL v2 35/44] Hexagon: append eflags to unknown cpu model string Taylor Simpson
2023-05-18 20:04 ` [PULL v2 36/44] Hexagon (iclass): update J4_hintjumpr slot constraints Taylor Simpson
2023-05-18 20:04 ` [PULL v2 37/44] Hexagon (decode): look for pkts with multiple insns at the same slot Taylor Simpson
2023-05-18 20:04 ` [PULL v2 38/44] Remove test_vshuff from hvx_misc tests Taylor Simpson
2023-05-18 20:04 ` [PULL v2 39/44] gdbstub: only send stop-reply packets when allowed to Taylor Simpson
2023-05-18 20:04 ` [PULL v2 40/44] gdbstub: add test for untimely stop-reply packets Taylor Simpson
2023-08-04 14:57   ` Richard Henderson
2023-08-07 13:01     ` Matheus Tavares Bernardino
2023-05-18 20:04 ` [PULL v2 41/44] Hexagon: add core gdbstub xml data for LLDB Taylor Simpson
2023-05-18 20:04 ` [PULL v2 42/44] Hexagon (gdbstub): fix p3:0 read and write via stub Taylor Simpson
2023-05-18 20:04 ` [PULL v2 43/44] Hexagon (gdbstub): add HVX support Taylor Simpson
2023-05-18 20:04 ` [PULL v2 44/44] Hexagon (linux-user/hexagon): handle breakpoints Taylor Simpson
2023-05-19 14:55 ` [PULL v2 00/44] Hexagon update Richard Henderson

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