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[176.184.41.228]) by smtp.gmail.com with ESMTPSA id q10-20020a1cf30a000000b003f423508c6bsm1086791wmq.44.2023.05.19.22.45.28 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 19 May 2023 22:45:29 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Liu Zhiwei , Palmer Dabbelt , Weiwei Li , Bin Meng , Alistair Francis , qemu-riscv@nongnu.org, Daniel Henrique Barboza , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 3/5] hw/riscv/opentitan: Add TYPE_OPENTITAN_MACHINE definition Date: Sat, 20 May 2023 07:45:08 +0200 Message-Id: <20230520054510.68822-4-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230520054510.68822-1-philmd@linaro.org> References: <20230520054510.68822-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org QOM type names are usually defined as TYPE_FOO. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/riscv/opentitan.h | 2 ++ hw/riscv/opentitan.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h index c40b05052a..fd70226ed8 100644 --- a/include/hw/riscv/opentitan.h +++ b/include/hw/riscv/opentitan.h @@ -53,6 +53,8 @@ struct LowRISCIbexSoCState { MemoryRegion flash_alias; }; +#define TYPE_OPENTITAN_MACHINE "opentitan" + typedef struct OpenTitanState { /*< private >*/ SysBusDevice parent_obj; diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 294955eeea..7d7159ea30 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -118,7 +118,7 @@ static void opentitan_machine_class_init(MachineClass *mc) mc->default_ram_size = ibex_memmap[IBEX_DEV_RAM].size; } -DEFINE_MACHINE("opentitan", opentitan_machine_class_init) +DEFINE_MACHINE(TYPE_OPENTITAN_MACHINE, opentitan_machine_class_init) static void lowrisc_ibex_soc_init(Object *obj) { -- 2.38.1