From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Weiwei Li" <liweiwei@iscas.ac.cn>,
"Bin Meng" <bin.meng@windriver.com>,
"Alistair Francis" <Alistair.Francis@wdc.com>,
qemu-riscv@nongnu.org,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH 4/5] hw/riscv/opentitan: Explicit machine type definition
Date: Sat, 20 May 2023 07:45:09 +0200 [thread overview]
Message-ID: <20230520054510.68822-5-philmd@linaro.org> (raw)
In-Reply-To: <20230520054510.68822-1-philmd@linaro.org>
Expand the DEFINE_MACHINE() macro, converting the class_init()
handler.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/riscv/opentitan.h | 3 ++-
hw/riscv/opentitan.c | 10 +++++++---
2 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h
index fd70226ed8..806ff73528 100644
--- a/include/hw/riscv/opentitan.h
+++ b/include/hw/riscv/opentitan.h
@@ -24,6 +24,7 @@
#include "hw/char/ibex_uart.h"
#include "hw/timer/ibex_timer.h"
#include "hw/ssi/ibex_spi_host.h"
+#include "hw/boards.h"
#include "qom/object.h"
#define TYPE_RISCV_IBEX_SOC "riscv.lowrisc.ibex.soc"
@@ -53,7 +54,7 @@ struct LowRISCIbexSoCState {
MemoryRegion flash_alias;
};
-#define TYPE_OPENTITAN_MACHINE "opentitan"
+#define TYPE_OPENTITAN_MACHINE MACHINE_TYPE_NAME("opentitan")
typedef struct OpenTitanState {
/*< private >*/
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index 7d7159ea30..9535308197 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -108,8 +108,10 @@ static void opentitan_machine_init(MachineState *machine)
}
}
-static void opentitan_machine_class_init(MachineClass *mc)
+static void opentitan_machine_class_init(ObjectClass *oc, void *data)
{
+ MachineClass *mc = MACHINE_CLASS(oc);
+
mc->desc = "RISC-V Board compatible with OpenTitan";
mc->init = opentitan_machine_init;
mc->max_cpus = 1;
@@ -118,8 +120,6 @@ static void opentitan_machine_class_init(MachineClass *mc)
mc->default_ram_size = ibex_memmap[IBEX_DEV_RAM].size;
}
-DEFINE_MACHINE(TYPE_OPENTITAN_MACHINE, opentitan_machine_class_init)
-
static void lowrisc_ibex_soc_init(Object *obj)
{
LowRISCIbexSoCState *s = RISCV_IBEX_SOC(obj);
@@ -327,6 +327,10 @@ static const TypeInfo open_titan_types[] = {
.instance_size = sizeof(LowRISCIbexSoCState),
.instance_init = lowrisc_ibex_soc_init,
.class_init = lowrisc_ibex_soc_class_init,
+ }, {
+ .name = TYPE_OPENTITAN_MACHINE,
+ .parent = TYPE_MACHINE,
+ .class_init = opentitan_machine_class_init,
}
};
--
2.38.1
next prev parent reply other threads:[~2023-05-20 5:47 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-20 5:45 [PATCH 0/5] hw/riscv/opentitan: Correct QOM type/size of OpenTitanState Philippe Mathieu-Daudé
2023-05-20 5:45 ` [PATCH 1/5] hw/riscv/opentitan: Rename machine_[class]_init() functions Philippe Mathieu-Daudé
2023-05-22 13:21 ` Daniel Henrique Barboza
2023-05-25 2:13 ` Alistair Francis
2023-05-20 5:45 ` [PATCH 2/5] hw/riscv/opentitan: Declare QOM types using DEFINE_TYPES() macro Philippe Mathieu-Daudé
2023-05-22 13:26 ` Daniel Henrique Barboza
2023-05-25 2:15 ` Alistair Francis
2023-05-20 5:45 ` [PATCH 3/5] hw/riscv/opentitan: Add TYPE_OPENTITAN_MACHINE definition Philippe Mathieu-Daudé
2023-05-22 13:26 ` Daniel Henrique Barboza
2023-05-25 2:16 ` Alistair Francis
2023-05-20 5:45 ` Philippe Mathieu-Daudé [this message]
2023-05-22 13:26 ` [PATCH 4/5] hw/riscv/opentitan: Explicit machine type definition Daniel Henrique Barboza
2023-05-25 2:18 ` Alistair Francis
2023-05-20 5:45 ` [PATCH 5/5] hw/riscv/opentitan: Correct OpenTitanState parent type/size Philippe Mathieu-Daudé
2023-05-22 13:27 ` Daniel Henrique Barboza
2023-05-25 2:20 ` Alistair Francis
2023-05-25 2:21 ` [PATCH 0/5] hw/riscv/opentitan: Correct QOM type/size of OpenTitanState Alistair Francis
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