From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
qemu-arm@nongnu.org, "Alex Bennée" <alex.bennee@linaro.org>,
"Evgeny Iakovlev" <eiakovlev@linux.microsoft.com>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH 10/12] hw/char/pl011: Check if receiver is enabled
Date: Mon, 22 May 2023 17:31:42 +0200 [thread overview]
Message-ID: <20230522153144.30610-11-philmd@linaro.org> (raw)
In-Reply-To: <20230522153144.30610-1-philmd@linaro.org>
Do not receive characters when UART or receiver are disabled.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/char/pl011.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index 30bedeac15..1ec102d8de 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -77,6 +77,7 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr)
#define LCR_BRK (1 << 0)
/* Control Register, UARTCR */
+#define CR_RXE (1 << 9)
#define CR_TXE (1 << 8)
#define CR_UARTEN (1 << 0)
@@ -348,9 +349,11 @@ static void pl011_write(void *opaque, hwaddr offset,
static int pl011_can_receive(void *opaque)
{
PL011State *s = (PL011State *)opaque;
- int r;
+ int r = 0;
- r = s->read_count < pl011_get_fifo_depth(s);
+ if (s->cr & (CR_UARTEN | CR_RXE)) {
+ r = s->read_count < pl011_get_fifo_depth(s);
+ }
trace_pl011_can_receive(s->lcr, s->read_count, r);
return r;
}
--
2.38.1
next prev parent reply other threads:[~2023-05-22 15:36 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-22 15:31 [PATCH 00/12] hw/char/pl011: Implement TX (async) FIFO to avoid blocking the main loop Philippe Mathieu-Daudé
2023-05-22 15:31 ` [PATCH 01/12] util/fifo8: Fix typo in fifo8_push_all() description Philippe Mathieu-Daudé
2023-05-22 19:06 ` Francisco Iglesias
2023-05-23 13:22 ` Alex Bennée
2023-05-22 15:31 ` [PATCH 02/12] util/fifo8: Allow fifo8_pop_buf() to not populate popped length Philippe Mathieu-Daudé
2023-05-22 19:13 ` Francisco Iglesias
2023-05-23 13:25 ` Alex Bennée
2023-05-22 15:31 ` [PATCH 03/12] util/fifo8: Introduce fifo8_peek_buf() Philippe Mathieu-Daudé
2023-05-22 19:38 ` Francisco Iglesias
2023-05-23 13:25 ` Alex Bennée
2023-05-22 15:31 ` [PATCH 04/12] hw/char/pl011: Display register name in trace events Philippe Mathieu-Daudé
2023-05-23 13:31 ` Alex Bennée
2023-05-22 15:31 ` [PATCH 05/12] hw/char/pl011: Remove duplicated PL011_INT_[RT]X definitions Philippe Mathieu-Daudé
2023-05-23 13:32 ` Alex Bennée
2023-05-22 15:31 ` [PATCH 06/12] hw/char/pl011: Replace magic values by register field definitions Philippe Mathieu-Daudé
2023-05-23 13:34 ` Alex Bennée
2023-05-22 15:31 ` [PATCH 07/12] hw/char/pl011: Split RX/TX path of pl011_reset_fifo() Philippe Mathieu-Daudé
2023-05-23 13:35 ` Alex Bennée
2023-05-22 15:31 ` [PATCH 08/12] hw/char/pl011: Extract pl011_write_tx() from pl011_write() Philippe Mathieu-Daudé
2023-05-23 13:36 ` Alex Bennée
2023-05-22 15:31 ` [PATCH 09/12] hw/char/pl011: Check if transmitter is enabled Philippe Mathieu-Daudé
2023-05-23 13:36 ` Alex Bennée
2023-05-25 12:30 ` Peter Maydell
2023-05-25 12:51 ` Alex Bennée
2023-05-25 12:55 ` Peter Maydell
2023-05-25 13:17 ` Philippe Mathieu-Daudé
2023-05-22 15:31 ` Philippe Mathieu-Daudé [this message]
2023-05-23 13:38 ` [PATCH 10/12] hw/char/pl011: Check if receiver " Alex Bennée
2023-05-22 15:31 ` [PATCH 11/12] hw/char/pl011: Rename RX FIFO methods Philippe Mathieu-Daudé
2023-05-23 13:39 ` Alex Bennée
2023-05-22 15:31 ` [PATCH 12/12] hw/char/pl011: Implement TX FIFO Philippe Mathieu-Daudé
2023-05-23 13:47 ` Alex Bennée
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