* [PATCH] target/i386: EPYC-Rome model without XSAVES
@ 2023-05-24 21:37 Maksim Davydov
2023-05-25 7:30 ` Paolo Bonzini
0 siblings, 1 reply; 2+ messages in thread
From: Maksim Davydov @ 2023-05-24 21:37 UTC (permalink / raw)
To: qemu-devel
Cc: davydov-max, yc-core, babu.moger, pbonzini, richard.henderson,
xiaoyao.li, mst
Based on the kernel commit "b0563468ee x86/CPU/AMD: Disable XSAVES on
AMD family 0x17", host system with EPYC-Rome can clear XSAVES capability
bit. In another words, EPYC-Rome host without XSAVES can occur. Thus, we
need an EPYC-Rome cpu model (without this feature) that matches the
solution of fixing this erratum
Signed-off-by: Maksim Davydov <davydov-max@yandex-team.ru>
---
target/i386/cpu.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index a61cd6d99d1f..1242bd541a53 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -4466,6 +4466,16 @@ static const X86CPUDefinition builtin_x86_defs[] = {
},
.cache_info = &epyc_rome_v3_cache_info
},
+ {
+ .version = 4,
+ .props = (PropValue[]) {
+ /* Erratum 1386 */
+ { "model-id",
+ "AMD EPYC-Rome-v4 Processor (no XSAVES)" },
+ { "xsaves", "off" },
+ { /* end of list */ }
+ },
+ },
{ /* end of list */ }
}
},
--
2.25.1
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2023-05-25 7:30 ` Paolo Bonzini
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