[PATCH 0/4] Fix Fedora 38 Clang on s390x

[PATCH 0/4] Fix Fedora 38 Clang on s390x

[Ilya Leoshkevich]

Hi,

It was reported that Fedora 38 Clang does not run correctly under
qemu-s390x [1]. Comparing qemu and real s390x instruction traces has
shown that the implementations of LCBB and LOCFHR were not fully
correct.

This series fixes the issues and adds tests. I can now run Fedora 38
Clang under s390x emulation and compile "hello world" with it.

Best regards,
Ilya

[1] https://bugzilla.redhat.com/show_bug.cgi?id=2209635

Ilya Leoshkevich (4):
  target/s390x: Fix LCBB overwriting the top 32 bits
  tests/tcg/s390x: Test LCBB
  target/s390x: Fix LOCFHR taking the wrong half of R2
  tests/tcg/s390x: Test LOCFHR

 target/s390x/tcg/insn-data.h.inc |  4 +--
 tests/tcg/s390x/Makefile.target  |  2 ++
 tests/tcg/s390x/lcbb.c           | 51 ++++++++++++++++++++++++++++++++
 tests/tcg/s390x/locfhr.c         | 29 ++++++++++++++++++
 4 files changed, 84 insertions(+), 2 deletions(-)
 create mode 100644 tests/tcg/s390x/lcbb.c
 create mode 100644 tests/tcg/s390x/locfhr.c

-- 
2.40.1

[PATCH 1/4] target/s390x: Fix LCBB overwriting the top 32 bits

[Ilya Leoshkevich]

LCBB is supposed to overwrite only the bottom 32 bits, but QEMU
erroneously overwrites the entire register.

Fixes: 6d9303322ed9 ("s390x/tcg: Implement LOAD COUNT TO BLOCK BOUNDARY")
Cc: qemu-stable@nongnu.org
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
 target/s390x/tcg/insn-data.h.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc
index bcc70d99ba2..e41672684aa 100644
--- a/target/s390x/tcg/insn-data.h.inc
+++ b/target/s390x/tcg/insn-data.h.inc
@@ -486,7 +486,7 @@
     F(0xb343, LCXBR,   RRE,   Z,   x2h, x2l, new_P, x1_P, negf128, f128, IF_BFP)
     F(0xb373, LCDFR,   RRE,   FPSSH, 0, f2, new, f1, negf64, 0, IF_AFP1 | IF_AFP2)
 /* LOAD COUNT TO BLOCK BOUNDARY */
-    C(0xe727, LCBB,    RXE,   V,   la2, 0, r1, 0, lcbb, 0)
+    C(0xe727, LCBB,    RXE,   V,   la2, 0, new, r1_32, lcbb, 0)
 /* LOAD HALFWORD */
     C(0xb927, LHR,     RRE,   EI,  0, r2_16s, 0, r1_32, mov2, 0)
     C(0xb907, LGHR,    RRE,   EI,  0, r2_16s, 0, r1, mov2, 0)
-- 
2.40.1

[PATCH 2/4] tests/tcg/s390x: Test LCBB

[Ilya Leoshkevich]

Add a test to prevent regressions.

Cc: qemu-stable@nongnu.org
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
 tests/tcg/s390x/Makefile.target |  1 +
 tests/tcg/s390x/lcbb.c          | 51 +++++++++++++++++++++++++++++++++
 2 files changed, 52 insertions(+)
 create mode 100644 tests/tcg/s390x/lcbb.c

diff --git a/tests/tcg/s390x/Makefile.target b/tests/tcg/s390x/Makefile.target
index 73f7cb828e3..c48de439625 100644
--- a/tests/tcg/s390x/Makefile.target
+++ b/tests/tcg/s390x/Makefile.target
@@ -47,6 +47,7 @@ $(PGM_SPECIFICATION_TESTS): LDFLAGS+=pgm-specification-user.o
 TESTS += $(PGM_SPECIFICATION_TESTS)
 
 Z13_TESTS=vistr
+Z13_TESTS+=lcbb
 $(Z13_TESTS): CFLAGS+=-march=z13 -O2
 TESTS+=$(Z13_TESTS)
 
diff --git a/tests/tcg/s390x/lcbb.c b/tests/tcg/s390x/lcbb.c
new file mode 100644
index 00000000000..8d368e0998d
--- /dev/null
+++ b/tests/tcg/s390x/lcbb.c
@@ -0,0 +1,51 @@
+/*
+ * Test the LCBB instruction.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#include <assert.h>
+#include <stdlib.h>
+
+static inline __attribute__((__always_inline__)) void
+lcbb(long *r1, void *dxb2, int m3, int *cc)
+{
+    asm("lcbb %[r1],%[dxb2],%[m3]\n"
+        "ipm %[cc]"
+        : [r1] "+r" (*r1), [cc] "=r" (*cc)
+        : [dxb2] "R" (*(char *)dxb2), [m3] "i" (m3)
+        : "cc");
+    *cc = (*cc >> 28) & 3;
+}
+
+static char buf[0x1000] __attribute__((aligned(0x1000)));
+
+static inline __attribute__((__always_inline__)) void
+test_lcbb(void *p, int m3, int exp_r1, int exp_cc)
+{
+    long r1 = 0xfedcba9876543210;
+    int cc;
+
+    lcbb(&r1, p, m3, &cc);
+    assert(r1 == (0xfedcba9800000000 | exp_r1));
+    assert(cc == exp_cc);
+}
+
+int main(void)
+{
+    test_lcbb(&buf[0],    0, 16, 0);
+    test_lcbb(&buf[63],   0,  1, 3);
+    test_lcbb(&buf[0],    1, 16, 0);
+    test_lcbb(&buf[127],  1,  1, 3);
+    test_lcbb(&buf[0],    2, 16, 0);
+    test_lcbb(&buf[255],  2,  1, 3);
+    test_lcbb(&buf[0],    3, 16, 0);
+    test_lcbb(&buf[511],  3,  1, 3);
+    test_lcbb(&buf[0],    4, 16, 0);
+    test_lcbb(&buf[1023], 4,  1, 3);
+    test_lcbb(&buf[0],    5, 16, 0);
+    test_lcbb(&buf[2047], 5,  1, 3);
+    test_lcbb(&buf[0],    6, 16, 0);
+    test_lcbb(&buf[4095], 6,  1, 3);
+
+    return EXIT_SUCCESS;
+}
-- 
2.40.1

[PATCH 3/4] target/s390x: Fix LOCFHR taking the wrong half of R2

[Ilya Leoshkevich]

LOCFHR should write top-to-top, but QEMU erroneously writes
bottom-to-top.

Fixes: 45aa9aa3b773 ("target/s390x: Implement load-on-condition-2 insns")
Cc: qemu-stable@nongnu.org
Reported-by: Mikhail Mitskevich <mitskevichmn@gmail.com>
Closes: https://gitlab.com/qemu-project/qemu/-/issues/1668
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
 target/s390x/tcg/insn-data.h.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc
index e41672684aa..937e18ea9d9 100644
--- a/target/s390x/tcg/insn-data.h.inc
+++ b/target/s390x/tcg/insn-data.h.inc
@@ -564,7 +564,7 @@
     C(0xec46, LOCGHI,  RIE_g, LOC2, r1, i2, r1, 0, loc, 0)
     C(0xec4e, LOCHHI,  RIE_g, LOC2, r1_sr32, i2, new, r1_32h, loc, 0)
 /* LOAD HIGH ON CONDITION */
-    C(0xb9e0, LOCFHR,  RRF_c, LOC2, r1_sr32, r2, new, r1_32h, loc, 0)
+    C(0xb9e0, LOCFHR,  RRF_c, LOC2, r1_sr32, r2_sr32, new, r1_32h, loc, 0)
     C(0xebe0, LOCFH,   RSY_b, LOC2, r1_sr32, m2_32u, new, r1_32h, loc, 0)
 /* LOAD PAIR DISJOINT */
     D(0xc804, LPD,     SSF,   ILA, 0, 0, new_P, r3_P32, lpd, 0, MO_TEUL)
-- 
2.40.1

[PATCH 4/4] tests/tcg/s390x: Test LOCFHR

[Ilya Leoshkevich]

Add a small test to prevent regressions.

Cc: qemu-stable@nongnu.org
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
 tests/tcg/s390x/Makefile.target |  1 +
 tests/tcg/s390x/locfhr.c        | 29 +++++++++++++++++++++++++++++
 2 files changed, 30 insertions(+)
 create mode 100644 tests/tcg/s390x/locfhr.c

diff --git a/tests/tcg/s390x/Makefile.target b/tests/tcg/s390x/Makefile.target
index c48de439625..3c239fdd082 100644
--- a/tests/tcg/s390x/Makefile.target
+++ b/tests/tcg/s390x/Makefile.target
@@ -48,6 +48,7 @@ TESTS += $(PGM_SPECIFICATION_TESTS)
 
 Z13_TESTS=vistr
 Z13_TESTS+=lcbb
+Z13_TESTS+=locfhr
 $(Z13_TESTS): CFLAGS+=-march=z13 -O2
 TESTS+=$(Z13_TESTS)
 
diff --git a/tests/tcg/s390x/locfhr.c b/tests/tcg/s390x/locfhr.c
new file mode 100644
index 00000000000..ab9ff6e4490
--- /dev/null
+++ b/tests/tcg/s390x/locfhr.c
@@ -0,0 +1,29 @@
+/*
+ * Test the LOCFHR instruction.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#include <assert.h>
+#include <stdlib.h>
+
+static inline __attribute__((__always_inline__)) long
+locfhr(long r1, long r2, int m3, int cc)
+{
+    cc <<= 28;
+    asm("spm %[cc]\n"
+        "locfhr %[r1],%[r2],%[m3]\n"
+        : [r1] "+r" (r1)
+        : [cc] "r" (cc), [r2] "r" (r2), [m3] "i" (m3)
+        : "cc");
+    return r1;
+}
+
+int main(void)
+{
+    assert(locfhr(0x1111111122222222, 0x3333333344444444, 8, 0) ==
+           0x3333333322222222);
+    assert(locfhr(0x5555555566666666, 0x7777777788888888, 11, 1) ==
+           0x5555555566666666);
+
+    return EXIT_SUCCESS;
+}
-- 
2.40.1

Re: [PATCH 3/4] target/s390x: Fix LOCFHR taking the wrong half of R2

[Richard Henderson]

On 5/26/23 11:12, Ilya Leoshkevich wrote:
> LOCFHR should write top-to-top, but QEMU erroneously writes
> bottom-to-top.
> 
> Fixes: 45aa9aa3b773 ("target/s390x: Implement load-on-condition-2 insns")
> Cc:qemu-stable@nongnu.org
> Reported-by: Mikhail Mitskevich<mitskevichmn@gmail.com>
> Closes:https://gitlab.com/qemu-project/qemu/-/issues/1668
> Signed-off-by: Ilya Leoshkevich<iii@linux.ibm.com>
> ---
>   target/s390x/tcg/insn-data.h.inc | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

Re: [PATCH 1/4] target/s390x: Fix LCBB overwriting the top 32 bits

[Richard Henderson]

On 5/26/23 11:12, Ilya Leoshkevich wrote:
> LCBB is supposed to overwrite only the bottom 32 bits, but QEMU
> erroneously overwrites the entire register.
> 
> Fixes: 6d9303322ed9 ("s390x/tcg: Implement LOAD COUNT TO BLOCK BOUNDARY")
> Cc: qemu-stable@nongnu.org
> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

> ---
>   target/s390x/tcg/insn-data.h.inc | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc
> index bcc70d99ba2..e41672684aa 100644
> --- a/target/s390x/tcg/insn-data.h.inc
> +++ b/target/s390x/tcg/insn-data.h.inc
> @@ -486,7 +486,7 @@
>       F(0xb343, LCXBR,   RRE,   Z,   x2h, x2l, new_P, x1_P, negf128, f128, IF_BFP)
>       F(0xb373, LCDFR,   RRE,   FPSSH, 0, f2, new, f1, negf64, 0, IF_AFP1 | IF_AFP2)
>   /* LOAD COUNT TO BLOCK BOUNDARY */
> -    C(0xe727, LCBB,    RXE,   V,   la2, 0, r1, 0, lcbb, 0)
> +    C(0xe727, LCBB,    RXE,   V,   la2, 0, new, r1_32, lcbb, 0)
>   /* LOAD HALFWORD */
>       C(0xb927, LHR,     RRE,   EI,  0, r2_16s, 0, r1_32, mov2, 0)
>       C(0xb907, LGHR,    RRE,   EI,  0, r2_16s, 0, r1, mov2, 0)

Re: [PATCH 2/4] tests/tcg/s390x: Test LCBB

[Richard Henderson]

On 5/26/23 11:12, Ilya Leoshkevich wrote:
> Add a test to prevent regressions.
> 
> Cc:qemu-stable@nongnu.org
> Signed-off-by: Ilya Leoshkevich<iii@linux.ibm.com>
> ---
>   tests/tcg/s390x/Makefile.target |  1 +
>   tests/tcg/s390x/lcbb.c          | 51 +++++++++++++++++++++++++++++++++
>   2 files changed, 52 insertions(+)
>   create mode 100644 tests/tcg/s390x/lcbb.c
Acked-by: Richard Henderson <richard.henderson@linaro.org>

r~

Re: [PATCH 4/4] tests/tcg/s390x: Test LOCFHR

[Richard Henderson]

On 5/26/23 11:12, Ilya Leoshkevich wrote:
> Add a small test to prevent regressions.
> 
> Cc:qemu-stable@nongnu.org
> Signed-off-by: Ilya Leoshkevich<iii@linux.ibm.com>
> ---
>   tests/tcg/s390x/Makefile.target |  1 +
>   tests/tcg/s390x/locfhr.c        | 29 +++++++++++++++++++++++++++++
>   2 files changed, 30 insertions(+)
>   create mode 100644 tests/tcg/s390x/locfhr.c

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

Re: [PATCH 1/4] target/s390x: Fix LCBB overwriting the top 32 bits

[David Hildenbrand]

On 26.05.23 20:12, Ilya Leoshkevich wrote:
> LCBB is supposed to overwrite only the bottom 32 bits, but QEMU
> erroneously overwrites the entire register.
> 
> Fixes: 6d9303322ed9 ("s390x/tcg: Implement LOAD COUNT TO BLOCK BOUNDARY")
> Cc: qemu-stable@nongnu.org
> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
> ---
>   target/s390x/tcg/insn-data.h.inc | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc
> index bcc70d99ba2..e41672684aa 100644
> --- a/target/s390x/tcg/insn-data.h.inc
> +++ b/target/s390x/tcg/insn-data.h.inc
> @@ -486,7 +486,7 @@
>       F(0xb343, LCXBR,   RRE,   Z,   x2h, x2l, new_P, x1_P, negf128, f128, IF_BFP)
>       F(0xb373, LCDFR,   RRE,   FPSSH, 0, f2, new, f1, negf64, 0, IF_AFP1 | IF_AFP2)
>   /* LOAD COUNT TO BLOCK BOUNDARY */
> -    C(0xe727, LCBB,    RXE,   V,   la2, 0, r1, 0, lcbb, 0)
> +    C(0xe727, LCBB,    RXE,   V,   la2, 0, new, r1_32, lcbb, 0)
>   /* LOAD HALFWORD */
>       C(0xb927, LHR,     RRE,   EI,  0, r2_16s, 0, r1_32, mov2, 0)
>       C(0xb907, LGHR,    RRE,   EI,  0, r2_16s, 0, r1, mov2, 0)

Thanks!

Reviewed-by: David Hildenbrand <david@redhat.com>

-- 
Thanks,

David / dhildenb

Re: [PATCH 2/4] tests/tcg/s390x: Test LCBB

[David Hildenbrand]

On 26.05.23 20:12, Ilya Leoshkevich wrote:
> Add a test to prevent regressions.
> 
> Cc: qemu-stable@nongnu.org
> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
> ---
>   tests/tcg/s390x/Makefile.target |  1 +
>   tests/tcg/s390x/lcbb.c          | 51 +++++++++++++++++++++++++++++++++
>   2 files changed, 52 insertions(+)
>   create mode 100644 tests/tcg/s390x/lcbb.c
> 
> diff --git a/tests/tcg/s390x/Makefile.target b/tests/tcg/s390x/Makefile.target
> index 73f7cb828e3..c48de439625 100644
> --- a/tests/tcg/s390x/Makefile.target
> +++ b/tests/tcg/s390x/Makefile.target
> @@ -47,6 +47,7 @@ $(PGM_SPECIFICATION_TESTS): LDFLAGS+=pgm-specification-user.o
>   TESTS += $(PGM_SPECIFICATION_TESTS)
>   
>   Z13_TESTS=vistr
> +Z13_TESTS+=lcbb
>   $(Z13_TESTS): CFLAGS+=-march=z13 -O2
>   TESTS+=$(Z13_TESTS)
>   
> diff --git a/tests/tcg/s390x/lcbb.c b/tests/tcg/s390x/lcbb.c
> new file mode 100644
> index 00000000000..8d368e0998d
> --- /dev/null
> +++ b/tests/tcg/s390x/lcbb.c
> @@ -0,0 +1,51 @@
> +/*
> + * Test the LCBB instruction.
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +#include <assert.h>
> +#include <stdlib.h>
> +
> +static inline __attribute__((__always_inline__)) void
> +lcbb(long *r1, void *dxb2, int m3, int *cc)
> +{
> +    asm("lcbb %[r1],%[dxb2],%[m3]\n"
> +        "ipm %[cc]"
> +        : [r1] "+r" (*r1), [cc] "=r" (*cc)
> +        : [dxb2] "R" (*(char *)dxb2), [m3] "i" (m3)
> +        : "cc");
> +    *cc = (*cc >> 28) & 3;
> +}
> +
> +static char buf[0x1000] __attribute__((aligned(0x1000)));
> +
> +static inline __attribute__((__always_inline__)) void
> +test_lcbb(void *p, int m3, int exp_r1, int exp_cc)
> +{
> +    long r1 = 0xfedcba9876543210;
> +    int cc;
> +
> +    lcbb(&r1, p, m3, &cc);
> +    assert(r1 == (0xfedcba9800000000 | exp_r1));
> +    assert(cc == exp_cc);
> +}
> +
> +int main(void)
> +{
> +    test_lcbb(&buf[0],    0, 16, 0);
> +    test_lcbb(&buf[63],   0,  1, 3);
> +    test_lcbb(&buf[0],    1, 16, 0);
> +    test_lcbb(&buf[127],  1,  1, 3);
> +    test_lcbb(&buf[0],    2, 16, 0);
> +    test_lcbb(&buf[255],  2,  1, 3);
> +    test_lcbb(&buf[0],    3, 16, 0);
> +    test_lcbb(&buf[511],  3,  1, 3);
> +    test_lcbb(&buf[0],    4, 16, 0);
> +    test_lcbb(&buf[1023], 4,  1, 3);
> +    test_lcbb(&buf[0],    5, 16, 0);
> +    test_lcbb(&buf[2047], 5,  1, 3);
> +    test_lcbb(&buf[0],    6, 16, 0);
> +    test_lcbb(&buf[4095], 6,  1, 3);
> +
> +    return EXIT_SUCCESS;
> +}

Reviewed-by: David Hildenbrand <david@redhat.com>

-- 
Thanks,

David / dhildenb

Re: [PATCH 3/4] target/s390x: Fix LOCFHR taking the wrong half of R2

[David Hildenbrand]

On 26.05.23 20:12, Ilya Leoshkevich wrote:
> LOCFHR should write top-to-top, but QEMU erroneously writes
> bottom-to-top.
> 
> Fixes: 45aa9aa3b773 ("target/s390x: Implement load-on-condition-2 insns")
> Cc: qemu-stable@nongnu.org
> Reported-by: Mikhail Mitskevich <mitskevichmn@gmail.com>
> Closes: https://gitlab.com/qemu-project/qemu/-/issues/1668
> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
> ---
>   target/s390x/tcg/insn-data.h.inc | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc
> index e41672684aa..937e18ea9d9 100644
> --- a/target/s390x/tcg/insn-data.h.inc
> +++ b/target/s390x/tcg/insn-data.h.inc
> @@ -564,7 +564,7 @@
>       C(0xec46, LOCGHI,  RIE_g, LOC2, r1, i2, r1, 0, loc, 0)
>       C(0xec4e, LOCHHI,  RIE_g, LOC2, r1_sr32, i2, new, r1_32h, loc, 0)
>   /* LOAD HIGH ON CONDITION */
> -    C(0xb9e0, LOCFHR,  RRF_c, LOC2, r1_sr32, r2, new, r1_32h, loc, 0)
> +    C(0xb9e0, LOCFHR,  RRF_c, LOC2, r1_sr32, r2_sr32, new, r1_32h, loc, 0)
>       C(0xebe0, LOCFH,   RSY_b, LOC2, r1_sr32, m2_32u, new, r1_32h, loc, 0)
>   /* LOAD PAIR DISJOINT */
>       D(0xc804, LPD,     SSF,   ILA, 0, 0, new_P, r3_P32, lpd, 0, MO_TEUL)

Reviewed-by: David Hildenbrand <david@redhat.com>

-- 
Thanks,

David / dhildenb

Re: [PATCH 4/4] tests/tcg/s390x: Test LOCFHR

[David Hildenbrand]

On 26.05.23 20:12, Ilya Leoshkevich wrote:
> Add a small test to prevent regressions.
> 
> Cc: qemu-stable@nongnu.org
> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
> ---
>   tests/tcg/s390x/Makefile.target |  1 +
>   tests/tcg/s390x/locfhr.c        | 29 +++++++++++++++++++++++++++++
>   2 files changed, 30 insertions(+)
>   create mode 100644 tests/tcg/s390x/locfhr.c
> 
> diff --git a/tests/tcg/s390x/Makefile.target b/tests/tcg/s390x/Makefile.target
> index c48de439625..3c239fdd082 100644
> --- a/tests/tcg/s390x/Makefile.target
> +++ b/tests/tcg/s390x/Makefile.target
> @@ -48,6 +48,7 @@ TESTS += $(PGM_SPECIFICATION_TESTS)
>   
>   Z13_TESTS=vistr
>   Z13_TESTS+=lcbb
> +Z13_TESTS+=locfhr
>   $(Z13_TESTS): CFLAGS+=-march=z13 -O2
>   TESTS+=$(Z13_TESTS)
>   
> diff --git a/tests/tcg/s390x/locfhr.c b/tests/tcg/s390x/locfhr.c
> new file mode 100644
> index 00000000000..ab9ff6e4490
> --- /dev/null
> +++ b/tests/tcg/s390x/locfhr.c
> @@ -0,0 +1,29 @@
> +/*
> + * Test the LOCFHR instruction.
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +#include <assert.h>
> +#include <stdlib.h>
> +
> +static inline __attribute__((__always_inline__)) long
> +locfhr(long r1, long r2, int m3, int cc)
> +{
> +    cc <<= 28;
> +    asm("spm %[cc]\n"
> +        "locfhr %[r1],%[r2],%[m3]\n"
> +        : [r1] "+r" (r1)
> +        : [cc] "r" (cc), [r2] "r" (r2), [m3] "i" (m3)
> +        : "cc");
> +    return r1;
> +}
> +
> +int main(void)
> +{
> +    assert(locfhr(0x1111111122222222, 0x3333333344444444, 8, 0) ==
> +           0x3333333322222222);
> +    assert(locfhr(0x5555555566666666, 0x7777777788888888, 11, 1) ==
> +           0x5555555566666666);
> +
> +    return EXIT_SUCCESS;
> +}

Reviewed-by: David Hildenbrand <david@redhat.com>

-- 
Thanks,

David / dhildenb