From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, danielhb413@gmail.com,
peter.maydell@linaro.org, richard.henderson@linaro.org,
Nicholas Piggin <npiggin@gmail.com>,
Fabiano Rosas <farosas@suse.de>
Subject: [PULL 03/10] target/ppc: Alignment faults do not set DSISR in ISA v3.0 onward
Date: Sun, 28 May 2023 13:49:15 -0300 [thread overview]
Message-ID: <20230528164922.20364-4-danielhb413@gmail.com> (raw)
In-Reply-To: <20230528164922.20364-1-danielhb413@gmail.com>
From: Nicholas Piggin <npiggin@gmail.com>
This optional behavior was removed from the ISA in v3.0, see
Summary of Changes preface:
Data Storage Interrupt Status Register for Alignment Interrupt:
Simplifies the Alignment interrupt by remov- ing the Data Storage
Interrupt Status Register (DSISR) from the set of registers modified
by the Alignment interrupt.
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Message-Id: <20230515092655.171206-5-npiggin@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
target/ppc/excp_helper.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 199328f4b6..fea9221501 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -1431,13 +1431,16 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
break;
}
case POWERPC_EXCP_ALIGN: /* Alignment exception */
- /* Get rS/rD and rA from faulting opcode */
- /*
- * Note: the opcode fields will not be set properly for a
- * direct store load/store, but nobody cares as nobody
- * actually uses direct store segments.
- */
- env->spr[SPR_DSISR] |= (env->error_code & 0x03FF0000) >> 16;
+ /* Optional DSISR update was removed from ISA v3.0 */
+ if (!(env->insns_flags2 & PPC2_ISA300)) {
+ /* Get rS/rD and rA from faulting opcode */
+ /*
+ * Note: the opcode fields will not be set properly for a
+ * direct store load/store, but nobody cares as nobody
+ * actually uses direct store segments.
+ */
+ env->spr[SPR_DSISR] |= (env->error_code & 0x03FF0000) >> 16;
+ }
break;
case POWERPC_EXCP_PROGRAM: /* Program exception */
switch (env->error_code & ~0xF) {
--
2.40.1
next prev parent reply other threads:[~2023-05-28 16:51 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-28 16:49 [PULL 00/10] ppc queue Daniel Henrique Barboza
2023-05-28 16:49 ` [PULL 01/10] target/ppc: Fix fallback to MFSS for MFFS* instructions on pre 3.0 ISAs Daniel Henrique Barboza
2023-05-28 16:49 ` [PULL 02/10] target/ppc: Fix width of some 32-bit SPRs Daniel Henrique Barboza
2023-05-28 16:49 ` Daniel Henrique Barboza [this message]
2023-05-28 16:49 ` [PULL 04/10] spapr: Add SPAPR_CAP_AIL_MODE_3 for AIL mode 3 support for H_SET_MODE hcall Daniel Henrique Barboza
2023-05-28 16:49 ` [PULL 05/10] hw/ppc/prep: Fix wiring of PIC -> CPU interrupt Daniel Henrique Barboza
2023-05-28 16:49 ` [PULL 06/10] target/ppc: Use SMT4 small core chip type in POWER9/10 PVRs Daniel Henrique Barboza
2023-05-28 16:49 ` [PULL 07/10] pnv_lpc: disable reentrancy detection for lpc-hc Daniel Henrique Barboza
2023-05-28 16:49 ` [PULL 08/10] target/ppc: Merge COMPUTE_CLASS and COMPUTE_FPRF Daniel Henrique Barboza
2023-05-28 16:49 ` [PULL 09/10] target/ppc: Add POWER9 DD2.2 model Daniel Henrique Barboza
2023-05-28 16:49 ` [PULL 10/10] ppc/pegasos2: Change default CPU to 7457 Daniel Henrique Barboza
2023-05-28 17:36 ` [PULL 00/10] ppc queue Michael Tokarev
2023-05-29 2:18 ` Nicholas Piggin
2023-05-29 6:01 ` Michael Tokarev
2023-05-29 6:30 ` Nicholas Piggin
2023-05-29 7:00 ` Richard Purdie
2023-05-29 14:16 ` Michael Tokarev
2023-05-29 9:42 ` Daniel Henrique Barboza
2023-05-29 23:02 ` Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230528164922.20364-4-danielhb413@gmail.com \
--to=danielhb413@gmail.com \
--cc=farosas@suse.de \
--cc=npiggin@gmail.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).