From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, danielhb413@gmail.com,
peter.maydell@linaro.org, richard.henderson@linaro.org,
Bernhard Beschow <shentey@gmail.com>
Subject: [PULL 05/10] hw/ppc/prep: Fix wiring of PIC -> CPU interrupt
Date: Sun, 28 May 2023 13:49:17 -0300 [thread overview]
Message-ID: <20230528164922.20364-6-danielhb413@gmail.com> (raw)
In-Reply-To: <20230528164922.20364-1-danielhb413@gmail.com>
From: Bernhard Beschow <shentey@gmail.com>
Commit cef2e7148e32 ("hw/isa/i82378: Remove intermediate IRQ forwarder")
passes s->cpu_intr to i8259_init() in i82378_realize() directly. However, s-
>cpu_intr isn't initialized yet since that happens after the south bridge's
pci_realize_and_unref() in board code. Fix this by initializing s->cpu_intr
before realizing the south bridge.
Fixes: cef2e7148e32 ("hw/isa/i82378: Remove intermediate IRQ forwarder")
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20230304114043.121024-4-shentey@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
hw/ppc/prep.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index 4610abddbd..33bf232f8b 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -271,9 +271,11 @@ static void ibm_40p_init(MachineState *machine)
}
/* PCI -> ISA bridge */
- i82378_dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(11, 0), "i82378"));
+ i82378_dev = DEVICE(pci_new(PCI_DEVFN(11, 0), "i82378"));
qdev_connect_gpio_out(i82378_dev, 0,
qdev_get_gpio_in(DEVICE(cpu), PPC6xx_INPUT_INT));
+ qdev_realize_and_unref(i82378_dev, BUS(pci_bus), &error_fatal);
+
sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(i82378_dev, 15));
isa_bus = ISA_BUS(qdev_get_child_bus(i82378_dev, "isa.0"));
--
2.40.1
next prev parent reply other threads:[~2023-05-28 16:50 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-28 16:49 [PULL 00/10] ppc queue Daniel Henrique Barboza
2023-05-28 16:49 ` [PULL 01/10] target/ppc: Fix fallback to MFSS for MFFS* instructions on pre 3.0 ISAs Daniel Henrique Barboza
2023-05-28 16:49 ` [PULL 02/10] target/ppc: Fix width of some 32-bit SPRs Daniel Henrique Barboza
2023-05-28 16:49 ` [PULL 03/10] target/ppc: Alignment faults do not set DSISR in ISA v3.0 onward Daniel Henrique Barboza
2023-05-28 16:49 ` [PULL 04/10] spapr: Add SPAPR_CAP_AIL_MODE_3 for AIL mode 3 support for H_SET_MODE hcall Daniel Henrique Barboza
2023-05-28 16:49 ` Daniel Henrique Barboza [this message]
2023-05-28 16:49 ` [PULL 06/10] target/ppc: Use SMT4 small core chip type in POWER9/10 PVRs Daniel Henrique Barboza
2023-05-28 16:49 ` [PULL 07/10] pnv_lpc: disable reentrancy detection for lpc-hc Daniel Henrique Barboza
2023-05-28 16:49 ` [PULL 08/10] target/ppc: Merge COMPUTE_CLASS and COMPUTE_FPRF Daniel Henrique Barboza
2023-05-28 16:49 ` [PULL 09/10] target/ppc: Add POWER9 DD2.2 model Daniel Henrique Barboza
2023-05-28 16:49 ` [PULL 10/10] ppc/pegasos2: Change default CPU to 7457 Daniel Henrique Barboza
2023-05-28 17:36 ` [PULL 00/10] ppc queue Michael Tokarev
2023-05-29 2:18 ` Nicholas Piggin
2023-05-29 6:01 ` Michael Tokarev
2023-05-29 6:30 ` Nicholas Piggin
2023-05-29 7:00 ` Richard Purdie
2023-05-29 14:16 ` Michael Tokarev
2023-05-29 9:42 ` Daniel Henrique Barboza
2023-05-29 23:02 ` Richard Henderson
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