From: Nicholas Piggin <npiggin@gmail.com>
To: qemu-ppc@nongnu.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
qemu-devel@nongnu.org,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: [RFC PATCH 0/5] target/ppc: initial SMT support in TCG
Date: Wed, 31 May 2023 11:23:08 +1000 [thread overview]
Message-ID: <20230531012313.19891-1-npiggin@gmail.com> (raw)
Hi,
I'm posting this now just to get some first thoughts. I wouldn't say
it's ready but it does actually work with some basic tests including
pseries booting a Linux distro. I have powernv booting too, it just
requires some more SPRs converted, nothing fundamentally different so
for the purpose of this RFC I leave it out.
A couple of things, I don't know the object model well enough to do
something nice with topology. Iterating siblings I would have thought
should be going to parent core then iterating its children CPUs. Should
that be done with the object model, or is it better to add direct
pointers in CPUs to core and core to CPUs? It is (semi) important for
performance so maybe that is better than object iterators. If we go that
way, the PnvCore and SpaprCore have pointers to the SMT threads already,
should those be abstracted go in the CPUCore?
The other thing is the serialisation of access. It's using the atomic
single stepping for this which... I guess should be sufficient? Is it
the best way to do it though? Can a lock be used somehow instead?
Thanks,
Nick
Nicholas Piggin (5):
target/ppc: gdbstub init spr gdb_id for all CPUs
target/ppc: Add initial flags and helpers for SMT support
target/ppc: Add support for SMT CTRL register
target/ppc: Add msgsnd/p and DPDES SMT support
spapr: Allow up to 8 threads SMT configuration
hw/ppc/ppc.c | 6 ++
hw/ppc/spapr.c | 4 +-
hw/ppc/spapr_cpu_core.c | 7 +-
include/hw/ppc/ppc.h | 1 +
target/ppc/cpu.h | 16 +++-
target/ppc/cpu_init.c | 5 +
target/ppc/excp_helper.c | 86 ++++++++++++-----
target/ppc/gdbstub.c | 32 ++++---
target/ppc/helper.h | 4 +-
target/ppc/misc_helper.c | 93 +++++++++++++++++--
target/ppc/translate.c | 46 ++++++++-
.../ppc/translate/processor-ctrl-impl.c.inc | 2 +-
12 files changed, 252 insertions(+), 50 deletions(-)
--
2.40.1
next reply other threads:[~2023-05-31 1:24 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-31 1:23 Nicholas Piggin [this message]
2023-05-31 1:23 ` [RFC PATCH 1/5] target/ppc: gdbstub init spr gdb_id for all CPUs Nicholas Piggin
2023-05-31 5:49 ` Philippe Mathieu-Daudé
2023-06-23 9:26 ` Cédric Le Goater
2023-05-31 1:23 ` [RFC PATCH 2/5] target/ppc: Add initial flags and helpers for SMT support Nicholas Piggin
2023-05-31 7:25 ` Cédric Le Goater
2023-06-02 6:54 ` Nicholas Piggin
2023-05-31 1:23 ` [RFC PATCH 3/5] target/ppc: Add support for SMT CTRL register Nicholas Piggin
2023-05-31 1:23 ` [RFC PATCH 4/5] target/ppc: Add msgsnd/p and DPDES SMT support Nicholas Piggin
2023-06-01 7:13 ` Cédric Le Goater
2023-06-02 6:56 ` Nicholas Piggin
2023-05-31 1:23 ` [RFC PATCH 5/5] spapr: Allow up to 8 threads SMT configuration Nicholas Piggin
2023-06-01 7:20 ` Cédric Le Goater
2023-06-02 6:59 ` Nicholas Piggin
2023-06-02 7:04 ` Cédric Le Goater
2023-06-05 10:29 ` Nicholas Piggin
2023-06-01 7:56 ` [RFC PATCH 0/5] target/ppc: initial SMT support in TCG Cédric Le Goater
2023-06-02 7:01 ` Nicholas Piggin
2023-06-02 7:21 ` Cédric Le Goater
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