From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH 00/20] target/arm: Convert exception, system, loads and stores to decodetree
Date: Fri, 2 Jun 2023 16:52:03 +0100 [thread overview]
Message-ID: <20230602155223.2040685-1-peter.maydell@linaro.org> (raw)
This patchseries does more of the conversion of the A64 decoder to
decodetree. It covers the exception-generation, system, load and
store instructions.
After this the remaining legacy decoder pieces are:
* data-processing (register)
* data-processing (SIMD)
* data-processing (floating-point)
I plan to take a break from conversion after this series to work on
FEAT_MOPS, but want to come back to the dp-register parts for this
release cycle. The FP/SIMD stuff is a bigger job and I'm inclined to
leave it for the moment.
I include the LDSMIN/LDSMAX bugfix as patch 1 to avoid a conflict
later. Speaking of conflicts, this is going to conflict with RTH's
LSE2 series, which I expect to get in to the tree first, but I'm
hoping the rebase of this series won't be too painful.
thanks
-- PMM
Peter Maydell (20):
target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics
target/arm: Convert hint instruction space to decodetree
target/arm: Convert barrier insns to decodetree
target/arm: Convert CFINV, XAFLAG and AXFLAG to decodetree
target/arm: Convert MSR (immediate) to decodetree
target/arm: Convert MSR (reg), MRS, SYS, SYSL to decodetree
target/arm: Convert exception generation instructions to decodetree
target/arm: Convert load/store exclusive and ordered to decodetree
target/arm: Convert LDXP, STXP, CASP, CAS to decodetree
target/arm: Convert load reg (literal) group to decodetree
target/arm: Convert load/store-pair to decodetree
target/arm: Convert ld/st reg+imm9 insns to decodetree
target/arm: Convert LDR/STR with 12-bit immediate to decodetree
target/arm: Convert LDR/STR reg+reg to decodetree
target/arm: Convert atomic memory ops to decodetree
target/arm: Convert load (pointer auth) insns to decodetree
target/arm: Convert LDAPR/STLR (imm) to decodetree
target/arm: Convert load/store (multiple structures) to decodetree
target/arm: Convert load/store single structure to decodetree
target/arm: Convert load/store tags insns to decodetree
target/arm/tcg/a64.decode | 406 ++++
target/arm/tcg/translate-a64.c | 3183 ++++++++++++++------------------
2 files changed, 1801 insertions(+), 1788 deletions(-)
--
2.34.1
next reply other threads:[~2023-06-02 15:53 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-02 15:52 Peter Maydell [this message]
2023-06-02 15:52 ` [PATCH 01/20] target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomics Peter Maydell
2023-06-03 5:35 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 02/20] target/arm: Convert hint instruction space to decodetree Peter Maydell
2023-06-03 5:42 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 03/20] target/arm: Convert barrier insns " Peter Maydell
2023-06-03 5:48 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 04/20] target/arm: Convert CFINV, XAFLAG and AXFLAG " Peter Maydell
2023-06-03 5:55 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 05/20] target/arm: Convert MSR (immediate) " Peter Maydell
2023-06-03 6:01 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 06/20] target/arm: Convert MSR (reg), MRS, SYS, SYSL " Peter Maydell
2023-06-03 6:05 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 07/20] target/arm: Convert exception generation instructions " Peter Maydell
2023-06-03 6:09 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 08/20] target/arm: Convert load/store exclusive and ordered " Peter Maydell
2023-06-03 22:32 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 09/20] target/arm: Convert LDXP, STXP, CASP, CAS " Peter Maydell
2023-06-03 22:44 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 10/20] target/arm: Convert load reg (literal) group " Peter Maydell
2023-06-03 22:49 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 11/20] target/arm: Convert load/store-pair " Peter Maydell
2023-06-03 23:05 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 12/20] target/arm: Convert ld/st reg+imm9 insns " Peter Maydell
2023-06-03 23:14 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 13/20] target/arm: Convert LDR/STR with 12-bit immediate " Peter Maydell
2023-06-02 20:51 ` Philippe Mathieu-Daudé
2023-06-03 16:18 ` Peter Maydell
2023-06-03 23:19 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 14/20] target/arm: Convert LDR/STR reg+reg " Peter Maydell
2023-06-03 23:27 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 15/20] target/arm: Convert atomic memory ops " Peter Maydell
2023-06-03 23:35 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 16/20] target/arm: Convert load (pointer auth) insns " Peter Maydell
2023-06-02 20:56 ` Philippe Mathieu-Daudé
2023-06-03 23:41 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 17/20] target/arm: Convert LDAPR/STLR (imm) " Peter Maydell
2023-06-03 23:55 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 18/20] target/arm: Convert load/store (multiple structures) " Peter Maydell
2023-06-04 0:00 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 19/20] target/arm: Convert load/store single structure " Peter Maydell
2023-06-04 1:27 ` Richard Henderson
2023-06-02 15:52 ` [PATCH 20/20] target/arm: Convert load/store tags insns " Peter Maydell
2023-06-04 1:36 ` Richard Henderson
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