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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Anton Johansson <anjo@rev.ng>
Subject: [PULL 01/52] tcg/ppc: Remove TARGET_LONG_BITS, TCG_TYPE_TL
Date: Mon,  5 Jun 2023 13:14:57 -0700	[thread overview]
Message-ID: <20230605201548.1596865-2-richard.henderson@linaro.org> (raw)
In-Reply-To: <20230605201548.1596865-1-richard.henderson@linaro.org>

All uses replaced with TCGContext.addr_type.

Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/ppc/tcg-target.c.inc | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index d47a9e3478..11955a6cc2 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -2046,6 +2046,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
                                            TCGReg addrlo, TCGReg addrhi,
                                            MemOpIdx oi, bool is_ld)
 {
+    TCGType addr_type = s->addr_type;
     TCGLabelQemuLdst *ldst = NULL;
     MemOp opc = get_memop(oi);
     MemOp a_bits, s_bits;
@@ -2098,17 +2099,18 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
     tcg_out32(s, AND | SAB(TCG_REG_TMP1, TCG_REG_TMP1, TCG_REG_R0));
 
     /* Load the (low part) TLB comparator into TMP2.  */
-    if (cmp_off == 0 && TCG_TARGET_REG_BITS >= TARGET_LONG_BITS) {
-        uint32_t lxu = (TCG_TARGET_REG_BITS == 32 || TARGET_LONG_BITS == 32
+    if (cmp_off == 0
+        && (TCG_TARGET_REG_BITS == 64 || addr_type == TCG_TYPE_I32)) {
+        uint32_t lxu = (TCG_TARGET_REG_BITS == 32 || addr_type == TCG_TYPE_I32
                         ? LWZUX : LDUX);
         tcg_out32(s, lxu | TAB(TCG_REG_TMP2, TCG_REG_TMP1, TCG_REG_TMP2));
     } else {
         tcg_out32(s, ADD | TAB(TCG_REG_TMP1, TCG_REG_TMP1, TCG_REG_TMP2));
-        if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) {
+        if (TCG_TARGET_REG_BITS == 32 && addr_type != TCG_TYPE_I32) {
             tcg_out_ld(s, TCG_TYPE_I32, TCG_REG_TMP2,
                        TCG_REG_TMP1, cmp_off + 4 * HOST_BIG_ENDIAN);
         } else {
-            tcg_out_ld(s, TCG_TYPE_TL, TCG_REG_TMP2, TCG_REG_TMP1, cmp_off);
+            tcg_out_ld(s, addr_type, TCG_REG_TMP2, TCG_REG_TMP1, cmp_off);
         }
     }
 
@@ -2116,7 +2118,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
      * Load the TLB addend for use on the fast path.
      * Do this asap to minimize any load use delay.
      */
-    if (TCG_TARGET_REG_BITS >= TARGET_LONG_BITS) {
+    if (TCG_TARGET_REG_BITS == 64 || addr_type == TCG_TYPE_I32) {
         tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_REG_TMP1,
                    offsetof(CPUTLBEntry, addend));
     }
@@ -2151,7 +2153,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
         }
 
         /* Mask the address for the requested alignment.  */
-        if (TARGET_LONG_BITS == 32) {
+        if (addr_type == TCG_TYPE_I32) {
             tcg_out_rlw(s, RLWINM, TCG_REG_R0, t, 0,
                         (32 - a_bits) & 31, 31 - s->page_bits);
         } else if (a_bits == 0) {
@@ -2163,7 +2165,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
         }
     }
 
-    if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) {
+    if (TCG_TARGET_REG_BITS == 32 && addr_type != TCG_TYPE_I32) {
         /* Low part comparison into cr7. */
         tcg_out_cmp(s, TCG_COND_EQ, TCG_REG_R0, TCG_REG_TMP2,
                     0, 7, TCG_TYPE_I32);
@@ -2183,8 +2185,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
         tcg_out32(s, CRAND | BT(7, CR_EQ) | BA(6, CR_EQ) | BB(7, CR_EQ));
     } else {
         /* Full comparison into cr7. */
-        tcg_out_cmp(s, TCG_COND_EQ, TCG_REG_R0, TCG_REG_TMP2,
-                    0, 7, TCG_TYPE_TL);
+        tcg_out_cmp(s, TCG_COND_EQ, TCG_REG_R0, TCG_REG_TMP2, 0, 7, addr_type);
     }
 
     /* Load a pointer into the current opcode w/conditional branch-link. */
@@ -2211,7 +2212,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
     h->base = guest_base ? TCG_GUEST_BASE_REG : 0;
 #endif
 
-    if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
+    if (TCG_TARGET_REG_BITS == 64 && addr_type == TCG_TYPE_I32) {
         /* Zero-extend the guest address for use in the host address. */
         tcg_out_ext32u(s, TCG_REG_R0, addrlo);
         h->index = TCG_REG_R0;
-- 
2.34.1



  reply	other threads:[~2023-06-05 20:16 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-05 20:14 [PULL 00/52] tcg patch queue Richard Henderson
2023-06-05 20:14 ` Richard Henderson [this message]
2023-06-05 20:14 ` [PULL 02/52] tcg/riscv: Remove TARGET_LONG_BITS, TCG_TYPE_TL Richard Henderson
2023-06-05 20:14 ` [PULL 03/52] tcg/s390x: " Richard Henderson
2023-06-05 20:15 ` [PULL 04/52] tcg/sparc64: " Richard Henderson
2023-06-05 20:15 ` [PULL 05/52] tcg: Move TCG_TYPE_TL from tcg.h to tcg-op.h Richard Henderson
2023-06-05 20:15 ` [PULL 06/52] tcg: Widen CPUTLBEntry comparators to 64-bits Richard Henderson
2023-06-05 20:15 ` [PULL 07/52] tcg: Add tlb_fast_offset to TCGContext Richard Henderson
2023-06-05 20:15 ` [PULL 08/52] target/avr: Add missing includes of qemu/error-report.h Richard Henderson
2023-06-05 20:15 ` [PULL 09/52] target/*: Add missing includes of tcg/debug-assert.h Richard Henderson
2023-06-05 20:15 ` [PULL 10/52] *: Add missing includes of tcg/tcg.h Richard Henderson
2023-06-05 20:15 ` [PULL 11/52] tcg: Split out tcg-target-reg-bits.h Richard Henderson
2023-06-05 20:15 ` [PULL 12/52] target/arm: Fix test of TCG_OVERSIZED_GUEST Richard Henderson
2023-06-05 20:15 ` [PULL 13/52] tcg: Split out tcg/oversized-guest.h Richard Henderson
2023-06-05 20:15 ` [PULL 14/52] tcg: Move TCGv, dup_const_tl definitions to tcg-op.h Richard Henderson
2023-06-05 20:15 ` [PULL 15/52] tcg: Split tcg/tcg-op-common.h from tcg/tcg-op.h Richard Henderson
2023-06-05 20:15 ` [PULL 16/52] target/arm: Include helper-gen.h in translator.h Richard Henderson
2023-06-05 20:15 ` [PULL 17/52] target/hexagon: Include helper-gen.h where needed Richard Henderson
2023-06-05 20:15 ` [PULL 18/52] tcg: Remove outdated comments in helper-head.h Richard Henderson
2023-06-05 20:15 ` [PULL 19/52] tcg: Move TCGHelperInfo and dependencies to tcg/helper-info.h Richard Henderson
2023-06-05 20:15 ` [PULL 20/52] tcg: Pass TCGHelperInfo to tcg_gen_callN Richard Henderson
2023-06-05 20:15 ` [PULL 21/52] tcg: Move temp_idx and tcgv_i32_temp debug out of line Richard Henderson
2023-06-05 20:15 ` [PULL 22/52] tcg: Split tcg_gen_callN Richard Henderson
2023-06-05 20:15 ` [PULL 23/52] tcg: Split helper-gen.h Richard Henderson
2023-06-05 20:15 ` [PULL 24/52] tcg: Split helper-proto.h Richard Henderson
2023-06-05 20:15 ` [PULL 25/52] target/sh4: Emit insn_start for each insn in gUSA region Richard Henderson
2023-06-05 20:15 ` [PULL 26/52] tcg: Add insn_start_words to TCGContext Richard Henderson
2023-06-05 20:15 ` [PULL 27/52] tcg: Add guest_mo " Richard Henderson
2023-06-05 20:15 ` [PULL 28/52] tcg: Move TLB_FLAGS_MASK check out of get_alignment_bits Richard Henderson
2023-06-05 20:15 ` [PULL 29/52] tcg: Split tcg/tcg-op-gvec.h Richard Henderson
2023-06-05 20:15 ` [PULL 30/52] tcg: Remove NO_CPU_IO_DEFS Richard Henderson
2023-06-05 20:15 ` [PULL 31/52] exec-all: Widen tb_page_addr_t for user-only Richard Henderson
2023-06-05 20:15 ` [PULL 32/52] exec-all: Widen TranslationBlock pc and cs_base to 64-bits Richard Henderson
2023-07-11 16:42   ` Peter Maydell
2023-06-05 20:15 ` [PULL 33/52] tcg: Spit out exec/translation-block.h Richard Henderson
2023-06-05 20:15 ` [PULL 34/52] include/exec: Remove CODE_GEN_AVG_BLOCK_SIZE Richard Henderson
2023-06-05 20:15 ` [PULL 35/52] accel/tcg: Move most of gen-icount.h into translator.c Richard Henderson
2023-06-05 20:15 ` [PULL 36/52] accel/tcg: Introduce translator_io_start Richard Henderson
2023-06-05 20:15 ` [PULL 37/52] target/ppc: Inline gen_icount_io_start() Richard Henderson
2023-06-05 20:15 ` [PULL 38/52] accel/tcg: Move translator_fake_ldb out of line Richard Henderson
2023-06-05 20:15 ` [PULL 39/52] target/arm: Tidy helpers for translation Richard Henderson
2023-06-05 20:15 ` [PULL 40/52] target/mips: " Richard Henderson
2023-06-05 20:15 ` [PULL 41/52] target/*: Add missing includes of exec/translation-block.h Richard Henderson
2023-06-05 20:15 ` [PULL 42/52] target/arm: Add missing include of exec/exec-all.h Richard Henderson
2023-06-05 20:15 ` [PULL 43/52] accel/tcg: Tidy includes for translator.[ch] Richard Henderson
2023-06-05 20:15 ` [PULL 44/52] tcg: Fix PAGE/PROT confusion Richard Henderson
2023-06-05 20:15 ` [PULL 45/52] tcg: Move env defines out of NEED_CPU_H in helper-head.h Richard Henderson
2023-06-05 20:15 ` [PULL 46/52] tcg: Remove target-specific headers from tcg.[ch] Richard Henderson
2023-06-05 20:15 ` [PULL 47/52] plugins: Move plugin_insn_append to translator.c Richard Henderson
2023-06-05 20:15 ` [PULL 48/52] plugins: Drop unused headers from exec/plugin-gen.h Richard Henderson
2023-06-05 20:15 ` [PULL 49/52] exec/poison: Do not poison CONFIG_SOFTMMU Richard Henderson
2023-06-20 18:01   ` Peter Maydell
2023-06-21  5:12     ` Richard Henderson
2023-06-05 20:15 ` [PULL 50/52] tcg: Build once for system and once for user-only Richard Henderson
2023-06-05 20:15 ` [PULL 51/52] accel/tcg: Unmap perf_marker Richard Henderson
2023-06-05 20:15 ` [PULL 52/52] tcg/tcg-op-vec: Remove left over _link_error() definitions Richard Henderson
2023-06-05 21:37 ` [PULL 00/52] tcg patch queue Richard Henderson

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