* [PATCH] mv64361: Add dummy gigabit ethernet PHY access registers
@ 2023-06-05 21:51 BALATON Zoltan
2023-06-14 19:21 ` BALATON Zoltan
0 siblings, 1 reply; 7+ messages in thread
From: BALATON Zoltan @ 2023-06-05 21:51 UTC (permalink / raw)
To: qemu-devel, qemu-ppc; +Cc: Daniel Henrique Barboza
We don't emulate the gigabit ethernet part of the chip but the MorphOS
driver accesses these and expects to get some valid looking result
otherwise it hangs. Add some minimal dummy implementation to avoid rhis.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
This is only used by MorphOS on pegasos2 so most likely could go via
the ppc queue.
hw/pci-host/mv64361.c | 6 ++++++
hw/pci-host/mv643xx.h | 3 +++
2 files changed, 9 insertions(+)
diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
index 19e8031a3f..01bd8c887f 100644
--- a/hw/pci-host/mv64361.c
+++ b/hw/pci-host/mv64361.c
@@ -541,6 +541,12 @@ static uint64_t mv64361_read(void *opaque, hwaddr addr, unsigned int size)
}
}
break;
+ case MV64340_ETH_PHY_ADDR:
+ ret = 0x98;
+ break;
+ case MV64340_ETH_SMI:
+ ret = BIT(27);
+ break;
case MV64340_CUNIT_ARBITER_CONTROL_REG:
ret = 0x11ff0000 | (s->gpp_int_level << 10);
break;
diff --git a/hw/pci-host/mv643xx.h b/hw/pci-host/mv643xx.h
index cd26a43f18..f2e1baea88 100644
--- a/hw/pci-host/mv643xx.h
+++ b/hw/pci-host/mv643xx.h
@@ -656,6 +656,9 @@
/* Ethernet Unit Registers */
/****************************************/
+#define MV64340_ETH_PHY_ADDR 0x2000
+#define MV64340_ETH_SMI 0x2004
+
/*******************************************/
/* CUNIT Registers */
/*******************************************/
--
2.30.9
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH] mv64361: Add dummy gigabit ethernet PHY access registers
2023-06-05 21:51 [PATCH] mv64361: Add dummy gigabit ethernet PHY access registers BALATON Zoltan
@ 2023-06-14 19:21 ` BALATON Zoltan
2023-06-21 12:34 ` BALATON Zoltan
2023-06-30 16:44 ` Daniel Henrique Barboza
0 siblings, 2 replies; 7+ messages in thread
From: BALATON Zoltan @ 2023-06-14 19:21 UTC (permalink / raw)
To: qemu-devel, qemu-ppc; +Cc: Daniel Henrique Barboza
On Mon, 5 Jun 2023, BALATON Zoltan wrote:
> We don't emulate the gigabit ethernet part of the chip but the MorphOS
> driver accesses these and expects to get some valid looking result
> otherwise it hangs. Add some minimal dummy implementation to avoid rhis.
>
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> ---
> This is only used by MorphOS on pegasos2 so most likely could go via
> the ppc queue.
Ping?
Regards,
BALATON Zoltan
> hw/pci-host/mv64361.c | 6 ++++++
> hw/pci-host/mv643xx.h | 3 +++
> 2 files changed, 9 insertions(+)
>
> diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
> index 19e8031a3f..01bd8c887f 100644
> --- a/hw/pci-host/mv64361.c
> +++ b/hw/pci-host/mv64361.c
> @@ -541,6 +541,12 @@ static uint64_t mv64361_read(void *opaque, hwaddr addr, unsigned int size)
> }
> }
> break;
> + case MV64340_ETH_PHY_ADDR:
> + ret = 0x98;
> + break;
> + case MV64340_ETH_SMI:
> + ret = BIT(27);
> + break;
> case MV64340_CUNIT_ARBITER_CONTROL_REG:
> ret = 0x11ff0000 | (s->gpp_int_level << 10);
> break;
> diff --git a/hw/pci-host/mv643xx.h b/hw/pci-host/mv643xx.h
> index cd26a43f18..f2e1baea88 100644
> --- a/hw/pci-host/mv643xx.h
> +++ b/hw/pci-host/mv643xx.h
> @@ -656,6 +656,9 @@
> /* Ethernet Unit Registers */
> /****************************************/
>
> +#define MV64340_ETH_PHY_ADDR 0x2000
> +#define MV64340_ETH_SMI 0x2004
> +
> /*******************************************/
> /* CUNIT Registers */
> /*******************************************/
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] mv64361: Add dummy gigabit ethernet PHY access registers
2023-06-14 19:21 ` BALATON Zoltan
@ 2023-06-21 12:34 ` BALATON Zoltan
2023-06-29 8:36 ` BALATON Zoltan
2023-06-30 16:44 ` Daniel Henrique Barboza
1 sibling, 1 reply; 7+ messages in thread
From: BALATON Zoltan @ 2023-06-21 12:34 UTC (permalink / raw)
To: qemu-devel, qemu-ppc; +Cc: Daniel Henrique Barboza
On Wed, 14 Jun 2023, BALATON Zoltan wrote:
> On Mon, 5 Jun 2023, BALATON Zoltan wrote:
>> We don't emulate the gigabit ethernet part of the chip but the MorphOS
>> driver accesses these and expects to get some valid looking result
>> otherwise it hangs. Add some minimal dummy implementation to avoid rhis.
>>
>> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
>> ---
>> This is only used by MorphOS on pegasos2 so most likely could go via
>> the ppc queue.
>
> Ping?
Ping?
> Regards,
> BALATON Zoltan
>
>> hw/pci-host/mv64361.c | 6 ++++++
>> hw/pci-host/mv643xx.h | 3 +++
>> 2 files changed, 9 insertions(+)
>>
>> diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
>> index 19e8031a3f..01bd8c887f 100644
>> --- a/hw/pci-host/mv64361.c
>> +++ b/hw/pci-host/mv64361.c
>> @@ -541,6 +541,12 @@ static uint64_t mv64361_read(void *opaque, hwaddr
>> addr, unsigned int size)
>> }
>> }
>> break;
>> + case MV64340_ETH_PHY_ADDR:
>> + ret = 0x98;
>> + break;
>> + case MV64340_ETH_SMI:
>> + ret = BIT(27);
>> + break;
>> case MV64340_CUNIT_ARBITER_CONTROL_REG:
>> ret = 0x11ff0000 | (s->gpp_int_level << 10);
>> break;
>> diff --git a/hw/pci-host/mv643xx.h b/hw/pci-host/mv643xx.h
>> index cd26a43f18..f2e1baea88 100644
>> --- a/hw/pci-host/mv643xx.h
>> +++ b/hw/pci-host/mv643xx.h
>> @@ -656,6 +656,9 @@
>> /* Ethernet Unit Registers */
>> /****************************************/
>>
>> +#define MV64340_ETH_PHY_ADDR 0x2000
>> +#define MV64340_ETH_SMI 0x2004
>> +
>> /*******************************************/
>> /* CUNIT Registers */
>> /*******************************************/
>>
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] mv64361: Add dummy gigabit ethernet PHY access registers
2023-06-21 12:34 ` BALATON Zoltan
@ 2023-06-29 8:36 ` BALATON Zoltan
2023-06-29 11:04 ` Cédric Le Goater
2023-06-30 14:22 ` Daniel Henrique Barboza
0 siblings, 2 replies; 7+ messages in thread
From: BALATON Zoltan @ 2023-06-29 8:36 UTC (permalink / raw)
To: qemu-devel, qemu-ppc; +Cc: Daniel Henrique Barboza, Cédric Le Goater
On Wed, 21 Jun 2023, BALATON Zoltan wrote:
> On Wed, 14 Jun 2023, BALATON Zoltan wrote:
>> On Mon, 5 Jun 2023, BALATON Zoltan wrote:
>>> We don't emulate the gigabit ethernet part of the chip but the MorphOS
>>> driver accesses these and expects to get some valid looking result
>>> otherwise it hangs. Add some minimal dummy implementation to avoid rhis.
>>>
>>> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
>>> ---
>>> This is only used by MorphOS on pegasos2 so most likely could go via
>>> the ppc queue.
>>
>> Ping?
>
> Ping?
Ping?
https://patchew.org/QEMU/20230605215145.29458746335@zero.eik.bme.hu/
It's unlikely this will get a review so can you please just merge it? It's
my code so if I break it I'll fix it but this was tested a bit and no
problem reported so far.
Regards,
BALATON Zoltan
>>> hw/pci-host/mv64361.c | 6 ++++++
>>> hw/pci-host/mv643xx.h | 3 +++
>>> 2 files changed, 9 insertions(+)
>>>
>>> diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
>>> index 19e8031a3f..01bd8c887f 100644
>>> --- a/hw/pci-host/mv64361.c
>>> +++ b/hw/pci-host/mv64361.c
>>> @@ -541,6 +541,12 @@ static uint64_t mv64361_read(void *opaque, hwaddr
>>> addr, unsigned int size)
>>> }
>>> }
>>> break;
>>> + case MV64340_ETH_PHY_ADDR:
>>> + ret = 0x98;
>>> + break;
>>> + case MV64340_ETH_SMI:
>>> + ret = BIT(27);
>>> + break;
>>> case MV64340_CUNIT_ARBITER_CONTROL_REG:
>>> ret = 0x11ff0000 | (s->gpp_int_level << 10);
>>> break;
>>> diff --git a/hw/pci-host/mv643xx.h b/hw/pci-host/mv643xx.h
>>> index cd26a43f18..f2e1baea88 100644
>>> --- a/hw/pci-host/mv643xx.h
>>> +++ b/hw/pci-host/mv643xx.h
>>> @@ -656,6 +656,9 @@
>>> /* Ethernet Unit Registers */
>>> /****************************************/
>>>
>>> +#define MV64340_ETH_PHY_ADDR
>>> 0x2000
>>> +#define MV64340_ETH_SMI
>>> 0x2004
>>> +
>>> /*******************************************/
>>> /* CUNIT Registers */
>>> /*******************************************/
>>>
>>
>>
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] mv64361: Add dummy gigabit ethernet PHY access registers
2023-06-29 8:36 ` BALATON Zoltan
@ 2023-06-29 11:04 ` Cédric Le Goater
2023-06-30 14:22 ` Daniel Henrique Barboza
1 sibling, 0 replies; 7+ messages in thread
From: Cédric Le Goater @ 2023-06-29 11:04 UTC (permalink / raw)
To: BALATON Zoltan, qemu-devel, qemu-ppc; +Cc: Daniel Henrique Barboza
On 6/29/23 10:36, BALATON Zoltan wrote:
> On Wed, 21 Jun 2023, BALATON Zoltan wrote:
>> On Wed, 14 Jun 2023, BALATON Zoltan wrote:
>>> On Mon, 5 Jun 2023, BALATON Zoltan wrote:
>>>> We don't emulate the gigabit ethernet part of the chip but the MorphOS
>>>> driver accesses these and expects to get some valid looking result
>>>> otherwise it hangs. Add some minimal dummy implementation to avoid rhis.
>>>>
>>>> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
>>>> ---
>>>> This is only used by MorphOS on pegasos2 so most likely could go via
>>>> the ppc queue.
>>>
>>> Ping?
>>
>> Ping?
>
> Ping?
> https://patchew.org/QEMU/20230605215145.29458746335@zero.eik.bme.hu/
> It's unlikely this will get a review so can you please just merge it? It's my code so if I break it I'll fix it but this was tested a bit and no problem reported so far.
Acked-by: Cédric Le Goater <clg@kaod.org>
Thanks,
C.
>
> Regards,
> BALATON Zoltan
>
>>>> hw/pci-host/mv64361.c | 6 ++++++
>>>> hw/pci-host/mv643xx.h | 3 +++
>>>> 2 files changed, 9 insertions(+)
>>>>
>>>> diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
>>>> index 19e8031a3f..01bd8c887f 100644
>>>> --- a/hw/pci-host/mv64361.c
>>>> +++ b/hw/pci-host/mv64361.c
>>>> @@ -541,6 +541,12 @@ static uint64_t mv64361_read(void *opaque, hwaddr addr, unsigned int size)
>>>> }
>>>> }
>>>> break;
>>>> + case MV64340_ETH_PHY_ADDR:
>>>> + ret = 0x98;
>>>> + break;
>>>> + case MV64340_ETH_SMI:
>>>> + ret = BIT(27);
>>>> + break;
>>>> case MV64340_CUNIT_ARBITER_CONTROL_REG:
>>>> ret = 0x11ff0000 | (s->gpp_int_level << 10);
>>>> break;
>>>> diff --git a/hw/pci-host/mv643xx.h b/hw/pci-host/mv643xx.h
>>>> index cd26a43f18..f2e1baea88 100644
>>>> --- a/hw/pci-host/mv643xx.h
>>>> +++ b/hw/pci-host/mv643xx.h
>>>> @@ -656,6 +656,9 @@
>>>> /* Ethernet Unit Registers */
>>>> /****************************************/
>>>>
>>>> +#define MV64340_ETH_PHY_ADDR 0x2000
>>>> +#define MV64340_ETH_SMI 0x2004
>>>> +
>>>> /*******************************************/
>>>> /* CUNIT Registers */
>>>> /*******************************************/
>>>>
>>>
>>>
>>
>>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] mv64361: Add dummy gigabit ethernet PHY access registers
2023-06-29 8:36 ` BALATON Zoltan
2023-06-29 11:04 ` Cédric Le Goater
@ 2023-06-30 14:22 ` Daniel Henrique Barboza
1 sibling, 0 replies; 7+ messages in thread
From: Daniel Henrique Barboza @ 2023-06-30 14:22 UTC (permalink / raw)
To: BALATON Zoltan, qemu-devel, qemu-ppc; +Cc: Cédric Le Goater
On 6/29/23 05:36, BALATON Zoltan wrote:
> On Wed, 21 Jun 2023, BALATON Zoltan wrote:
>> On Wed, 14 Jun 2023, BALATON Zoltan wrote:
>>> On Mon, 5 Jun 2023, BALATON Zoltan wrote:
>>>> We don't emulate the gigabit ethernet part of the chip but the MorphOS
>>>> driver accesses these and expects to get some valid looking result
>>>> otherwise it hangs. Add some minimal dummy implementation to avoid rhis.
>>>>
>>>> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
>>>> ---
>>>> This is only used by MorphOS on pegasos2 so most likely could go via
>>>> the ppc queue.
>>>
>>> Ping?
>>
>> Ping?
>
> Ping?
> https://patchew.org/QEMU/20230605215145.29458746335@zero.eik.bme.hu/
> It's unlikely this will get a review so can you please just merge it? It's my code so if I break it I'll fix it but this was tested a bit and no problem reported so far.
>
Don't worry about it. I'll queue this up.
Daniel
> Regards,
> BALATON Zoltan
>
>>>> hw/pci-host/mv64361.c | 6 ++++++
>>>> hw/pci-host/mv643xx.h | 3 +++
>>>> 2 files changed, 9 insertions(+)
>>>>
>>>> diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
>>>> index 19e8031a3f..01bd8c887f 100644
>>>> --- a/hw/pci-host/mv64361.c
>>>> +++ b/hw/pci-host/mv64361.c
>>>> @@ -541,6 +541,12 @@ static uint64_t mv64361_read(void *opaque, hwaddr addr, unsigned int size)
>>>> }
>>>> }
>>>> break;
>>>> + case MV64340_ETH_PHY_ADDR:
>>>> + ret = 0x98;
>>>> + break;
>>>> + case MV64340_ETH_SMI:
>>>> + ret = BIT(27);
>>>> + break;
>>>> case MV64340_CUNIT_ARBITER_CONTROL_REG:
>>>> ret = 0x11ff0000 | (s->gpp_int_level << 10);
>>>> break;
>>>> diff --git a/hw/pci-host/mv643xx.h b/hw/pci-host/mv643xx.h
>>>> index cd26a43f18..f2e1baea88 100644
>>>> --- a/hw/pci-host/mv643xx.h
>>>> +++ b/hw/pci-host/mv643xx.h
>>>> @@ -656,6 +656,9 @@
>>>> /* Ethernet Unit Registers */
>>>> /****************************************/
>>>>
>>>> +#define MV64340_ETH_PHY_ADDR 0x2000
>>>> +#define MV64340_ETH_SMI 0x2004
>>>> +
>>>> /*******************************************/
>>>> /* CUNIT Registers */
>>>> /*******************************************/
>>>>
>>>
>>>
>>
>>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] mv64361: Add dummy gigabit ethernet PHY access registers
2023-06-14 19:21 ` BALATON Zoltan
2023-06-21 12:34 ` BALATON Zoltan
@ 2023-06-30 16:44 ` Daniel Henrique Barboza
1 sibling, 0 replies; 7+ messages in thread
From: Daniel Henrique Barboza @ 2023-06-30 16:44 UTC (permalink / raw)
To: BALATON Zoltan, qemu-devel, qemu-ppc
On 6/14/23 16:21, BALATON Zoltan wrote:
> On Mon, 5 Jun 2023, BALATON Zoltan wrote:
>> We don't emulate the gigabit ethernet part of the chip but the MorphOS
>> driver accesses these and expects to get some valid looking result
>> otherwise it hangs. Add some minimal dummy implementation to avoid rhis.
>>
>> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
>> ---
>> This is only used by MorphOS on pegasos2 so most likely could go via
>> the ppc queue.
And it will.
Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks,
Daniel
>
> Ping?
>
> Regards,
> BALATON Zoltan
>
>> hw/pci-host/mv64361.c | 6 ++++++
>> hw/pci-host/mv643xx.h | 3 +++
>> 2 files changed, 9 insertions(+)
>>
>> diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
>> index 19e8031a3f..01bd8c887f 100644
>> --- a/hw/pci-host/mv64361.c
>> +++ b/hw/pci-host/mv64361.c
>> @@ -541,6 +541,12 @@ static uint64_t mv64361_read(void *opaque, hwaddr addr, unsigned int size)
>> }
>> }
>> break;
>> + case MV64340_ETH_PHY_ADDR:
>> + ret = 0x98;
>> + break;
>> + case MV64340_ETH_SMI:
>> + ret = BIT(27);
>> + break;
>> case MV64340_CUNIT_ARBITER_CONTROL_REG:
>> ret = 0x11ff0000 | (s->gpp_int_level << 10);
>> break;
>> diff --git a/hw/pci-host/mv643xx.h b/hw/pci-host/mv643xx.h
>> index cd26a43f18..f2e1baea88 100644
>> --- a/hw/pci-host/mv643xx.h
>> +++ b/hw/pci-host/mv643xx.h
>> @@ -656,6 +656,9 @@
>> /* Ethernet Unit Registers */
>> /****************************************/
>>
>> +#define MV64340_ETH_PHY_ADDR 0x2000
>> +#define MV64340_ETH_SMI 0x2004
>> +
>> /*******************************************/
>> /* CUNIT Registers */
>> /*******************************************/
>>
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2023-06-30 16:45 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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2023-06-05 21:51 [PATCH] mv64361: Add dummy gigabit ethernet PHY access registers BALATON Zoltan
2023-06-14 19:21 ` BALATON Zoltan
2023-06-21 12:34 ` BALATON Zoltan
2023-06-29 8:36 ` BALATON Zoltan
2023-06-29 11:04 ` Cédric Le Goater
2023-06-30 14:22 ` Daniel Henrique Barboza
2023-06-30 16:44 ` Daniel Henrique Barboza
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